JP2000295534A - Solid-state image pickup device and image pickup system and image read system using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a noise without increasing the size of a solid-state image pickup device by forming a feedback loop with a differential amplifier means, a reset means and an output means. SOLUTION: When a high level pulse is applied to terminals 101, 112, a transistor(TR) M3 of a pixel section is conductive, resulting that a TR M4 and a constant current source 11 act like a source follower circuit. Since TRs M7, M6 around an output signal A1 are conductive at the same time, a reset voltage from a terminal 113 is given to a noninverting input terminal of the operational amplifier A1 and a voltage on an output line 50 is given to an inverting input terminal of the operation amplifier A1. Thus, the operational amplifier A1 acts like a comparator. Since a terminal 103 is set to a high level and a rest MOS TR M2 of the pixel section is conductive, a feedback is loop formed with a path of the operational amplifier A1 → the reset MOS TR M2 →the source follower circuit of the pixel section (consisting of the TR M4 and the source 11) → the operational amplifier A1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device having a photoelectric conversion unit for converting an optical signal into an electric signal.

[0002]

2. Description of the Related Art Conventionally, a solid-state imaging device has photoelectric conversion means for converting a photon into a pair of electrons and holes, such as a photodiode and a phototransistor. This is output by a read circuit such as a MOS transistor or a bipolar transistor. These photoelectric conversion means are arranged one-dimensionally as linear sensors, and two-dimensionally as area sensors, such as video cameras and copiers. Development is expected.

In a solid-state imaging device using such photoelectric conversion means, particularly in a CCD, an optical signal photoelectrically converted by a photodiode is 99.9. . . % Transfer efficiency,
FPN (especially FPN in the dark state) has reached a level where it hardly matters. On the other hand, a fixed imaging device having a readout circuit using a MOS transistor and a bipolar transistor has a function of amplifying electric charge for each pixel, and thus has an APS (ActivePix).
Although it has recently been spotlighted as “el Sensor”, the characteristics such as Vth and Vbe of the transistor vary from pixel to pixel, causing a large FPN.

In recent years, various proposals have been made to reduce such FPN.

FIG. 17 shows an FPN correction circuit reported in Japanese Patent Publication No. 8-4127, in which a first storage means for storing a read signal of the photoelectric conversion means and a residual signal (FPN) after resetting the photoelectric conversion means. 2) is provided, and the FPN is corrected by performing a difference process between the two.

[0006]

Here, in FIG. 17, two accumulating means are provided. Since signal reading from these accumulating means is performed by dividing the capacity into the capacity Ch, the deterioration of the read gain may occur. In order to perform reading without any problem, it is necessary to design the capacitance Ct to be large according to the capacitance Ch, which has led to an increase in chip size.

[0007]

In order to solve the above-mentioned problems, a first means includes a photoelectric conversion means, a reset means for supplying a predetermined reset level, and an output means for outputting a signal. It has a plurality of pixels, a differential means for performing a differential output between a plurality of signals, a differential means, the reset means, and a loop forming means for forming a feedback loop with the output means. A solid-state imaging device is provided.

As a second means, in the solid-state imaging device according to the first means, there is provided a means for opening a feedback loop after the inside of the pixel is set to a predetermined reset level. Provided is a solid-state imaging device.

According to a third aspect, in the solid-state imaging device according to any one of the first and second aspects, after the inside of the pixel is set to a predetermined reset level, a signal generated by the light receiving means is output from the output means. There is provided a solid-state imaging device having means for outputting.

According to a fourth aspect of the present invention, there is provided the solid-state imaging device according to any one of the first to third means, wherein the differential means includes an operational amplifier.

According to a fifth aspect of the present invention, there is provided the solid-state imaging device according to any one of the first to fourth means, wherein the output means includes a source follower circuit.

According to a sixth aspect, in the solid-state imaging device according to any one of the first to fifth aspects, the differential means selectively outputs either a differential output or a voltage follower output. And a solid-state imaging device having the above-mentioned means.

According to a seventh aspect, in the solid-state imaging device according to any one of the first to sixth means, the output from the output means is selectively output to one of the input terminals of the differential means. There is provided a solid-state imaging device having means.

[0014] Further, as an eighth means, a photoelectric conversion means, a reset means for supplying a predetermined reset level,
A plurality of pixels including an output unit for outputting a signal; and an operational amplifier. An output unit of the output unit is connected to positive and negative input terminals of the operational amplifier via a switch unit. Provides a solid-state imaging device which is connected to the reset means.

According to a ninth aspect, in the solid-state imaging device according to the eighth aspect, the negative input terminal of the operational amplifier is connected to the reset unit and the output unit of the operational amplifier via the switch unit. A solid-state imaging device.

According to a tenth means, the solid-state imaging device of any of the first to ninth means, a signal processing means for performing signal processing on a signal from the solid-state imaging device, and a solid-state imaging device A drive unit for performing focus control, zoom control or iris control based on a signal from the device, and a control unit for controlling the solid-state imaging device, the signal processing unit, and the drive unit. An imaging system is provided.

An eleventh means is a document conveying means for conveying the document, a light source for irradiating the document conveyed by the document conveying means with light, and a light source for receiving the reflected light irradiated on the document. 9. An image reading system, comprising: the solid-state imaging device according to any one of 9); and an image forming unit that forms an image based on a signal from the solid-state imaging device.

According to a twelfth aspect, there is provided the solid-state imaging device according to any one of the first to ninth means, and original reading means for irradiating the original with light and causing the solid-state imaging device to receive reflected light. And an image forming unit that forms an image based on a signal from the solid-state imaging device, and a communication unit that transmits an image formed by the image forming unit to the outside. I do.

[0019]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) A first embodiment of the present invention will be described with reference to the circuit diagram of FIG. 1 and the timing chart of FIG.

In FIG. 1, for simplicity of description, an image pickup apparatus having two vertical pixels and two horizontal pixels will be described. 1
Pixels are photodiodes D1 and M1 to
Four transistors and floating diffuser of M4
It consists of John capacity CP1. Here, M1 is a photodiode
A transfer MOS transistor M2, which is a transfer means for transferring the photocharge generated by the floating charge to the floating diffusion capacitance, supplies a potential for resetting the floating diffusion capacitance to a predetermined potential. Reset means, a reset MOS transistor, M
Reference numeral 4 denotes an amplifying MOS transistor for outputting a signal in the pixel, which constitutes a constant current load 52 and a source follower circuit as an output means. M3 is a selection MOS transistor as selection means for supplying a potential to the drain of the amplification MOS transistor and selectively driving the source follower circuit.

Reference numeral 53 denotes an AND circuit, and the vertical scanning circuit 130
, And the pulse from the terminal 101, 102 or 103 are applied simultaneously, the transistor M1, M2 or M4 is turned on.
It outputs a pulse to turn ON.

Reference numeral 50 denotes a vertical output line for outputting a signal from each pixel, and reference numeral M6 denotes a switch means for connecting the terminal 113 to a positive input terminal of an operational amplifier A1 as a differential means. The connection MOS transistors M8 and M7 are switch means for connecting the vertical output line 50 to the positive input terminal and the negative input terminal of the operational amplifier, respectively, and the connection MOS transistor M9 is connected to the negative input terminal of the operational amplifier. This is a connection MOS transistor which is a switch means for connecting to an output terminal of the operational amplifier, and is controlled by pulses input from terminals 111 and 112. Reference numeral 51 denotes a reset line for connecting the output terminal of the operational amplifier to the drain of the reset MOS transistor.

Next, the operation of this embodiment will be described with reference to the timing chart of FIG.

First, at time t0, a signal is output from the vertical scanning circuit to the selection line 131.

Next, at time t1, the terminals 101, 112
Is applied, a transistor M3 in the pixel portion is turned on, and as a result, the transistor M3 is turned on.
4 and the constant current source I1 operate as a source follower circuit. At this time, the transistors M7 and M6 around the operational amplifier are simultaneously turned on, so that the reset voltage Vr supplied from the terminal 113 is applied to the + input terminal of the operational amplifier.
es, the voltage of the output line 50 is input to the negative input terminal. Therefore, the operational amplifier performs a comparator operation, and outputs a + voltage (for example, power supply voltage) if the + terminal voltage is higher than the-terminal voltage, and outputs a-voltage (for example, GND) if it is lower. Here, the terminal 103 is H
Since it is in the high state, the reset MOS transistor M2 in the pixel section is in the ON state, so that the operational amplifier → the reset MOS transistor → the pixel section source follower circuit →
By forming the feedback loop of the operational amplifier, the pixel portion following diffusion capacitance is reset to Vres + Vopamp + Vth + ΔVth.

Here, Voamp: offset voltage of the operational amplifier Vth: threshold voltage of the transistor M4 ΔVth: variation between pixels of the threshold voltage of the transistor M4. Although this feedback loop largely depends on the characteristics of the operational amplifier, it generally converges within 1 μsec by using recent microdevice technology. At this time, the pulse at the terminal 103 falls at time t2.
The reset MOS transistor M2 is turned off, and at time t
At 3, the pulse at the terminal 112 falls, and the feedback loop is opened.

Next, at time t4, a pulse at the terminal 102 rises, and the electric charge photoelectrically converted by the photodiode D1 is transferred to the floating diffusion capacitance CP1.

At this time, since the voltage of CP1 changes according to the amount of light, the floating diffusion capacitance CP
1 is: Vres + Vopamp + Vth + ΔVth + Vlig
ht. Here, Vlight is a voltage change amount of the capacitor CP1. Then, reading is performed at time t5 or less.

Here, since the transfer MOS transistor M1 completely transfers the charge of the photodiode D1 to the capacitor CP1, when the transfer is completed, the photodiode D1 is reset and the photoelectric conversion operation of the next field starts.

Next, at time t5, the terminal 101 is again turned on.
, A high-level pulse is applied to turn on the selection MOS transistor MJ3, and at the same time, the terminal 114 rises, and the output of the OP amplifier is connected to the storage capacitor C1 through the switch M10. Here, the voltage of the floating diffusion capacitance is read out to the output line 50 by the pixel portion source follower circuit. Here, the potential of the gate of the amplifying MOS transistor M4, which is the input portion of the source follower circuit, is Vres + Vopamp + Vth + Δ
Vth + Vlight, the output line 50
res + Vopamp + Vth + ΔVth + Vlight
t− (Vth + ΔVth) = Vres + Vopamp +
The potential of Vlight is output. And the terminal 111
In this case, the output line 50 is connected to the + input terminal of the operational amplifier A1. On the other hand, since the MOS transistor M9 is also in the ON state, the operational amplifier A1 receives a non-feedback and operates as a voltage follower, and the same voltage as the + input terminal is output to the output terminal of the operational amplifier. However, since the operational amplifier has an offset voltage Voamp, the voltage is shifted by this voltage.

Further, since the connection of the output line 50 has been replaced with that at time t1, the voltage of -Vopamp is offset this time. Therefore, the output terminal of the OP amplifier is Vres + Vopamp + Vlight-Vopamp
= Vres + Vlight, and a voltage such as Vopamp or ΔVth that does not include a term that causes FPN due to variation between operational amplifiers and between pixels is output.

When the reading to the storage capacitor is completed,
At time t6, the pulse at terminal 114 falls,
The S-transistor M10 is turned off, the pulses of the terminals 101 and 111 fall at times t7 and t8, respectively, the pixel source follower circuit is turned off, and the operational amplifier A
1. Open the non-feedback loop. (It is needless to say that the non-feedback loop of the operational amplifier does not necessarily need to be turned off at this point because the optical signal from the pixel has already been written into the storage capacitor C1 and is separated from the output of the operational amplifier. Although the operation for one pixel has been described in the period from time t0 to time t8, the pixels in the same row perform exactly the same operation.

After the optical signal for one row is read out to the holding capacitor C1 by the above operation, the horizontal scanning circuit 140
The signal of each pixel is read out in time series. (Time t9-
t12)

After time t12, the next row is selected by the vertical scanning circuit, and the same operation as that from time t0 to t8 is performed, and a series of operations is completed.

As described above, according to this embodiment,
Even if the Vth of the MOS transistor M4 constituting the source follower amplifier of the pixel varies, or the offset voltage of the operational amplifier differs from column to column, an output that does not depend on them and has no FPN can be obtained.

Further, as described above, the operational amplifier does not need to operate at high speed (up to 1 μsec), and therefore requires only a simple circuit configuration with a small number of elements, so that the chip size can be reduced.

(Embodiment 2) FIG. 2 shows a circuit configuration of a second embodiment of the present invention. The present embodiment is a primary version of the first embodiment, and since the operation and the like are exactly the same as those of the first embodiment, description thereof will be omitted.

(Embodiment 3) A third embodiment of the present invention will be described with reference to the circuit diagram of FIG. 4 and the timing chart of FIG. FIG. 4 differs from FIG.
Has no capacitor C1 for temporarily holding a signal from the operational amplifier A1 and a MOS transistor M10 for transferring a signal to the capacitor C1, and the other configuration is the same. Hereinafter, the operation of the present embodiment will be described with reference to the timing chart of FIG. In FIG.
The operation until t4, that is, the operation from the reset of the pixel and the transfer of the photocharge from the photodiode D1 to the floating diffusion capacitance CP1 are completely the same as those in the first embodiment, and thus the description is omitted. When the transfer of the photocharge is completed, the pulses at the terminals 101 and 111 are activated at time t5 to operate the pixel source follower circuit, and the non-feedback loop of the operational amplifier A1 is closed to output the optical signal of the pixel from the operational amplifier A1. I do. In this state, the horizontal scanning circuit 140 is operated during the period from the time t6 to the time t9, and the signals of the respective pixels are output to the output terminal 120 in time series. When the output of all the pixels in the row direction is completed, the time t
At 9 and t10, the non-feedback loop is opened, and the pixel source follower circuit is turned off. As previously mentioned,
There is no problem even if the timing for opening the non-feedback loop is different from this. Next, at time t11, the vertical scanning circuit is shifted by one row, the same operation as at times t0 to t10 is performed at and after t11, a signal of a pixel in the second row is output, and a series of operations ends. This embodiment is the first
Since the storage capacitor C1 and the MOS transistor M10 are omitted from the third embodiment, the chip size can be further reduced as compared with the first embodiment.

(Embodiment 4) A fourth embodiment of the present invention will be described with reference to the circuit diagram of FIG. 4 and the timing chart of FIG. Hereinafter, the operation of the present embodiment will be described with reference to FIG.
This will be described with reference to the timing chart of FIG. Time t0-t
Up to 4 pixels reset and photodiode D1
The transfer from the PC to the capacity PC1 is exactly the same as in the other embodiments. When the transfer of the photoelectric charge to the capacitor CP1 is completed, at time t
At 5, the pulses of the terminals 101, 111, and 118 rise to activate the pixel source follower circuit, connect the output line 50 to the + input terminal of the operational amplifier, and close the non-feedback loop of the operational amplifier A1. When the output of the pixel source follower circuit ends, at time t6, the pulse of the terminal 111 falls, and the connection between the output line 50 and the + input terminal of the operational amplifier is disconnected, so that the optical signal of the pixel is input to the + input of the operational amplifier A1. It is kept at the parasitic capacitance of the terminal. Here, the parasitic capacitance includes the junction capacitance between the drain wells of the transistor M8, the input capacitance input of the + input terminal of the operational amplifier A1, and the other parasitic capacitance of the wiring. Next, from time t7 to t10, the horizontal scanning circuit 140 is operated to output the signals of the respective pixels in the first row to the output terminal in a time-series manner. When the signal output from the pixels in the first row ends, the pulse at the terminal 118 falls at time t11, and the non-feedback loop of the operational amplifier A1 is opened. Next, after time t12, the vertical scanning circuit 130 is shifted by one row, and
The same operation as that from time t0 to time t11 is performed on the pixels in the row, and a signal of the pixels in the second row is output, thereby ending a series of operations. In the fourth embodiment, the pixel source follower circuit is ON during the period of outputting the pixels in the same row one by one. Therefore, the readout time from the pixel differs depending on the position of the pixel. (Time is long), the output value may be different for each pixel. This is the output period for each pixel (from time t7 to t9).
The shorter the is, the more noticeable. On the other hand, in the present embodiment, since the output signal of the pixel source follower circuit is once read out one pixel after holding the input capacitance of the operational amplifier, the signal of the pixel in the same row is output uniformly regardless of its position. Is obtained.

In each of the embodiments described above, the configuration of the pixel is the same and is composed of one photodiode and four transistors. However, there is no problem with other pixel configurations. Needless to say. One example is shown in FIGS. FIG. 7 is different from the pixel configuration used in the first to fifth embodiments in the position of the selection MOS transistor, and FIG. 8 is without the transfer MOS transistor. FIG. 9 shows an example in which a bipolar transistor is used as an amplifier in a pixel.

As described above, according to the present invention, each pixel is reset by a voltage including a characteristic variation of a device related to each pixel, such as Vres + Vopamp + Vth + ΔVth, and the optical signal is reduced by a following diffusion capacitance. Although it is a voltage superimposed on the reset voltage, when it is output by the source follower amplifier and the operational amplifier, these characteristic variations are canceled out, and only a pure optical signal voltage is obtained.

Therefore, in the conventional method, the signal of each pixel is repeated for the purpose of filtering or the like, and when used, the first storage means for storing the readout signal from the pixel and the remaining signal after reset are stored. The second storage means has to be provided by the number of repetitions. However, the present invention does not need to provide the second storage means, and enables various signal processing without increasing the chip size.

(Embodiment 5) An embodiment in which the solid-state imaging device having two-dimensionally arranged pixels described in the above embodiment is applied to a video camera with reference to FIG. 10 will be described in detail.

FIG. 10 is a block diagram showing a case where the solid-state image pickup device of the present invention is applied to a video camera. Reference numeral 201 denotes a focus lens 1 for performing focus adjustment with a photographing lens.
A, a zoom lens 1B for performing a zoom operation, and an imaging lens 1C are provided.

Reference numeral 202 denotes an aperture; 203, a solid-state imaging device that photoelectrically converts a subject image formed on an imaging surface into an electrical imaging signal; 204, sample-holds an imaging signal output from the solid-state imaging device 203; Further, it is a sample / hold circuit (S / H circuit) for amplifying the level, and outputs a video signal.

Reference numeral 205 denotes a process circuit for performing predetermined processing such as gamma correction, color separation, and blanking processing on the video signal output from the sample hold circuit 204, and outputs a luminance signal Y and a chroma signal C.

The chroma signal C output from the process circuit 205 is subjected to white balance and color balance correction by a color signal correction circuit 221, and the color difference signals RY, B
Output as -Y.

The luminance signal Y output from the process circuit 205 and the color difference signals RY and BY output from the color signal correction circuit 221 are modulated by an encoder circuit (ENC circuit) 224 and output to a standard television. It is output as a John signal. Then, it is supplied to a monitor EVF such as a video recorder (not shown) or an electronic viewfinder.

Reference numeral 206 denotes an iris control circuit which controls the iris drive circuit 207 based on the video signal supplied from the sample hold circuit 204, and stops the iris so that the level of the video signal becomes a predetermined constant value. 2
The ig meter 208 is automatically controlled in order to control the opening amount of No. 02.

Reference numerals 213 and 214 denote band-pass filters (BPF) having different band limits for extracting high-frequency components necessary for performing focus detection from the video signal output from the sample hold circuit 204. The signals output from the first band-pass filter 213 (BPF1) and the second band-pass filter 214 (BPF2) are respectively gated by a gate circuit 215 and a focus gate frame signal. Is held and detected, and input to the logic control circuit 217. This signal is called a focus voltage, and the focus is adjusted by this focus voltage.

Reference numeral 218 denotes a focus encoder for detecting the moving position of the focus lens 1A, 219 a zoom encoder for detecting the focal length of the zoom lens 1B,
Reference numeral 220 denotes an iris encoder that detects an opening amount of the stop 202. The detected values of these encoders are supplied to a logic control circuit 217 that performs system control.

The logic control circuit 217 detects the focus of the subject based on the video signal corresponding to the set focus detection area and adjusts the focus. That is, the peak value information of the high frequency component supplied from each of the band pass filters 213 and 214 is fetched, and the focus drive circuit 209 is driven by the focus drive circuit 209 to drive the focus lens 1A to the position where the peak value of the high frequency component is maximum.
A control signal such as a rotation direction, a rotation speed, and a rotation / stop is supplied to control this.

(Embodiment 6) An example in which the two-dimensionally arranged solid-state imaging device described in the above-described embodiment is applied to a still camera will be described in detail with reference to FIG.

In FIG. 11, reference numeral 301 denotes a barrier which serves both as protection of a lens and as a main switch; 302, a lens for forming an optical image of an object on a fixed imaging device 304;
Reference numeral 03 denotes an aperture for varying the amount of light passing through the lens 302, reference numeral 304 denotes a solid-state imaging device for capturing the subject formed by the lens 302 as an image signal, and reference numeral 306 denotes an analog image signal output from the solid-state imaging device 304. An A / D converter that performs digital conversion; 307, a signal processing unit that performs various corrections on the image data output from the A / D converter 306 and compresses the data; 308, a solid-state imaging device 304; Circuit 305, A / D converter 30
6, a timing generation unit that outputs various timing signals to the signal processing unit 7, 309 is an overall control / operation unit that controls various operations and the entire still video camera, and 310 is a memory unit that temporarily stores image data. Reference numeral 311 denotes an interface unit for recording or reading on a recording medium. Reference numeral 312 denotes a detachable recording medium such as a semiconductor memory for recording or reading image data. Reference numeral 313 denotes an interface unit for communicating with an external computer or the like. It is.

Next, the operation of the still video camera at the time of shooting in the above configuration will be described.

When the barrier 301 is opened, the main power is turned on, the power of the control system is turned on, and the power of the imaging system circuit such as the A / D converter 306 is turned on.

Then, in order to control the exposure amount, the overall control / arithmetic unit 309 opens the aperture 303 and the signal output from the solid-state image pickup device 304 is converted by the A / D converter 306, and then the signal is processed. The data is input to the unit 307. Exposure calculation is performed by the overall control / calculation unit 309 based on the data.

The brightness is determined based on the result of the photometry, and the overall control / arithmetic unit 309 controls the aperture according to the result.

Next, based on the signal output from the solid-state imaging device 304, high-frequency components are extracted, and the distance to the subject is calculated by the overall control / calculation unit 309. Thereafter, the lens is driven to determine whether or not the lens is in focus. If it is determined that the lens is not in focus, the lens is driven again to perform distance measurement.

Then, after the focusing is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the solid-state imaging device 304 is A / D converted by the A / D converter 6, passes through the signal processing unit 7, and is written in the memory unit by the overall control / operation 309. After that, the data stored in the memory unit 10 is recorded on the removable recording medium 12 such as a semiconductor memory through the recording medium control I / F unit under the control of the overall control / arithmetic unit 309. Further, the image may be processed by directly inputting it to a computer or the like through the external I / F 313.

(Embodiment 7) Based on FIGS. 12 and 13, the solid-state imaging device in which pixels are arranged one-dimensionally as described in the above-described embodiment is applied to a sheet feed type document image reading device. One embodiment will be described in detail.

FIG. 12 is a schematic diagram of a document image reading apparatus for reading a document image. Reference numeral 401 denotes a contact-type image sensor (hereinafter also referred to as “CIS”), which is a solid-state imaging device 4.
02, selfoc lens 403, LED array 404
And a contact glass 405. The transport rollers 406 are arranged before and after the CIS 1 and are used to arrange a document. Contact sheet 4
07 is used to bring the original into contact with CIS1. A control circuit 410 processes a signal from the CIS 401 and the like.

The document detection lever 408 is a lever for detecting that a document has been inserted. When the document detection lever 408 detects that a document has been inserted, the output of the document detection sensor 409 is tilted by the document detection lever 408. The CPU 515 in the control circuit 410
Then, it is determined that a document has been inserted, and a document conveying roller 406 driving motor (not shown) is driven to start document conveyance and perform a reading operation.

FIG. 13 is a block diagram showing an electrical configuration for describing the control circuit of FIG. 12 in detail. The circuit operation will be described below with reference to FIG. 13: In FIG. 13, reference numeral 501 denotes an image sensor (CIS 1 in FIG. 12), and LEDs 502 of respective colors R, G, and B as light sources are also integrated. The LED control (drive) circuit 5 is driven while the document is transported on the contact glass 405 of the CIS 1.
By switching the LED 502 of each color R, G, B for each line at 03 and lighting it, it is possible to read a color image of the R, G, B lines sequentially.

The AMP 504 is an amplifier for amplifying the signal output from the CIS 501, and the 505 is an A / D converter for performing A / D conversion of the amplified output to obtain an 8-bit digital output, for example. Shading RA
M506 stores shading correction data by reading a calibration sheet in advance, and a shading correction circuit 507 performs shading correction of the read image signal based on the data of the shading RAM 506. The peak detection circuit 508 is a circuit that detects a peak value in the read image data line by line, and is used to detect the leading edge of the document.

The gamma conversion circuit 509 performs gamma conversion of image data read according to a gamma curve preset by the host computer.

The buffer RAM 510 is a RAM for temporarily storing image data in order to match the timing of an actual reading operation with the communication with the host computer. A more preset image output mode (binary, 4-bit multi-level, 8-bit multi-level, 2
After performing the packing process according to (4-bit multi-value),
A process of writing the data to the buffer RAM 510;
The interface circuit 512 reads the image data from the buffer RAM 510 and outputs it.

The interface circuit 512 receives a control signal and outputs an image signal with an external device such as a personal computer which is a host device of the image reading apparatus according to the present embodiment.

Reference numeral 515 denotes a microcomputer-type CPU, for example, which is a ROM 515A storing processing procedures.
And a work RAM 515B, and controls each unit according to a procedure stored in the ROM 515A.

516 is a crystal oscillator, for example, and 514 is
This is a timing signal generation circuit that divides the output of the oscillator 516 in accordance with the setting of the CPU 515 and generates various timing signals serving as operation references. An external device 513 is connected to the control circuit via the interface circuit 513, and a personal computer is an example of the external device.

(Embodiment 8) Based on FIGS. 14 and 15, a case where the solid-state imaging device in which pixels are arranged one-dimensionally described in the above-described embodiment is applied to a document image reading device having a communication function and the like. An embodiment will be described in detail.

FIG. 14 is a block diagram showing the configuration of the image processing section of the image reading apparatus. In FIG. 15, the reader unit 6
Reference numeral 01 reads a document image (not shown) and outputs image data corresponding to the document image to the printer unit 602 and the image input / output control unit 603. The printer unit 602 is a reader unit 6
01 and an image corresponding to the image data from the image input / output control unit 603 are recorded on recording paper.

The image input / output control unit 603 includes a reader unit 601
Facsimile unit 604, file unit 605, computer interface unit 607, formatter unit 608, image memory 609, core unit 61
Consists of 0 mag. Of these, the facsimile unit 604
The compressed image data received via the telephone line 613 is decompressed and the decompressed image data is transferred to the core unit 610, and the image data transferred from the core unit 610 is compressed and compressed image data is transmitted to the telephone unit 610. The data is received via the line 613. The facsimile unit 604 has a hard disk 6
12 is connected, and can temporarily store the received compressed image data.

A magneto-optical disk drive unit 606 is connected to the file unit 605, and the file unit 60
5 compresses the image data transferred from the core unit 610 and stores the image data together with a keyword for searching the image data on the magneto-optical disk set in the magneto-optical disk drive unit 606. The file unit 605 searches for compressed image data stored on the magneto-optical disk based on the keyword transferred via the core unit 610. Then, the retrieved compressed image data is read and decompressed, and the decompressed image data is transferred to the core unit 610.

Computer interface 607
Is an interface between the personal computer or workstation (PC / WS) 611 and the core unit 610. The formatter unit 608 is a PC
/ WS11 to expand the code data representing the image transferred to the printer unit 602 into image data recordable by the printer unit 602.
1 to temporarily store the data transferred.

The core unit 610 controls the flow of data among the reader unit 601, facsimile unit 604, file unit 605, computer interface unit 607, formatter unit 608, and image memory unit 609.

FIG. 606 is a diagram showing a sectional configuration of the reader unit 601 and the printer unit 602 of FIG. 605.

In FIG. 5, a document feeder 701 of the reader unit 601 feeds a document (not shown) one by one from the last page onto the platen glass 702 one by one, and after the reading operation of the document is completed, the document feeder 701 The original is discharged. When the document is conveyed onto the platen glass 702, the lamp 703 is turned on, the movement of the scanner unit 704 is started, and the document is exposed and scanned.

The reflected light from the original by this exposure scanning is
The light is guided to the solid-state imaging device 109 by mirrors 705, 706, 707 and a lens 708. Thus, the scanned image of the document is read by the solid-state imaging device 709. The image data output from the solid-state imaging device 709 is subjected to A / D conversion, shading correction, and the like, and then transferred to the printer unit 2 or the core unit 610.

The laser driver 721 of the printer unit 602
Drives the laser emitting unit 701 and causes the laser emitting unit 701 to emit a laser beam corresponding to the image data output from the reader unit 601. This laser beam is applied to the photosensitive drum 7
02 are irradiated to different positions, and latent images corresponding to these laser beams are formed on the photosensitive drum 702.

In the portion of the latent image on the photosensitive drum 702,
The developer is attached by the developing machine 703. Then, at a timing synchronized with the start of laser beam irradiation, the cassette 7
The recording paper is fed from one of the cassette 04 and the cassette 705, is conveyed to the transfer unit 706, and the developing material attached to the photosensitive drum 702 is transferred onto the recording paper. The recording paper on which the developing material is loaded is conveyed to the fixing unit 707 and
The developer is fixed on the recording paper by the heat and pressure in the above.

The recording paper that has passed through the fixing section 707 is discharged by the discharge roller 208, and the sorter 720 stores the discharged recording paper in each bin and sorts the recording paper. If the sorter is not set, the sorter 720 conveys the recording paper to the discharge roller 708, and then reverses the rotation direction of the discharge roller 708, and
To guide it to the re-feeding conveyance path 710.

When multiplex recording is set,
The flapper 709 guides the recording sheet to the re-feeding conveyance path 710 so as not to convey the recording sheet to the discharge roller 708.
The recording paper guided to the re-feed conveyance path 710 is supplied to the transfer unit 706 at the same timing as described above.

(Embodiment 9) Based on FIG. 16, a camera control having, for example, a video camera of Embodiment 5 using a solid-state imaging device in which pixels are arranged in a two-dimensional manner described in the above-described embodiment. The system will be described in detail.

In the present embodiment, the present invention is not limited to the video camera of the fifth embodiment, but may be a still camera of the sixth embodiment.

FIG. 16 is a schematic block diagram showing a camera control system. A network 810 digitally transmits video data and camera control information (including status information), and includes n video transmission terminals 812 (8
12-1 to 812-n) are connected.

Each video transmission terminal 812 (812-1 to 81-1)
2-n) includes a camera control device 814 (814-1 to 814-8).
14-n) through the camera 816 (816-1 to 816).
-N) is connected. The camera control device 814 (81
4-1 to 814-n) are video transmission terminals 812 (812).
-1 to 812-n), the panning of the video camera 816 (816-1 to 816-n) to be connected,
Controls tilt, zoom, focus, aperture, etc.

The video camera 816 (816-1 to 816-1)
816-n) is a camera controller 814 (814-1 to 814-1).
814-n), and the camera control device 814- (814-1 through 814-n) responds to an external control signal to control the video camera 816 (816-1 through 816-8).
16-n) ON / OFF of the power supply is controlled.

The network 810 receives video information transmitted from the video transmission terminals 812 (812-1 to 812-n) to the network 810 and displays the video information 818 (818-1 to 818-m). ) Is connected. Each video receiving terminal 818 (818-1 to 818-
m) includes a monitor 820 (820-1 to 820-
m) is connected.

Here, the network 810 does not need to be wired, and may be a wireless network using a wireless LAN device or the like. In this case, the video receiving terminal 818
The portable video receiving terminal device can be integrated with the monitor 820.

The video transmission terminal 812 (812-1 to 812)
-N) is the camera 816 (816-1 to 816) to be connected.
-N) is output from the H.264 signal. 261 and all the video receiving terminals 818 or all video receiving terminals 818 via the network 810.
Send to The video receiving terminal 18 is connected to the network 81
0, along with various parameters (shooting azimuth, shooting magnification, focus and aperture, etc.) of any camera 816 via the video transmission terminal 812 and the camera control device 814.
ON / OFF control of power supply is possible.

Here, the video transmission terminal 812 can also be used as a video reception terminal by connecting a monitor and providing a video decompression device for decompressing a compressed video. on the other hand,
The video receiving terminal 18 can also be used as a video transmitting terminal by connecting the camera control device 814 and the video camera 816 and providing a video compression device. These terminals are provided with a ROM for storing software necessary for video transmission or video reception.

With the above configuration, the video transmission terminal 812
Transmits a video signal to a remote video receiving terminal 18 via a network 810,
The camera 8 receives the camera control signal transmitted from the
The control of 16 pans and tilts is executed.

The video receiving terminal 818 transmits a camera control signal to the video transmitting terminal 812, and the video transmitting terminal 812 that has received the camera control signal controls the camera 816 according to the content of the camera control signal, and , The current state of the camera 816 is returned. Video receiving terminal 81
8 receives the video data transmitted from the video transmission terminal 812, performs predetermined processing, and displays the captured video on the display screen of the monitor 840 in real time.

[0096]

According to the present invention, it is possible to reduce noise without increasing the number of devices.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a first embodiment of the present invention.

FIG. 3 is a diagram for explaining a second embodiment of the present invention.

FIG. 4 is a diagram for explaining a third or fourth embodiment of the present invention.

FIG. 5 is a diagram for explaining a third embodiment of the present invention.

FIG. 6 is a diagram for explaining a fourth embodiment of the present invention.

FIG. 7 is a diagram illustrating a configuration of a pixel.

FIG. 8 is a diagram illustrating a configuration of a pixel.

FIG. 9 is a diagram illustrating a configuration of a pixel.

FIG. 10 is a diagram for explaining a fifth embodiment of the present invention.

FIG. 11 is a diagram for explaining a sixth embodiment of the present invention.

FIG. 12 is a diagram for explaining a seventh embodiment of the present invention.

FIG. 13 is a diagram for explaining a seventh embodiment of the present invention.

FIG. 14 is a diagram for explaining an eighth embodiment of the present invention.

FIG. 15 is a diagram for explaining an eighth embodiment of the present invention.

FIG. 16 is a diagram for explaining a ninth embodiment of the present invention.

FIG. 17 is a diagram for explaining a conventional example.

[Explanation of symbols]

 D1 Photodiode M1 Transfer MOS transistor M2 Reset MOS transistor M3 Selection MOS transistor M4 Amplification MOS transistor 50 Vertical output line 51 Reset line 52 Constant current load A1 Operational amplifier M6 Connection MOS transistor M7 Connection MOS transistor M8 Connection MOS transistor for connection M9

Claims (12)

[Claims] 1. A plurality of pixels including a photoelectric conversion unit, a reset unit for supplying a predetermined reset level, an output unit for outputting a signal, and a differential unit for performing a differential output between a plurality of signals. A solid-state imaging device comprising: a differential unit, the reset unit, and a loop forming unit for forming a feedback loop by the output unit. 2. The solid-state imaging device according to claim 1, further comprising: means for opening the feedback loop after the inside of the pixel is set to a predetermined reset level. 3. A means according to claim 1, wherein a signal generated by said light receiving means is output from said output means after the inside of said pixel is set to a predetermined reset level. A solid-state imaging device comprising: 4. The solid-state imaging device according to claim 1, wherein said differential means includes an operational amplifier. 5. A solid-state imaging device according to claim 1, wherein said output means includes a source follower circuit. 6. The apparatus according to claim 1, further comprising: means for selectively outputting either a differential output or a voltage follower output from said differential means. Solid-state imaging device. 7. The device according to claim 1, further comprising means for selectively outputting an output from said output means to one of input terminals of said differential means. Solid-state imaging device. 8. An image processing apparatus comprising: a photoelectric conversion unit; a reset unit for supplying a predetermined reset level; a plurality of pixels including an output unit for outputting a signal; and an operational amplifier. A solid-state imaging device connected to positive and negative input terminals of the operational amplifier via a switch, and an output of the operational amplifier connected to the reset unit. 9. The solid-state imaging device according to claim 8, wherein a negative input terminal of the operational amplifier is connected to the reset unit and an output unit of the operational amplifier via a switch unit. 10. The solid-state imaging device according to claim 1, a signal processing unit that performs signal processing on a signal from the solid-state imaging device, and a signal from the solid-state imaging device. Focus control based on
An imaging system comprising: driving means for performing zoom control or iris control; and control means for controlling the solid-state imaging device, the signal processing means, and the driving means. 11. A document conveying means for conveying a document, a light source for irradiating light on the document conveyed by the document conveying means, and receiving reflected light irradiated on the document. An image reading system, comprising: the solid-state imaging device according to claim 1; and an image forming unit that forms an image based on a signal from the solid-state imaging device. 12. The solid-state imaging device according to claim 1, wherein the solid-state imaging device irradiates light to a document and causes the solid-state imaging device to receive reflected light. An image reading system comprising: an image forming unit that forms an image based on a signal from the image forming unit; and a communication unit that transmits an image formed by the image forming unit to the outside.