JP2000285594A - Evaluating method for, encoder/decoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To permit verification and to find a bug in its early stage by connecting a disk controller model, generating read and write instructions for data to the disk model and attached data, and controlling the disk controller model according to them. SOLUTION: A test bench 21 performs control so that the disk controller model 241 performs an 'initializing process' and then 'a determining process for ID length and sector length'. Then a write command is issued and its execution result is confirmed to determine whether the inspection is carried on or quit. The encoder/decoder 13 having issued a read command reads in the data of a target sector, and demodulates and writes the data to a register prepared in a buffer manager model 22. Syndrome data for error correction are stored in an ECCD memory 23 and compared with the write data in the buffer manager model 22 to check the operation of the circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an evaluation of an encoder / decoder used for a data reproducing / recording apparatus capable of reading data from a recording medium such as an optical disk or a magneto-optical disk or writing data to the recording medium. About the method.

[0002]

2. Description of the Related Art Conventionally, as a magneto-optical (MO) disk device, as shown in FIG. 10, an interface 2 for transmitting and receiving data by connecting to a computer 1, a buffer manager 3, and a random access memory (RAM) Memory) 4
, An error correction circuit 5, a formatter 6, an encoder / decoder 7, a disk driver 8 for reading and writing data from and to a magneto-optical disk (hereinafter, referred to as a disk) 9, and a CPU (Central Processing Unit) for controlling each unit 10) is known.

Next, an outline of the operation of the magneto-optical disk drive having such a configuration will be described with reference to the drawings.

When a data write instruction is issued from the computer 1, the write data is temporarily stored in the RAM 4 via the interface 2 and the buffer manager 3. When writing of the data by the disk driver 8 starts, the write data in the RAM 4 is input to the encoder / decoder 7 after passing through the buffer manager 3. The encoder / decoder 7 generates an error correction code, attaches it to the input data, encodes the data, and writes the encoded data to the disk 9 by the disk driver 8.

On the other hand, in the case of reading data recorded on the disk 9, when the data is read by the disk driver 8, the read data is decoded by the encoder / decoder 7, and the decoded data is read. The data is stored in the RA once via the buffer manager 3.
It is stored in M4. At the same time, the encoder / decoder 7 generates error correction data called a syndrome from the read data, and transfers this to the error correction circuit 5. After that, the data stored in the RAM 4 is corrected by an error correction circuit 5, and the data is stored in the computer 1 via the buffer manager 3 and the interface 2.
Is forwarded to

Today, the magneto-optical (M
O) The encoder / decoder 7 and the like constituting the disk device are integrated circuits, and the design is performed with the aid of a computer. The operation of the encoder / decoder designed in this way is verified by simulating the operation on a computer using a simulator.

Next, a method of verifying the operation of a conventional encoder / decoder by a simulator will be described with reference to FIG.

As shown in FIG. 11, a buffer memory model 1 corresponding to the buffer manager 3 shown in FIG.
1 and a disk model 12 corresponding to the disk 9 shown in FIG. 10 are prepared, and an encoder / decoder 13 to be designed and verified is arranged between the buffer memory model 11 and the disk model 12.

The buffer memory model 11 comprises a first buffer memory 111 for storing write data in the form of word data, and a second buffer memory 112 for storing read data. Also, the disk model 12
Memory 121 for storing write data in bit units
Read file 122 for storing read data
Consists of

Next, verification of the encoder / decoder 13 by the simulator 14 will be described.

First, when writing data, the word data stored in the first buffer memory 111 is transferred to the encoder / decoder 13 by handshaking. The encode / decoder 13 modulates the word data and the generated redundant data, and outputs the result as bit data. The output bit data is stored in the memory 121. The simulator 14 compares the stored data with the reference data and verifies whether the encoder / decoder 13 has operated correctly.

On the other hand, when reading data, bit data is read from the read file 122, and the data is processed by the encoder / decoder 13 and stored in the second buffer memory 112. The simulator 14
The stored data is compared with the reference data to verify whether the encoder / decoder 13 has correctly operated.

Thus, the final check is
When data is written, the data is stored in the memory 121, and when data is read, the data is stored in the second buffer memory 112.

In addition to the above-mentioned data read / write operation check, for the purpose of inspecting the circuit operation in an abnormal state, the operation in the circuit is forcibly changed to check the operation.

[0015]

By the way, the actual disk 9 rotates, and the reading and writing of data to and from the disk 9 are performed by the disk driver 8. However, in the conventional verification method, the disk model 12 includes the memory 121 and the read file 122, and reads and writes data from and to these memories. Therefore, there is an inconvenience that the same behavior cannot be obtained when data is read / written from / to the disk as in reality.

Conventionally, verification of a data write operation and verification of a data read operation have been performed independently. Therefore, verification according to an actual operation, such as reading the written data, has been performed. There was an inconvenience of not being able to do so.

Furthermore, read data is stored in the read file 122. This data is bit data after modulation and needs to be created in advance. In addition, there are two types of modulation schemes, 1-7 modulation and 2-7 modulation, and there is a special pattern of resync between data, and it is troublesome to create data at the connection between data and resync. There was an inconvenience.

The buffer memory model 11 has the first
The disk model 12 includes a buffer memory 111 and a second buffer memory 112, and the disk model 12 includes a memory 121 and a read file 122. For this reason, the modules used are different between when verifying data reading and when verifying data writing, and a simulator that changes these connections in accordance with the verification is required. Was troublesome.

In view of the above, an object of the present invention is to provide an encoder / designer designed in an environment that behaves the same when data is actually read from or written to a disk.
An object of the present invention is to provide an encoder / decoder evaluation method capable of verifying a decoder and contributing to early detection of a bug of the encoder / decoder.

[0020]

Means for Solving the Problems In order to solve the above problems and achieve the object of the present invention, the inventions according to claims 1 to 4 are configured as follows.

That is, according to the first aspect of the present invention, a disk driver encodes data to be written to a disk,
Alternatively, in the method of evaluating an encoder / decoder in which the disk driver decodes data read from the disk, when the designed encoder / decoder is verified by a simulator, a disk controller model is assigned to the designed encoder / decoder. The simulator generates a data read / write command for the disk model and data accompanying the command, and the disk controller model dynamically reads / writes the disk model based on the generated command and data. Is performed so as to control the disk controller model.

According to a second aspect of the present invention, in the encoder / decoder evaluation method according to the first aspect, the disk controller model, when writing data to the disk model, immediately after the end of the writing. The written data is automatically read from the disk model.

According to a third aspect of the present invention, in the encoder / decoder evaluation method according to the first aspect, the disk controller model receives an output from a counter when reading data from the disk model. The reading position of the ID area data (emboss data) and the data other than the ID area is determined according to the count value of this counter.

According to a fourth aspect of the present invention, in the encoder / decoder evaluation method according to the first, second or third aspect, the simulator is created in a hardware description language. is there.

In each of the inventions having the above-described configurations, the designed encoder / decoder can be verified in an environment where the same behavior as when data is actually read from or written to the disk can be performed, and the encoder / decoder can be verified. This can contribute to early detection of bugs.

[0026]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is an explanatory diagram for explaining an embodiment of an encoder / decoder evaluation method according to the present invention.

In this embodiment, the encoder / decoder 13 to be verified is, for example, Verilog-HDL
The operation of the encoder / decoder 13 is verified by software called a test bench 21 created based on the HDL description.

In this embodiment, for the purpose of verification, models as shown in FIG. 1 are prepared, and these models are connected to the encoder / decoder 13. That is,
The encoder / decoder 13 includes a buffer manager model 22 corresponding to the buffer manager 3 and the RAM 4 in FIG. 10, an ECCD memory 23 for storing error correction data called a syndrome, and a disk driver corresponding to the disk driver 8 in FIG. The model 24 is connected.

As shown in FIG. 1, the disk driver model 24 includes a disk controller model 241, an emboss data file 242, and a user data file 243. Emboss data file 242
And the user data file 243 constitute a disk file, and correspond to the disk 9 in FIG.

When verifying the operation of the encoder / decoder 13, the test bench 21 controls the flow of the verification as described later, and
41 and the like are controlled.

Here, when a simulation of the encoder / decoder 13 is performed on the computer by the test bench 21, the encoder / decoder 13, the buffer manager model 22, the ECCD memory 22, the disk driver model 23, etc. are stored in the computer. Created.

Next, the format of data recorded on the magneto-optical disk 9 shown in FIG. 10 will be described with reference to FIG.

The format of this data is shown in FIG.
As shown in the figure, the sector mark (SM), recording address (ID), blank (GAP), data (dat)
a), error correction data (ECC, CRC), blank (G
AP), and these are repeated. Here, data composed of a sector mark (SM), a recording address (ID), and a blank (GAP) is called emboss data.

Next, an example of the verification operation of the encoder / decoder 13 by the test bench 21 will be described with reference to FIGS.
This will be described with reference to the flowchart of FIG.

First, the overall flow of the verification operation of the encoder / decoder 13 by the test bench 21 will be described with reference to FIG.
This will be described with reference to the flowchart of FIG.

In step S1, various registers described later are initialized, and in step S2, a set format is issued. In step S3A, in order to prepare data corresponding to the set format, the test bench 21 controls the disk controller model 241 to perform “initialization processing”. In step S3B,
“ID length and sector length determination processing” for determining the length L1 of the ID part and the length L2 of the sector shown in FIGS. 2B and 2C.
I do.

In step S4, a write command as a data write instruction is issued. In step S5, a command end signal output from the encoder / decoder 13 which is the designed circuit is waited. This write operation is for avoiding a state in which no data is written when an arbitrary command, for example, a read command is issued in step S6 described later. In step S6, necessary commands are issued in accordance with the contents to be inspected, such as a write command and a read command. In step S7, a command end signal is waited for. In step S8, the command execution result is confirmed. If the check is to be continued, the process branches from step S9 to step S6. If the check is to be completed, the program ends.

Next, the details of each processing of steps S6 to S9 will be described below. For example, when a write command is issued to verify whether data has been written correctly, when the write command is issued in step S6, the encoder / decoder 13 reads the ID section to determine whether or not the ID section is a target sector. If it is determined that the sector is the target sector, the write gate is opened, the write data prepared in advance in the buffer manager model 22 is read, modulated, and output to the disk controller model 241.

At this time, the main routine is in the state of step S7 and waits for the encoder / decoder 13 to output a command end signal. Next, the process proceeds to step S8,
At this time, the process proceeds to step S9 without doing anything, and then branches to step S6 to issue a read command.

When a read command is issued in step S6, the encoder / decoder 13 waits for a target sector and reads data. After this data is demodulated, it is written to a register provided in the buffer manager model 22.

The syndrome data for error correction is stored in a register in the ECCD memory 23. During this time, the main routine waits for a command end signal in step S7. In step S8, in this case, first, in order to check whether the written data and the read data match, the write data in the buffer manager model 22 and the read data that has just been read and stored are described above. Compare.

Further, the data in the ECCD memory 23 is inspected to check the operation of the syndrome generation circuit.
If the results of these inspections are as expected, "OK" is displayed on an output device (not shown) or the like, and "NG" or the like is displayed if they are not as expected. When the inspection is completed, the process branches to the end in step S9. Otherwise, the above-described operation is repeated.

Next, the "initialization processing" of the disk controller model 241 in step S3A of FIG. 3 will be described with reference to the flowchart of FIG.

As shown in FIG. 4, in step S21,
2-7 The ID data for modulation is stored in the ID register, and the user data file is stored in the user data register. In the next step S22, it is determined whether or not a set format has been issued. If the set format has been issued, the process proceeds to the next step S23. In step S23, it is determined whether the set format is 2-7 modulation. As a result of this determination, 2-
In the case of 7-modulation, the ID data for 2-7 modulation is stored in the ID register (step S24). In the case of not 2-7 modulation, the ID data for 1-7 modulation is stored in the ID register ( Step S25), and return to the main routine of FIG.

Next, "I" in step S3B of FIG.
The process of determining the D length and the sector length ”will be described with reference to the flowchart in FIG.

As shown in FIG. 7, in step S61,
A register for setting the length L1 of the ID portion and the length L2 of the sector shown in FIGS. 2C and 2D is initialized according to the 2-7 modulation or the 1-7 modulation. In the next step S62, it is determined whether or not a set format has been issued. If the set format has been issued, the ID section and each sector length corresponding to the format are set in the register (step S63). ), After the end of this set, the process returns to the main routine of FIG.

Next, in step S6 of FIG. 3, when the write command is issued, the disk driver model 24
Will be described with reference to the flowchart of FIG.

As shown in FIG. 5, in step S32,
The operation is monitored to see if the light gate is open. The write gate is a signal output from a circuit (not shown) called a formatter, and is opened when a write command is issued and it is confirmed that the data write area of the rotating recording medium is the target location ("1"). ). If the write gate is open, the process proceeds to the next step S33.

In step S33, the user data file 243 is opened, and in the next step S34, the write data is written to the user data file 243 in synchronization with the write clock.

In this write operation, steps S34 and S35 are executed for each write clock, and as a result, write data is written to the user data file 243 while the write gate is open. In the next step S36, the data of the user data file 243 is written to the user data register. At this point, the write operation is completed, and the process returns to step S32 in preparation for the next write operation.

When the read command is issued in step S6 of FIG. 3, when the position of the sector is determined in the write command, or when no command is issued after the execution of the command, the disk driver The “read processing” executed by the model 24 will be described with reference to the flowchart in FIG.

In step S51, it is determined whether or not the write gate is closed. If the write gate is open, the write operation is in progress, and the data output from the disk is set to "0" (step S55). . If the write gate is closed, the process proceeds to step S52 to perform an operation corresponding to the data reading, and it is determined whether the reading location is in the ID area. In the case of the ID area, the process proceeds to step S53, and the emboss data is read from the emboss data file 242.

On the other hand, if it is not an ID area, it is a data area, so the flow advances to step S54 to read user data from the user data file 243. These processes are executed for each read clock, and data is stored for each bit,
Output in synchronization with the read clock.

Here, in this "reading process", it is necessary to specify the area where the ID is written as shown in FIG. 2A when reading out the data. The “ID area generation processing” for generating an ID area will be described.

In the "ID area generation process", the count value of the invertable counter described later and the length L1 of the ID portion and the sector shown in FIGS. 2C and 2D set as described above are set. , L2, and I shown in FIG.
Generate a D region.

Here, the interval counter is shown in FIG.
As shown in (B), this is a counter for counting the period from the start of a sector mark SM to the start of the next sector mark SM, and the "operation of the interval counter" will be described with reference to the flowchart of FIG.

In step S71, it is determined whether a set format has been issued. If a set format has been issued, the flow advances to the next step S72. In step S72, it is determined whether or not the count value of the counter is the length of the set sector. If the result of this determination is that the count value does not reach the length of the sector, the count value is incremented by one (step S73). As a result, when the count value of the counter reaches the sector length L2,
Proceeding to step S74, the count value of the counter is set to "0", that is, the counter is initialized, and the counter repeats the counting operation from the beginning. The count value generated by the interval counter as described above is used to determine a read position when reading data in the “read processing” illustrated in FIG.

As described above, in this embodiment,
At the time of verifying the operation of the designed encoder / decoder 13, as shown in FIG. 3, each process of reading and writing data is performed dynamically, and the processes are given a predetermined relation. For example, in the case of writing data, when the write gate is closed, it automatically switches to the read operation,
The written data can be read as it is. For this reason, in this embodiment, the operation of the designed encoder / decoder can be verified in an environment that behaves in the same manner as actually reading / writing data from / to a disk. It can contribute to early detection.

[0060]

As described above, in each of the first to fourth aspects of the present invention, an encoder / decoder designed in an environment in which the same behavior as when data is actually read from or written to a disk is obtained. It can be verified and thus contribute to early detection of a bug of the encoder / decoder.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram for describing a verification method of an operation of an encoder / decoder according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining a format and the like of data recorded on a magneto-optical disk.

FIG. 3 is a flowchart of an encoder / decoder verification operation performed by the test bench shown in FIG. 1;

FIG. 4 is a flowchart showing details of an “initialization process” shown in FIG. 3;

FIG. 5 is a flowchart illustrating details of a “writing process”.

FIG. 6 is a flowchart showing details of “read processing”;

FIG. 7 shows “ID length and sector length determination processing” shown in FIG.
6 is a flowchart showing details.

FIG. 8 is a flowchart illustrating an ID area generation process.

FIG. 9 is a flowchart showing the operation of the interval counter.

FIG. 10 is a block diagram illustrating an outline of a configuration of a magneto-optical disk device.

FIG. 11 is a diagram illustrating verification of operation of a conventional encoder / decoder.

[Explanation of symbols]

 13 Encoder / Decoder 21 Test Bench 22 Buffer Manager Model 23 ECCD Memory 24 Disk Driver Model 241 Disk Controller Model 242 Emboss Data File 243 User Data File

Claims (4)

[Claims] 1. An encoder / decoder evaluation method for encoding data to be written on a disk by a disk driver or decoding data read from the disk by the disk driver, comprising: In the above, a disk controller model is connected to the designed encoder / decoder, and the simulator generates a data read / write instruction for the disk model and data accompanying the instruction,
An encoder / decoder evaluation method, wherein the disk controller model is controlled such that the disk controller model dynamically reads and writes the disk model based on the generated instructions and data. 2. The disk controller model according to claim 1, wherein, when writing data to said disk model, immediately after completion of said writing, said written data is output from said disk model. An evaluation method for the described encoder / decoder. 3. The disk controller model receives an output from a counter when reading data from the disk model, and stores prepit data and data other than the prepit data in accordance with a count value of the counter. 2. The method for evaluating an encoder / decoder according to claim 1, further comprising: determining a read position. 4. The device according to claim 1, wherein the simulator is created in a hardware description language.
An encoder / decoder evaluation method according to claim 2 or claim 3.