JP2000278321A - Information reproduction controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To absorb a transfer rate without expanding the scale of the whole device by reading a memory stored with a specific amount of data from a network and outputting them at a constant transfer rate, and stopping supplying data to the network and distributing and outputting data according to the contents when the amount of data stored in the memory exceeds a certain value. SOLUTION: A TS Demux block 2 discriminates between video information and audio information in TS data from a Network I/F module 1 and outputs them to a video decoder 4 and an audio decoder 5. The block 2 is controlled by a CPU 6 to store all the TS data temporarily in an external memory 3 until the data are stored in a prescribed amount, and then reads out and outputs the stored data at the constant transfer rate. When the amount of data stored in the external memory 3 exceeds the certain value, the block 2 stops the data supply of a module 1 and distributes and outputs the data according to the contents. Consequently, the external memory 3 is prevented from overflowing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an information reproduction control device for receiving and reproducing digital information including images and sounds.

[0002]

2. Description of the Related Art Digital satellite systems and digital C
In the ATV or the like, when transferring compressed data, a synchronous transfer method is used in which the transfer rate is constant. In this synchronous transfer method, since the data transfer rate is guaranteed by not performing burst transfer or the like, jitter does not occur at the time of transfer, and as a result, buffering at the time of data reception is unnecessary.

[0003] When transmitting compressed data or the like over a network such as a computer network where the data transfer speed is not guaranteed, jitter occurs due to burst transfer or the like.

Therefore, conventionally, data is transferred on a network whose transfer speed is not guaranteed. Therefore, a high-speed computer network is used to absorb jitter, and the total data transfer rate is reduced to the original network transfer rate. By adding usage restrictions such as 1/4 to 1/5 of the MPEG separation standard (IS
O / IEC13818-1) to prevent defects that exceed the buffer amount defined. FIG. 3 is a block diagram showing a schematic configuration of a conventional information reproduction control device 100.

[0005] As shown in FIG. 3, a conventional information reproduction control device 100 includes a Digitalling Buffer 1 that receives data supplied from a Network I / F module 1 while absorbing jitter.
01 and output from the Digitalling Buffer 101
Video information and audio information are discriminated from TS data and Video de
TS Demux102 output to coder4 and Audio decoder5
And a memory 103 for storing data at the time of processing by the TS Demux 102, and a Digitalling Buffer 101
And the CPU 6 for controlling the operation of the TS Demux 102.

[0006] The TS Demux 102 discriminates video information and audio information, and also deletes a header portion of received TS data. FIG. 4 is a block diagram showing a schematic configuration inside the conventional TS Demux 102. As shown in FIG.

As shown in FIG. 1, a conventional TS Demux 102
Is a data input interface (I / F) unit 121 to which TS data and clock data are input, and a data input I / F
/ F unit 121, receives a data, and determines a control flag included in the TS header. A flag determination unit 123 determines each control data in accordance with the flag determination by the flag determination unit 123.
ME to transfer to memory 103 or CPU I / F 27 for processing
MI / F 122 and separation unit 24 for separating audio and image data
And an audio output I / F 25 and an image output I / F 26 for outputting the audio data and the image data separated by the separation unit 24 to the respective decoders.

[0008] The TS processed by the conventional TSDemux 102
The data usually has a packetized structure in units of 188 bytes. Of the 188 bytes, a 4 byte portion is a header portion including a control flag, and the other 184 byte portion includes audio and image data.

Then, such a conventional TS Demux 102
First, the data input I / F unit 121 checks the SYNC code of the TS header, confirms that the data is configured in units of 188 bytes, detects the header code, and sends it to the flag determination unit 123 in the subsequent stage. I do.

The TS data synchronized with the clock data is 4b
In the case of image or audio in the control flag determination block of the header of yte, the image is transferred to the MEMI / F 122 and transferred to the external memory 103
To accumulate. At this time, the contents of the 4-byte header are the CPU I / F
It can be controlled by the CPU 6 via the unit 27. C
The PU 6 checks whether an error is included in the TS data according to the contents of the header, and determines whether or not to validate the TS data if there is an error.

[0011] Further, the flag determination unit 123
In the TS data, a more detailed control flag (adaptation fie
ld control), the CPU data is notified to the CPU I / F unit 27, and the TS data is transferred to the MEMI / F unit 122.
In this MEMI / F122, the transferred data is stored in memory1
In the memory space 03, the image data is stored in a memory space different from the normal image data and audio data.

On the other hand, in the case of normal audio / video data, a Video decoder connected to the subsequent stage of the TSDemux unit 102
4 and the reception status of the audio decoder 5 is grasped via the CPU 6, and if the reception status is acceptable, the MEMI
The / F unit 122 calls each data from the memory 103 and transfers it to the separating unit 24, separates the audio data and the image data, and outputs them to the video decoder 4 and the audio decoder 5 via the output I / Fs 25 and 26. .

[0013]

However, in the conventional information reproduction control device 100 described above, the TSDemux unit 10
In order to prevent the occurrence of underflow or overflow in the buffer 2, jitter is absorbed by the digital buffer 101, but there is a problem that the scale of the entire hardware is increased by the space of the digital buffer 101.

Therefore, the present invention provides a method for transmitting compressed data and the like.
Provided is an information reproduction control device for reproducing digital data supplied from a network that does not guarantee the transfer rate, capable of absorbing the transfer rate without increasing the scale of the entire device. With the goal.

[0015]

According to the present invention, there is provided a control apparatus for receiving and reproducing data supplied from a network at an irregular transfer rate.
The data received from the network is stored in a memory, and after the memory stores a predetermined amount of data, the data stored in the memory is called and output at a constant transfer rate, and the capacity of the memory is reduced. A memory interface means for monitoring and stopping the supply of data to the network when the storage amount of the memory means exceeds a certain value; and outputting the data output from the memory interface means to an external device according to the contents. A data separating unit that distributes and outputs the data to the interface unit, and a control unit that monitors whether the external output interface unit can receive data, and outputs data from the data separating unit when the external output interface unit can receive the data. It has.

According to such an information reproduction control device, all of the data supplied from the network by the memory interface means is temporarily stored in the memory means, and after a certain amount of data has been stored, the data is output to a subsequent stage at a certain transfer rate. Therefore, jitter due to an irregular transfer rate can be absorbed.

Further, the memory interface means monitors the accumulated amount of the memory means, and when the accumulated amount of the memory means exceeds a predetermined value, stops the supply of data to the network. Can be prevented.

Further, according to the present invention, a buffer for absorbing jitter and a memory for header processing of data can be performed by a single memory means. Therefore, the space corresponding to this can be omitted, and the size of the entire apparatus can be reduced.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Configuration of Information Reproduction Control Apparatus 10)
Hereinafter, embodiments of the present invention will be described in detail. FIG. 1 is a block diagram showing a schematic configuration of an information reproduction control device 10 according to the present embodiment. In the present embodiment, the TS data supplied from the network has a structure packetized every 188 bytes, and 4 bytes out of 188 bytes.
Is a header portion, and the other 184 bytes contain actual data such as images and sounds.

As shown in FIG. 1, the information reproduction control device 10 according to the present embodiment discriminates video information and audio information from TS data which directly receives data supplied from the Network I / F module 1, and (Video decoder) 4
And TS to output to audio decoder (Audiodecoder) 5
It comprises a Demux 2, an external memory (memory) 3 for storing data when processing by the TS Demux 2, and a CPU 6 for controlling the operation of the TS Demux 2.

The external memory 3 is realized by increasing the density of memory elements in recent years, and has a memory size 100 times or more the size required for the MPEG separation standard (ISO / IEC13818-1). . In addition, the TS Demux2
In addition to performing discrimination between video information and audio information, the header part of the received TS data is deleted. Figure 2 shows the TSDe
FIG. 3 is a block diagram showing a schematic configuration inside mux 2.

As shown in FIG. 1, a TS Demux 2 receives a TS data and a clock signal from a data input interface (I / F) block 21, receives TS data from the data input I / F block 21, and receives all the data. MEMI / F block 22 for temporarily storing the data in the external memory 3, a flag determination block 23 for determining a control flag included in the TS header, and a separation block 2 for separating audio and image data.
4 and an audio output I / F 25 and an image output I / F 26 for outputting the audio data and the image data separated by the separation block 24 to the decoders 4 and 5, respectively.

The MEMI / F 22 transfers all TS data received from the network via the data input I / F 21 to the external memory 3 once, and after the external memory 3 accumulates a predetermined amount of data, the external memory 3 And outputs it to the subsequent flag determination block 23 at a constant transfer rate.

The MEMI / F block 2 according to the present embodiment
2 outputs an enable signal for notifying the network whether data can be received. That is, the MEMI / F block 22 monitors the storage capacity of the external memory 3 and outputs an enable signal when the storage capacity of the external memory 3 exceeds a certain value.
In the disable state, the supply of data from the network is stopped to prevent the external memory 3 from overflowing.

The conditions for the occurrence of the overflow and a certain amount of settings for starting the transfer to the subsequent stage can be set by the CPU 6. In this embodiment, for example, in the present embodiment, transfer to the subsequent stage is started at 1/2 of the memory amount of the external memory 3, and the enable signal is disabled at 3/4.
It is set to be in a state.

The flag determination block 23 determines the control flag in the TS data transferred from the MEMI / F block 23, notifies the CPU of the determination via the CPU I / F block 27, and thereafter, This is to delete. The control flag is usually included in the header portion, but may be included in the actual data. The flag determination block 23 detects these control flags. Equation 1 shows an example of the contents of the header portion.

[0027]

(Equation 1) As shown in the equation, this header portion includes information on a sync code, a data error, the head of the actual data (payload) portion, data priority, channel, encryption of the payload portion, detailed control flags, and the like. Have been.

Then, in the flag determination block 23, TS
If there is detailed information (adaptation field control) in the data, this is stored in the external memory 3 via the MEMI / F block 22. At this time, the detailed information is stored in an area other than the memory area where the TS data is stored in the external memory 3, and the content is notified to the CPU 6 via the CPU I / F block 27.

The CPU I / F block 27 transmits a control signal from the CPU 6 to each block in the TSDemux 2 and notifies the CPU 6 of information from each unit. Specifically, the CPU I / F block 27 controls the enable signal by the MEMI / F block 22, controls the external memory 3, manages the control flags by the flag determination block 23, and the like. Further, the CPU I / F block 27 according to the present embodiment
The receivable state of each of the decoders 4 and 5 connected at the subsequent stage of Demux 2 is managed. If the decoders 4 and 5 are receivable, they are output from the separation block 24. This is notified to the MEMI / F block 22 and the call from the external memory 3 is stopped.

(Operation of Information Reproduction Control Apparatus 10) The information reproduction control apparatus 10 configured as described above operates as follows. First, the TS data and the Clock signal supplied from the Network I / F module 1 are directly input to the TSDemux 2, and the TS data determined as the TS data in the data input I / F block 21 is temporarily stored in the memory 3 including the 4-byte control flag. Is done.

Next, when a fixed amount of data (1/2 of the memory amount in this embodiment) is stored in the external memory 3, the data is called from the external memory 3 and a fixed transfer rate is sent to the flag determination block 23 in the subsequent stage. To start output. At this time, all 188 bytes of data in the packet are transferred.

The MEMI / F block 22 manages the amount of data stored in the external memory 3 and, in the case where an overflow is likely to occur in the external memory 3 (in this embodiment, more than 3/4 of the memory amount is stored). If), Networ
The enable signal is set to the disable state to the kI / F module 1 and the CPU 6 is notified to that effect.

The flag determination block 23 deletes the header portion while determining the contents of the control flag, and transfers the data to the audio / image separator 24. At this time, the determination result is notified to the CPU I / F block 22, and if there is detailed information (adaptationfield control) in the header, the flag determination block 23 sends the MEMI / F block 2
2, the TS data is stored in an area different from the memory area where the TS data is stored, and the information is notified to the CPU I / F block 27.

In the separation block 24, the audio output I / F block 25 and the image output I / F block 2 according to the contents of the data
6, the data is allocated to the video decoder 4 and the audio decoder 5 at the subsequent stage.

[0035]

As described above, according to the present invention, in an information reproduction control device for reproducing digital data supplied from a network without a guaranteed transfer rate, such as the transfer of compressed data, the size of the entire device is increased. The transfer rate can be absorbed without performing.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of an information reproduction control device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a schematic configuration of TSDemux according to the embodiment of the present invention.

FIG. 3 is a block diagram showing a schematic configuration of a conventional information reproduction control device.

FIG. 4 is a block diagram showing a schematic configuration of a conventional TSDemux.

[Explanation of symbols]

1 Network I / F module, 2 TSDemux block, 3 memory 4 Video decoder, 5 audio decoder, 6 CP
U 21: Data input I / F block, 22: MEMI / F block 23: Control flag determination block, 24: Audio and image separation block 25: Audio output I / F block, 26: Image output I / F block 27: CPUI / F block

Continued on the front page F term (reference) 5C059 KK08 KK35 MA00 RC02 RC35 SS02 TA71 TB00 TC15 TD12 UA05 UA32 UA37 UA38 5C064 BA01 BB10 BC20 BD08 BD09 5K030 GA06 HA08 HB01 HB02 HB15 HB16 JA01 JA05 KA01 KA02 KA13

Claims (2)

[Claims] 1. The data supplied from a network is
A control device for receiving and playing back data at an irregular transfer rate, wherein said data received from said network is stored in a memory means, said memory means stores a predetermined amount of data, and then calls said data stored in said memory means. Memory interface means for outputting the data at a constant transfer rate, monitoring the capacity of the memory means, and stopping the supply of data to the network when the storage amount of the memory means exceeds a certain value; and A data separating unit that sorts and outputs the data output from the unit to the external output interface unit according to the content thereof; and monitors whether or not the external output interface unit can receive data, and the external output interface unit can receive the data. Control to output data from the data separation means Information reproduction control apparatus characterized by comprising a stage. 2. The information reproduction control device according to claim 1, wherein a header portion of the data received from the memory interface is analyzed between the memory interface and the data separator. Is provided to the control unit, and the header analysis unit deletes the header portion and outputs only the payload portion. The header analysis unit determines that the analyzed data is data requiring special processing. An information reproduction control device for transferring the data to the memory interface and storing the data in a predetermined area of the memory means.