JP2000277494A - Etching method of organic anti-reflection film and manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a base layer to be hardly etched even if a large level difference is present and to lessen a dimensional conversion difference. SOLUTION: When an organic anti-reflection film 106 is subjected to dry etching, it is etched through a resist pattern 107 as a mask using a mixed etching gas of oxygen gas and halogen gas. The mixing ratio of halogen gas to mixed etching gas is lessened before or at a point of time when a WSix film 105 as a base layer of the anti-reflection film 106 is exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for etching an organic anti-reflection film and a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a process for processing an organic anti-reflection film by dry etching. It is suitable.

[0002]

2. Description of the Related Art As is seen in recent VLSIs and the like, as semiconductor devices become more highly integrated and higher in performance, the elements become finer, and the wavelength of exposure light for lithography that determines the minimum line width is determined. However, the wavelength is becoming shorter and shorter. Current,
In the development of a semiconductor integrated circuit, an element having a design rule in the sub-half micron region is targeted. In this case, a reduction projection exposure apparatus (so-called stepper) used is a KrF excimer laser beam (wavelength: 248 nm).
m) is used as a light source, and a lens having an NA (numerical aperture) of about 0.37 to 0.50 is mounted.

In this case, light of a single wavelength is used as an exposure light source. It is widely known that when exposure is performed using light of a single wavelength, a phenomenon called a standing wave effect occurs. The reason why the standing wave is generated is that multiple interference of exposure light occurs in the resist film. That is,
This is because the incident light and the reflected light from the resist / substrate interface cause interference in the resist film.

As a result of this standing wave effect, the amount of absorbed light, which is the energy for photoreacting the resist, changes depending on the resist film thickness. Here, the amount of absorbed light indicates the amount of light absorbed by the resist itself excluding reflection on the resist surface, absorption by the substrate, light emitted from the resist, and the like.

Since the degree of the change in the amount of absorbed light varies slightly depending on the type of the underlying substrate and the level difference on the substrate,
It becomes difficult to control the dimensions of the resist pattern obtained after exposure and development. Such a tendency is common to all resist types, and is a problem that becomes more apparent as the pattern becomes finer.

Therefore, it is indispensable to employ an antireflection film as an effective method for suppressing such a standing wave effect.

[0007] In the patterning of a fine pattern including a gate electrode, the surface reflection and the step in question (e.g., step due to surface reflection and the element isolation insulating film of the upper layer of WSi _x film in a gate electrode made of W polycide) Since it is inevitable, patterning can be said to be extremely difficult in consideration of the standing wave effect as described above. For this reason, a technique of forming an antireflection film before patterning is mainly used. As the material of the antireflection film, an inorganic material and an organic material are known. As inorganic materials, TiN and SiO _x N _y : H are known, and among them, SiO _x N _y : H which can obtain a desired optical constant (n, k) by controlling CVD gas conditions is promising. Have been watched. On the other hand, an organic material contains a dye that absorbs at the exposure wavelength, and can completely eliminate reflection from the base.

[0008]

However, when an antireflection film is provided, there are some problems in the dry etching step.

First, inorganic S is used as a material for the antireflection film.
When iO _x N _y : H is used, since the composition of SiO _x N _y : H is located in the middle of Si, SiO ₂ , and Si ₃ N ₄ , the antireflection film is etched under the Si etching conditions. when release abnormal shape-selectivity of reduction due to the O or the like likely to occur, pattern shift tends to taper in the case of etching of SiO ₂ is increased.

[0010] In contrast, in the case of using an organic antireflection film, the composition of the antireflective film is close to the composition of the resist, the etching of the antireflection film using a gas system consisting mainly of O ₂ There is a problem in that the amount of resist reduction and pattern thinning (isotropic etching) are severe. Therefore, a sidewall protection process by adding halogen used in the multilayer resist etching technique (for example, Japanese Patent Application No. 2-1088752).
Japanese Patent Application No. 4-76598) is currently mainstream.

However, the conventional dry etching technique using the halogen-added etching gas has the following problems. That is, for example, FIG.
As shown in FIG.
Forming a 2 and the gate insulating film 203, a polycrystalline Si film for forming the gate electrode on the entire surface 204 and WSi _x film 205
After forming the, when applied an organic antireflection film 206 on the WSi _x film 205, the step due to the field insulating film 202, a film thickness difference occurs depending on the location in the organic antireflection film 206, the field insulating film It is thin on 202 and thick on the active region. Therefore, the organic antireflection film 2
A resist pattern 207 is formed on the organic antireflection film 20 using the resist pattern 207 as a mask.
6 is etched by dry etching, when the etching is completed, WSi _x film 205 serving as an underlying layer
There will then etching progresses reacts with the halogen in the etching gas, the undercut portion 208 finally occurs etching of the WSi _x film 205 is formed. This is due to the so-called loading effect in which the etchant (halogen) concentrates on the material to be etched (underlying layer) having a limited area, and occurs most immediately after the underlying layer above the step is exposed.

[0012] A similar problem occurs as shown in FIG.
An interlayer insulating film 210 is formed on the entire surface of the Si substrate 201 on which the AM capacitor 209 is formed, and a Ti-based film 21 is formed thereon.
1. After forming the Al alloy film 212 and the Ti-based film 213, an organic anti-reflective film 206 is applied on the Ti-based film 213, and the organic anti-reflective film 206 is
It also occurs when etching is performed using 07 as a mask. That is, due to the step caused by the DRAM capacitor 209,
The thickness of the organic antireflection film 206 varies depending on the location, and D
It is thin on the RAM capacitor 209 and thick on the peripheral circuit. Therefore, a resist pattern 207 is formed on the organic anti-reflection film 206, and the resist pattern 20 is formed.
When the organic antireflection film 206 is etched by dry etching using the mask 7 as a mask, when the etching is completed, the Ti-based film 213 as a base layer reacts with halogen in an etching gas to progress the etching,
Eventually, the Ti-based film 213 is etched, and the undercut portion 208 is formed.

For the reasons described above, there is a strong demand for an organic antireflection film etching method that does not cause the etching of the underlayer and reduces the dimensional conversion difference even when there is a high step.

Therefore, an object of the present invention is to provide a semiconductor device having an underlayer that is not etched even when a high step is formed.
Furthermore, it is an object of the present invention to provide an organic antireflection film etching method capable of reducing a dimensional conversion difference and a method of manufacturing a semiconductor device using such an etching method.

[0015]

Means for Solving the Problems The present inventor has made intensive studies to solve the above-mentioned problems of the prior art. As a result, even when there is a high step, the underlayer is not etched, and in order to etch the organic antireflection film so as to reduce the dimensional conversion difference, the organic reflection of the thin film portion above the step is required. It was found that it is effective to reduce the halogen addition ratio in the etching gas immediately before the end of the etching of the prevention film or simultaneously with the end of the etching. I came up with the invention.

That is, in order to solve the above-mentioned problems, a first invention of the present invention relates to a method for etching an organic anti-reflection film in which an organic anti-reflection film is etched by dry etching. The organic anti-reflection film is etched by dry etching using an etching gas containing a halogen gas so that the addition ratio of the halogen gas in the etching gas is reduced before or at the time when the base layer of the organic anti-reflection film is exposed. It is characterized by having done.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a step of etching an organic antireflection film by dry etching, wherein the organic antireflection film is formed by using an etching gas containing at least an oxygen gas and a halogen gas. Etch the film by dry etching,
Before or at the time when the base layer of the organic antireflection film is exposed, the addition ratio of the halogen gas in the etching gas is reduced.

In the present invention, in order to reduce the addition ratio of the halogen gas in the etching gas before or at the time when the base layer of the organic antireflection film is exposed, most typically, a gas other than the halogen gas is used. Reduce the ratio of the flow rate of the halogen gas to the flow rate. Alternatively, a compound containing carbon as a constituent atom, particularly a gas of an organic compound (for example, a hydrocarbon such as CH ₄ ) is added to the etching gas before or at the time when the base layer of the organic antireflection film is exposed, Nitrogen gas or inert gas (for example, Ar
Gas). When a compound containing carbon as a constituent atom is added as in the former case, the reaction between the underlayer and the halogen is suppressed by generating a deposit by the reaction between the compound and the halogen, thereby suppressing the etching. . When nitrogen gas or an inert gas is added as in the latter case, the halogen concentration is reduced by the effect of dilution by the addition, whereby the reaction between the underlayer and the halogen is suppressed, and the etching is suppressed. .

In the present invention, from the viewpoint of effectively suppressing the etching of the underlying layer of the organic anti-reflection film, the halogen in the etching gas is exposed before or at the time when the underlying layer of the organic anti-reflection film is exposed. Reduce the gas addition ratio to less than 66%. In addition, in consideration of the variation in the etching at the time of dry etching and the influence of other etching parameters, in order to effectively suppress the etching of the underlying layer of the organic anti-reflection film, a margin of a certain addition ratio is expected. Therefore, the addition ratio of the halogen gas in the etching gas is preferably reduced to 61% or less, more preferably to 56% or less, and still more preferably to 50% or less.

Further, in the present invention, from the viewpoint of effectively suppressing the etching of the underlying layer of the organic antireflection film,
More specifically, for example, when the addition ratio of the halogen gas is 6
The organic anti-reflection film is etched by dry etching using an etching gas of 6% or more, and the addition ratio of the halogen gas in the etching gas is less than 66% before or at the time when the base layer of the organic anti-reflection film is exposed. ,
It is preferably reduced to 61% or less, more preferably 56% or less, and still more preferably 50% or less.

The present invention can be applied in principle to a conventional type of plasma processing apparatus. However, from the viewpoints of accelerating the resolution of gas, generating a uniform plasma with a large diameter, and realizing a more precise processing process, the present invention has recently been applied. It is desirable to use an etching apparatus for generating low-pressure and high-density plasma, which has attracted attention.

According to the present invention having the above structure, the addition ratio of the halogen gas in the etching gas is reduced before or at the time when the base layer of the organic antireflection film is exposed. The material to be etched in a limited area, that is, the so-called loading effect in which the halogen as the etchant is concentrated on the underlayer can be prevented, the reaction between the underlayer and the halogen can be suppressed, and the etching of the underlayer can be performed. Can be suppressed. For this reason, the etching of the underlayer does not occur even when the substrate has a high step. In addition, the dimensional conversion difference of the organic antireflection film due to the etching can be reduced.

In the etching of the organic anti-reflection film, the dimension controllability is important as well as the shape. However, in the present invention, a reaction for depositing a halide on the side wall is used. If the line width dimension decreases, it is possible to raise the halogen ratio consciously and adjust the line width to be thicker in the steps until the underlayer is exposed, and finally to achieve the target dimensions. .

[0024]

Embodiments of the present invention will be described below with reference to the drawings. In all the drawings of the embodiments, the same or corresponding portions are denoted by the same reference numerals.

First, a plasma etching apparatus used for dry etching of an organic antireflection film or the like in the embodiment of the present invention will be described. 1 to 3 show examples of a plasma etching apparatus capable of generating high-density plasma.

FIG. 1 shows an RF bias applying type electron cyclotron resonance (ECR) plasma etching apparatus.
As shown in FIG. 1, in this RF bias application type ECR plasma etching apparatus, a microwave generated by a magnetron 11 transmits a monopolar electrostatic chuck onto a wafer stage 14 via a waveguide 12 and a quartz bell jar 13. Fifteen
Is configured to reach the wafer 16 set in the above. A clamp may be used instead of the monopolar electrostatic chuck 15. A solenoid coil 17 is provided so as to surround the quartz bell jar 13. Wafer stage 14
Is connected to a high frequency power supply 18.

FIG. 2 shows a magnetic field confined reactor (MC)
1 shows an R) type plasma etching apparatus. As shown in FIG. 2, in this MCR type plasma etching apparatus, RF of 13.56 MHz is applied to a quartz side wall electrode 19 from a high frequency power supply 18 and discharge is performed using the upper electrode 20 as an anode. Alternatively, a magnetic field is confined by a multipole magnet (not shown) wound around the chamber side wall to form a relatively high-density plasma. Further, by applying a substrate bias of 450 kHz to the wafer stage 14 by the high-frequency power supply 18, the incident ion energy can be independently controlled.

FIG. 3 shows a helicon wave plasma type plasma etching apparatus. As shown in FIG. 3, in this helicon wave plasma type plasma etching apparatus, an RF (1
(3.56 MHz), the solenoid coil 17
A whistler wave (helicon wave) is generated in the source chamber 23 by the interaction with the magnetic field generated by the magnetic field, and the high-density plasma generated as a result of confining the magnetic field by the multipole magnet 24 wound on the chamber side wall is applied to the wafer 16. Is configured to reach.

Although not shown, in any of the plasma etching apparatuses shown in FIGS. 1, 2 and 3,
The wafer stage 14 to which the high-frequency power supply 18 is connected has a structure in which a coolant for temperature control circulates.

Next, the method for fabricating the semiconductor device according to the first embodiment of the present invention, in particular, the step of forming the gate electrode will be described. 4 to 11 show steps of forming the gate electrode.

In the first embodiment, first, as shown in FIG.
After selectively performing thermal oxidation by the OS method to form a field insulating film 102 made of a SiO ₂ film and performing element isolation, the surface of the active region surrounded by the field insulating film 102 is subjected to, for example, a thermal oxidation method. A gate insulating film 103 made of a SiO ₂ film is formed. This gate insulating film 10
The thickness of 3 is, for example, 5 nm. Next, for example, decompression CV
After the polycrystalline Si film 104 is formed on the entire surface by the D method, impurities are doped into the polycrystalline Si film 104 by ion implantation or the like to reduce the resistance. The thickness of the polycrystalline Si film 104 is, for example, 100 nm.

[0032] Next, as shown in FIG. 5, a WSi _x film 105 on the entire surface by, for example, a plasma CVD method. The thickness of the WSi _x film 105 to 100nm for example.

Next, as shown in FIG. 6, WSi _x film 10
5, an organic anti-reflection film 1 by spin coating, for example.
06 is applied. As the organic antireflection film 106, for example, DUV-42 manufactured by Brewer Science is used. The thickness of the organic antireflection film 106 is, for example, 70 nm on the field insulating film 102 and 150 nm on the active region.

Next, as shown in FIG. 7, a resist pattern 10 for forming a gate electrode is formed on the organic anti-reflection film 106 by photolithography using an excimer laser stepper using a KrF excimer laser as a light source.
7 is formed. The width of the resist pattern 107 is, for example, 0.25 μm.

Next, as shown in FIG. 8, the main etching of the organic antireflection film 106 is performed using the resist pattern 107 as a mask under the following conditions, for example, using the RF bias application type ECR plasma etching apparatus shown in FIG. Do. This main etching is performed in the field insulating film 102.
Organic antireflection film 106 of the upper stops at the time when the WSi _x film 105 is etched underlayer was exposed.

Etching gas: O ₂ / Cl ₂ = 20/60 SCCM Pressure: 1.0 Pa Microwave output: 1200 W RF bias: 50 W (800 kHz) Wafer temperature: −20 ° C. Then, the same plasma etching apparatus is switched by step switching. in performed overetching organic antireflection film 106 under the following conditions, as shown in FIG. 9, exposing the organic anti-reflection film 106 on the active region is completely etched WSi _x film 105 serving as an underlying layer Let it. What is important in this over-etching condition is that the addition ratio of Cl _{2 in} the etching gas is lower than that in the main etching.

Etching gas: O ₂ / Cl ₂ = 20/10 SCCM Pressure: 1.0 Pa Microwave output: 1200 W RF bias: 50 W (800 kHz) Wafer temperature: −20 ° C. In the above-described etching of the organic antireflection film 106, WSi _x film 10 by the field insulating film 102 by the step upper
5 at the interface with Cl.
Since lowering the _second addition ratio, the conventional WSi _x film 10
5 is what has been etched in the form of WCl _x or WCl _x O _y, is suppressed by formation of WO _x is promoted, the etching of the results in the underlying layer WSi _x film 105 is not generated. Regarding the dimensions, the etching rate is increased by intentionally increasing the addition ratio of Cl ₂ that contributes to the protection of the side wall during the main etching, and the etching ratio tends to be reduced by decreasing the addition ratio of Cl ₂ in the subsequent over-etching. The organic antireflection film 1
The finished dimensions after etching of No. 06 can be made as intended.

[0038] Thereafter, etching is performed WSi _x film 105 and the polycrystalline Si film 104 under the following conditions using an RF bias application type ECR plasma etching apparatus shown in FIG. 1, for example, as shown in FIG. 10, a predetermined width Polycrystalline Si
Forming a gate electrode of W polycide structure consisting of film 104 and the WSi _x film 105.

Etching gas: Cl ₂ / O ₂ = 80/8 SCCM Pressure: 0.4 Pa Microwave output: 900 W RF bias (main etch): 80 W (800 kHz) (over etch): 30 W (800 kHz) Wafer temperature: 20 ° C. Overetching: 20% Next, by performing, for example, an ashing process, FIG.
As shown in (2), the resist pattern 107 and the organic antireflection film 106 are completely removed.

As described above, according to the first embodiment, the polycrystalline Si film 104 for forming the gate electrode and the WS
forming a i _x film 105 was coated an organic antireflection film 106 on the WSi _x film 105, the resist pattern 107
If the dry etching of the organic antireflection film 106 as a mask, upon reaching by the field insulating film 102 at the interface between the undercoat layer WSi _x film 105 in the step top the addition ratio of Cl ₂ in the etching gas by the decreases, the WSi _x film is absolutely no etching occurs in 105, hardly occurs even pattern shift. Therefore, the polycrystalline Si film 104 and the WSi _x film 1
05 can be patterned to the same width as the resist pattern 107, and a highly accurate fine gate electrode can be formed.

Next, the method for fabricating the semiconductor device according to the second embodiment of the present invention, in particular, the step of forming the gate electrode will be described.

In the second embodiment, first, the steps shown in FIGS. 4 to 7 are sequentially performed as in the first embodiment.

Next, as shown in FIG. 8, the main etching of the organic antireflection film 106 is performed using the resist pattern 107 as a mask under the following conditions, for example, using an MCR type plasma etching apparatus shown in FIG. In this main etching, the organic anti-reflection film 106 on the field insulating film 102 is etched and the underlying layer WS
i _x film 105 is stopped at the time of the exposure.

Etching gas: O ₂ / Cl ₂ = 20/40 SCCM Pressure: 1.0 Pa Source output: 1000 W RF bias: 50 W (450 kHz) Wafer temperature: 0 ° C. Thereafter, by step switching, the same is performed in the same plasma etching apparatus. perform overetching of the organic antireflection film 106 in the condition, as shown in FIG. 9, an organic antireflection film 106 on the active region is completely etched to expose the WSi _x film 105 serving as an underlying layer. What is important in this over-etching condition is that the addition ratio of Cl _{2 in} the etching gas is lower than that in the main etching, and that CH ₄ is added.

Etching gas: O ₂ / Cl ₂ / CH ₄ = 20/20/5 SCCM Pressure: 1.0 Pa Source output: 1000 W RF bias: 50 W (450 kHz) Wafer temperature: 0 ° C. in the etching, WSi _x film 10 in the step top by the field insulating film 102
5 at the interface with Cl.
Since lowering the _second addition ratio, the conventional WSi _x film 10
5 is what has been etched in the form of WCl _x or WCl _x O _y, is suppressed by formation of WO _x is promoted, the etching of the results in the underlying layer WSi _x film 105 is not generated. At this time, since CH ₄ is added to the etching gas during over-etching, CH _x Cl _y
Deposition system polymer occurs (not shown because it is thin), contributes to the suppression of etching of the WSi _x film 105. Regarding the dimensions, CH ₄ was added to the etching gas to form deposits and reduce the thinning where the addition ratio of Cl ₂ in the etching gas was lowered during over-etching, so that thinning was suppressed. The finished dimensions of the system antireflection film 106 after the etching can be made as intended.

The WSi _x Then, for example, using a MCR type plasma etching apparatus shown in FIG. 2 under the following conditions
The film 105 and the polycrystalline Si film 104 are etched, and as shown in FIG.
And a gate electrode having a W polycide structure composed of the WSi _x film 105 is formed.

Etching gas: Cl ₂ / O ₂ = 80/2 SCCM Pressure: 0.3 Pa Source output: 900 W RF bias (main etch): 60 W (450 kHz) (Over etch): 20 W (450 kHz) Wafer temperature: Over 70 ° C. Etching: 20% Next, for example, by performing an ashing process, FIG.
As shown in (2), the resist pattern 107 and the organic antireflection film 106 are completely removed.

As described above, according to the second embodiment, the polycrystalline Si film 104 for forming the gate electrode and the WS
forming a i _x film 105 was coated an organic antireflection film 106 on the WSi _x film 105, the resist pattern 107
The when performing dry etching of the organic antireflection film 106 as a mask, along with upon reaching by the field insulating film 102 in the interface between the WSi _x film 105 in the step upper lowering the addition ratio of Cl ₂ in the etching gas , by which the addition of CH _4, is a base layer of organic anti-reflection film 106 WSi _x film is absolutely no etching occurs in 105, hardly occurs even pattern shift. Therefore, the polycrystalline Si film 104 and the WSi _x film 105 can be patterned in the same width and the resist pattern 107, it is possible to form a highly precise fine gate electrode.

Next, the method of manufacturing the semiconductor device according to the third embodiment of the present invention, in particular, the step of forming an Al wiring in the method of manufacturing a semiconductor device equipped with a DRAM will be described. 12 to 16 show steps of forming the Al wiring.

In the third embodiment, as shown in FIG. 12, first, for example, an SiO 2 substrate is formed on a Si substrate 101 on which a stacked DRAM capacitor 108 is formed.
_An interlayer insulating film 109 composed of _two films is formed, and further, for example, a Ti-based film 110, an Al alloy film 111, and a Ti-based film 11
2 is formed by, for example, a sputtering method.

Next, as shown in FIG.
An organic antireflection film 1 on the surface 2 by, for example, a spin coating method.
06 is applied. As the organic antireflection film 106, for example, DUV-42 manufactured by Brewer Science is used. The thickness of the organic antireflection film 106 is, for example, D
The thickness is 100 nm on the RAM capacitor 108 and 250 nm on the peripheral circuit.

Next, as shown in FIG. 14, for example, KrF
A resist pattern 107 for forming a wiring is formed on the organic antireflection film 106 by a photolithography method using an excimer laser stepper using an excimer laser as a light source. The width of the resist pattern 107 is, for example, 0.25 μm.

Next, as shown in FIG. 14, the main etching of the organic antireflection film 106 is performed using the resist pattern 107 as a mask under the following conditions, for example, using a helicon wave plasma type plasma etching apparatus shown in FIG. Do. This main etching stops when the organic anti-reflection film 106 on the DRAM capacitor 108 is etched to expose the Ti-based film 112 as a base layer.

Etching gas: O ₂ / Cl ₂ = 10/30 SCCM Pressure: 0.5 Pa Source output: 1200 W RF bias: 50 W (400 kHz) Wafer temperature: −10 ° C. Thereafter, the steps are switched to within the same plasma etching apparatus. The organic anti-reflection film 106 is over-etched under the following conditions, and as shown in FIG. 15, the organic anti-reflection film 106 on the peripheral circuit is completely etched to expose the underlying Ti-based film 112. . What is important in this over-etching condition is that the addition ratio of Cl _{2 in} the etching gas is lower than that in the main etching.

Etching gas: O ₂ / Cl ₂ = 10/5 SCCM Pressure: 0.5 Pa Source output: 1200 W RF bias: 50 W (400 kHz) Wafer temperature: −10 ° C. In the above etching of the organic anti-reflection film 106, DR
Ti-based film 11 above step due to AM capacitor 108
2 at the interface with the etching gas
₂ is reduced, so that the conventional Ti-based film 112
Had been etched in the form of TiCl _x
The generation of O _x is suppressed by being promoted, and as a result, etching of the underlying Ti-based film 112 does not occur at all. Regarding the dimensions, the addition ratio of Cl ₂ contributing to sidewall protection is consciously increased during the main etching, and the etching is made thicker.
_Since the etching with a tendency to become thinner is performed by lowering the addition ratio of ₂ , the finished dimension of the organic antireflection film 106 after the etching can be made as intended.

Thereafter, as shown in FIG.
Using a helicon wave plasma type plasma etching apparatus shown in FIG. 1, the wiring layer composed of the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 is etched under the following conditions, and as shown in FIG. Ti-based film 11
0, a wiring made of the Al alloy film 111 and the Ti-based film 112 is formed.

Etching gas: BCl ₃ / Cl ₂ = 20/20 SCCM Pressure: 1.0 Pa Source output: 1200 W RF bias (main etch): 60 W (400 kHz) (over etch): 20 W (400 kHz) Wafer temperature: 20 ° C. Thereafter, an in-line ashing process is performed continuously to the etching of the wiring layer, so that the resist pattern 107 is formed.
And the organic antireflection film 106 is completely removed.

As described above, according to the third embodiment, the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 for forming the wiring are formed, and the organic anti-reflection film is formed on the Ti-based film 112. After coating the film 106, the resist pattern 1
When the organic antireflection film 106 is dry-etched using the mask 07 as a mask, the DRAM capacitor 108
By reducing the addition ratio of Cl ₂ in the etching gas at the time when the interface with the Ti-based film 112 at the upper portion of the step is reached, the etching of the Ti-based film 112, which is the underlying layer of the organic anti-reflection film 106, is stopped. It does not occur at all, and there is almost no dimensional conversion difference. Therefore, the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 can be patterned to have the same width as the resist pattern 107, and a highly accurate fine Al wiring can be formed.

Next, the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention, in particular, the step of forming an Al wiring in the method of manufacturing a semiconductor device equipped with a DRAM will be described.

In the fourth embodiment, first, the steps shown in FIGS. 12 and 13 are sequentially performed in the same manner as in the third embodiment.

Next, as shown in FIG. 14, the main etching of the organic antireflection film 106 is performed using the resist pattern 107 as a mask under the following conditions, for example, using a helicon wave plasma type plasma etching apparatus shown in FIG. Do. This main etching stops when the organic anti-reflection film 106 on the DRAM capacitor 108 is etched to expose the Ti-based film 112 as a base layer.

Etching gas: O ₂ / Cl ₂ = 10/20 SCCM Pressure: 0.5 Pa Source output: 1200 W RF bias: 50 W (400 kHz) Wafer temperature: −10 ° C. Thereafter, the steps are switched to within the same plasma etching apparatus. The organic anti-reflection film 106 is over-etched under the following conditions, and as shown in FIG. 15, the organic anti-reflection film 106 on the peripheral circuit is completely etched to expose the underlying Ti-based film 112. . What is important in this over-etching condition is that the addition ratio of Cl _{2 in} the etching gas is lower than that in the main etching, and that Ar is added.

Etching gas: O ₂ / Cl ₂ / Ar = 10/10/80 SCCM Pressure: 0.5 Pa Source output: 1200 W RF bias: 50 W (400 kHz) Wafer temperature: −10 ° C. In etching, DR
Ti-based film 11 above step due to AM capacitor 108
2 at the interface with the etching gas
₂ is reduced, so that the conventional Ti-based film 112
Had been etched in the form of TiCl _x
The generation of O _x is suppressed by being promoted, and as a result, etching of the underlying Ti-based film 112 does not occur at all. At this time, since Ar is added to the etching gas at the time of over-etching, the Cl concentration is reduced by dilution, which contributes to suppressing the etching of the Ti-based film 112. Also, regarding the dimensions, Ar is added to the etching gas to reduce the O ₂ concentration to reduce the thinning where the addition ratio of Cl ₂ in the etching gas is lowered at the time of over-etching. System antireflection film 1
The finished dimensions after etching of No. 06 can be made as intended.

Thereafter, as shown in FIG.
Using a helicon wave plasma type plasma etching apparatus shown in FIG. 1, the wiring layer composed of the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 is etched under the following conditions, and as shown in FIG. Ti-based film 11
0, a wiring made of the Al alloy film 111 and the Ti-based film 112 is formed.

Etching gas: BCl ₃ / Cl ₂ = 20/20 SCCM Pressure: 1.0 Pa Source output: 1200 W RF bias (main etch): 60 W (400 kHz) (Over etch): 20 W (400 kHz) Wafer temperature: 20 ° C. Thereafter, an in-line ashing process is performed continuously to the etching of the wiring layer, so that the resist pattern 107 is formed.
And the organic antireflection film 106 is completely removed.

As described above, according to the fourth embodiment, the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 for forming the wiring are formed, and the organic anti-reflection film is formed on the Ti-based film 112. After coating the film 106, the resist pattern 1
When the organic antireflection film 106 is dry-etched using the mask 07 as a mask, the DRAM capacitor 108
By reducing the addition ratio of Cl ₂ in the etching gas at the time when the interface with the Ti-based film 112 at the upper portion of the step is reached, the etching of the Ti-based film 112, which is the underlying layer of the organic anti-reflection film 106, is stopped. It does not occur at all, and there is almost no dimensional conversion difference. Therefore, the Ti-based film 110, the Al alloy film 111, and the Ti-based film 112 can be patterned to have the same width as the resist pattern 107, and a highly accurate fine Al wiring can be formed.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, the numerical values, structures, materials, configurations of etching apparatuses, plasma sources,
The etching gas and the like are merely examples, and different numerical values, structures, materials, configurations of etching apparatuses, plasma sources, etching gases, and the like may be used as necessary.

[0069]

As described above, according to the present invention, the organic anti-reflection film is etched by dry etching using an etching gas containing at least an oxygen gas and a halogen gas, and the underlayer of the organic anti-reflection film is formed. Before or at the time of the exposure, the addition ratio of the halogen gas in the etching gas is reduced, so that the etching of the underlayer can be suppressed even when there is a high step, and the dimensional conversion difference is reduced. be able to.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing an RF bias application type ECR plasma etching apparatus used in an embodiment of the present invention.

FIG. 2 shows an MCR used in an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a plasma etching apparatus.

FIG. 3 is a schematic diagram showing a helicon wave plasma etching apparatus used in the embodiment of the present invention.

FIG. 4 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 5 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 6 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 7 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 8 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 9 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 10 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 11 is a sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 12 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 13 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 14 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 15 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 16 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 17 is a cross-sectional view for explaining a conventional method of manufacturing a semiconductor device.

FIG. 18 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

101: Si substrate, 102: Field insulating film, 103: Gate insulating film, 104: Polycrystalline S
i layer, 105 ... WSi _x film, 106 ... organic antireflection film, 107 ... resist pattern, 108 ...
・ DRAM capacitor

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H025 AA00 AB16 DA34 2H096 AA00 AA25 CA06 5F004 BA14 BA20 BB13 BB14 BB22 BD03 CA04 CA06 DA00 DA04 DA11 DA23 DA25 DA26 DA30 DB02 DB09 DB17 DB23 EA22 EA26 EA28 EA30 EB02 5046

Claims (22)

[Claims] 1. An organic anti-reflection film etching method for etching an organic anti-reflection film by dry etching, wherein the organic anti-reflection film is dried using an etching gas containing at least an oxygen gas and a halogen gas. Etching the organic anti-reflection film, wherein the addition ratio of the halogen gas in the etching gas is reduced before or at the time when the base layer of the organic anti-reflection film is exposed. Method. 2. The method according to claim 1, wherein a compound gas containing carbon as a constituent atom is added to the etching gas before or at the time when the underlayer of the organic antireflection film is exposed. The method for etching an organic antireflection film according to the above. 3. An organic material according to claim 1, wherein a nitrogen gas or an inert gas is added to said etching gas before or at a time when a base layer of said organic antireflection film is exposed. Method of etching system antireflection film. 4. The method according to claim 1, wherein the addition ratio of the halogen gas in the etching gas is reduced to less than 66% before or at the time when the base layer of the organic antireflection film is exposed. The method for etching an organic antireflection film according to the above. 5. The method according to claim 1, wherein the addition ratio of the halogen gas in the etching gas is reduced to 61% or less before or at the time when the underlayer of the organic antireflection film is exposed. The method for etching an organic antireflection film according to the above. 6. The method according to claim 1, wherein the addition ratio of the halogen gas in the etching gas is reduced to 56% or less before or at the time when the underlayer of the organic antireflection film is exposed. The method for etching an organic antireflection film according to the above. 7. The method according to claim 1, wherein the addition ratio of the halogen gas in the etching gas is reduced to 50% or less before or at the time when the underlayer of the organic antireflection film is exposed. The method for etching an organic antireflection film according to the above. 8. The organic anti-reflection film is dry-etched by using the etching gas having an addition ratio of the halogen gas of 66% or more, before or before the underlayer of the organic anti-reflection film is exposed. 2. The method for etching an organic antireflection film according to claim 1, wherein the addition ratio of the halogen gas in the etching gas is reduced to less than 66% at the time when the etching is performed. 9. The organic anti-reflection film is etched by dry etching using the etching gas having an addition ratio of the halogen gas of 66% or more, before or before the underlying layer of the organic anti-reflection film is exposed. At this point, the addition ratio of the halogen gas in the etching gas is set to 6
2. The method according to claim 1, wherein the temperature is reduced to 1% or less.
The method for etching an organic antireflection film according to the above. 10. The addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 2. The method for etching an organic antireflection film according to claim 1, wherein the etching rate is reduced to 56% or less. 11. The addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 2. The method for etching an organic anti-reflection film according to claim 1, wherein the etching rate is reduced to 50% or less. 12. A method for manufacturing a semiconductor device having a step of etching an organic antireflection film by dry etching, wherein the organic antireflection film is etched by dry etching using an etching gas containing at least an oxygen gas and a halogen gas. A method of manufacturing a semiconductor device, wherein the addition ratio of the halogen gas in the etching gas is reduced before or at the time when the base layer of the organic antireflection film is exposed. 13. The etching gas according to claim 12, wherein a gas containing a compound containing carbon as a constituent atom is added to the etching gas before or at the time when the underlying layer of the organic antireflection film is exposed. The manufacturing method of the semiconductor device described in the above. 14. The semiconductor according to claim 12, wherein a nitrogen gas or an inert gas is added to the etching gas before or at the time when the underlayer of the organic antireflection film is exposed. Device manufacturing method. 15. The method according to claim 12, wherein the addition ratio of the halogen gas in the etching gas is reduced to less than 66% before or at the time when the base layer of the organic antireflection film is exposed. The manufacturing method of the semiconductor device described in the above. 16. The method according to claim 12, wherein the addition ratio of the halogen gas in the etching gas is reduced to 61% or less before or at the time when the underlying layer of the organic antireflection film is exposed. The manufacturing method of the semiconductor device described in the above. 17. The method according to claim 12, wherein the addition ratio of the halogen gas in the etching gas is reduced to 56% or less before or at the time when the underlayer of the organic antireflection film is exposed. The manufacturing method of the semiconductor device described in the above. 18. An addition ratio of the halogen gas in the etching gas to 50% or less before or at the time when the underlying layer of the organic antireflection film in the etching gas is exposed. The method of manufacturing a semiconductor device according to claim 12. 19. The addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 13. The method of manufacturing a semiconductor device according to claim 12, wherein said method is reduced to less than 66%. 20. The addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 13. The method of manufacturing a semiconductor device according to claim 12, wherein the manufacturing cost is reduced to 61% or less. 21. The addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 13. The method of manufacturing a semiconductor device according to claim 12, wherein said method is reduced to 56% or less. 22. An addition ratio of the halogen gas is 66%.
The organic anti-reflection film is etched by dry etching using the above-mentioned etching gas, and before or at the time when the base layer of the organic anti-reflection film is exposed, the addition ratio of the halogen gas in the etching gas is adjusted. 13. The method of manufacturing a semiconductor device according to claim 12, wherein said method is reduced to 50% or less.