JP2000276302A - Method for converting analog data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To speed up conversion processing for converting plural analog data into digital data. SOLUTION: In starting or a resetting a system, a control part outputs a channel selection signal for specifying a channel 0 as an initial value for executing initial processing and allows an analog multiplexer to output an analog signal corresponding to the channel 0 to start the secure of stable time from the output time of the analog signal. After ending the prescribed initial processing, the control part starts an analog/digital(A/D) converter to convert the analog signal corresponding to the channel 0 into a digital signal (step S1), and after the end of the conversion (step S2), switches the analog multiplexer (step S3), reads out the digital signal converted by the A/D converter, corrects the digital signal (steps S4, S5), converts the corrected signal into a prescribed format (step S6), and writes the converted signal in an external interface part (step S7).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for converting analog data in an information processing device or the like.

[0002]

2. Description of the Related Art Conventionally, in an information processing apparatus or the like, when analog data is input, the analog data is converted into digital data and then post-processed.
FIG. 1 is a diagram illustrating a method of converting analog data into digital data.
1 shows an example of the configuration of a -D conversion device. This A
An analog multiplexer 11 that has a plurality of channels to which analog signals as analog data are input, selects a predetermined channel among these channels, and outputs an analog signal input to the channel;
An analog-to-digital converter (ADC) 12 for inputting an analog signal from the analog multiplexer 11 and converting it into a digital signal, an external interface unit 13 as a user interface, and a control unit (CPU) 14
And registers 15 and 16.

The control unit 14 controls the analog multiplexer 11 and the analog-to-digital converter 12 to convert a plurality of analog signals into digital signals in order, and outputs an output signal from the analog-to-digital converter 12.
In other words, the digital signal is subjected to accuracy correction processing, conversion processing for converting to a user-specified data format, and the like.
This is written in the external interface unit 13 as converted digital data. Then, for example, by reading the digital data written in the external interface unit 13 by the host control unit 20, predetermined processing is executed based on the converted digital data.

FIG. 3 is a flowchart showing an example of a procedure of a conversion process executed by the control unit 14 in order to convert a plurality of analog data into digital data. The channel number set to 16 is shown. When activated, the control unit 14 performs a predetermined initial process and then executes the conversion process of FIG.
The input channel is switched (step S101). That is, a channel selection signal for designating a channel to be selected by the analog multiplexer 11 is set as, for example, channel 0, and is output to the analog multiplexer 11 via the register 16. This allows register 1
6 is set to channel 0, the analog multiplexer 11 selects the designated channel 0, and
And outputs analog data, which is an analog signal inputted to the analog-to-digital converter 12.

When the control section 14 outputs the channel selection signal, it waits for a predetermined stabilization time (step S10).
2) After the stabilization time has elapsed, a conversion start command for instructing the analog-to-digital converter 12 to start a signal conversion process for converting an analog signal into a digital signal is output (step S103). That is, as the analog multiplexer 11 switches channels,
The analog signal input to the analog-to-digital converter 12 is also switched, but since the input impedance is high due to the influence of stray capacitance and the like, the analog-to-digital converter 12 stabilizes until the analog signal reaching the analog signal input terminal of the analog-to-digital converter 12 is stabilized. Even if the signal conversion is performed in step 12, the accuracy of the converted digital signal cannot be ensured. Therefore, the analog multiplexer 1
After a predetermined stabilization time has elapsed since the output of the channel selection signal to the register 1, a conversion start command to the analog-to-digital converter 12 is output to the register 15 to perform signal conversion on the stable analog signal. The accuracy of the digital signal is ensured.

When the conversion start command is input, the analog-to-digital converter 12 starts a signal conversion process for converting an input analog signal into a digital signal.
Then, the control unit 14 outputs, via the register 15, a conversion stop command for instructing the analog-to-digital converter 12 to stop the signal conversion process when a predetermined period of time has elapsed after outputting the conversion start command. (Step S104). When the conversion stop command is input, the analog-to-digital converter 12 stops the signal conversion process.

The control unit 14 reads the converted digital signal from the analog-to-digital converter 12 (step S105), performs correction processing on the digital signal (step S106), and then converts the digital signal into a format specified by the user. The conversion is performed (step S107), and this is written into the external interface unit 13 as digital data (step S108).

As a result, the signal conversion for the analog signal input to channel 0 is completed, and the analog data consisting of the analog signal input to channel 0 has been converted to digital data. Next, the control unit 14 proceeds to step S111, switches the input channel, and outputs a channel selection signal indicating channel 1. As a result, the register 16 is set to channel 1. Next, the control unit 14 waits until a predetermined stabilization time has elapsed (step S112), and outputs a conversion start command to the analog-digital converter 12 when the stabilization time has elapsed (step S113).

Thereafter, the same processing as described above is performed. When the data conversion for the analog data input to channel 1 is completed, the input channel is updated to channel 2 and the processing from step S101 to S108 is performed for channel 2. Similarly, the processes from steps S101 to S108 are similarly performed for each of the channels 3 and thereafter. Then, when data conversion is completed for all n channels of the analog multiplexer 11,
The channel is switched to 0, and this processing is performed for channels 1 to n.
, And a plurality of analog data are sequentially converted into digital data.

[0010]

In the above-described conventional analog data conversion method, as shown in FIG. 3, after the input channels are switched (step S101), the analog digital data is not converted until the stable time elapses. Since a conversion start command to converter 12 cannot be output, control unit 14 is in a standby state during this time. During this standby state, the control unit 14 cannot do anything practically, and it is necessary to ensure the stabilization time, which hinders speeding up.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a method of converting analog data which can be operated at high speed.

[0012]

According to a first aspect of the present invention, there is provided a method for converting analog data, wherein a plurality of analog data are sequentially switched and output by a switching means. After a predetermined stabilization time has elapsed after the switching, the analog data is taken into a converter and converted into a digital signal, and the converted digital signal is adjusted by adjusting means to convert the analog data into a digital signal. In the method for converting analog data into data, when the conversion of the analog data in the converter is completed, the adjustment of the digital signal by the adjustment means is started, and the analog signal is converted by the switching means. It is characterized in that data switching is performed.

According to the first aspect of the present invention, a plurality of analog data are switched by the switching means and output in sequence, and the converter is switched by the switching means, and after a predetermined stabilization time has elapsed, In other words, after the analog data input to the converter, that is, the analog signal is stabilized,
This is read and converted into a digital signal. And
The converted digital signal is subjected to correction and adjustment processing for converting the digital signal into a predetermined format, and is converted into digital data.

At this time, when the conversion of the analog data in the converter is completed, the adjustment processing on the converted digital signal is started by the adjustment means, and the switching of the analog data is performed by the switching means. Therefore, the stabilization time is secured in parallel with the execution of the predetermined adjustment by the adjustment means, and the stability time to be already secured at the time when the adjustment processing by the adjustment means is completed. Since at least a portion has passed, the overall processing time required for conversion to digital data is shortened accordingly.

According to a second aspect of the present invention, in the analog data conversion method, when an initial state is established, the switching means outputs predetermined analog data of the analog data as initial analog data. The conversion of the initial analog data is performed first. According to the second aspect of the present invention, when an initial state such as start-up or reset occurs, the switching means outputs predetermined analog data of the plurality of analog data as initial analog data. Conversion on the initial analog data is performed first. Therefore, since the stabilization time starts from the time when the initial analog data is output by the switching means, for example, when the converter is in the initial state, there is a required time until the converter can be converted. Even in such a case, the stable time of the initial analog data is secured in parallel with the elapse of the required time. Therefore,
At the time when the converter is ready for conversion, at least a part of the stable time to be secured has passed, so the overall processing time required for conversion to digital data is shortened accordingly. become.

[0016]

Embodiments of the present invention will be described below. FIG. 1 shows an example of a configuration of an AD converter provided in an information processing device or the like for converting analog data into digital data. The configuration of the A / D converter 5 is the same as that of the above-described conventional A / D converter 5, and includes an analog multiplexer 11, an analog / digital converter 12, an external interface unit 13, a control unit 14, registers 15 and 16. It is provided with.

The analog multiplexer 11 selects a channel specified by the input channel selection signal, and outputs an analog signal, which is analog data input to the channel, to the analog-to-digital converter 12. The analog-to-digital converter 12 When a conversion start command is input, a signal conversion process for converting an analog signal input from the analog multiplexer 11 into a digital signal is started, and when a conversion stop command is input, the signal conversion process is stopped. Has become. The control unit 14 outputs a conversion start command and a conversion stop command to the analog-to-digital converter 12 via the register 15, and outputs the analog multiplexer 1 via the register 16.
1, a channel selection signal is output, a digital signal converted by the analog-to-digital converter 12 is read, corrected, converted into a predetermined format, and then written to the external interface unit 13 as converted digital data. .

Each of these devices is set to an initial state when a reset signal output from the higher-level control unit 20 is input at the time of starting or resetting.
When the reset signal is input to the control unit 14, the control unit 14 performs predetermined initial processing,
, A channel selection signal indicating channel 0 is output as an initial value, and after the initial processing is completed, a conversion process for converting a plurality of analog data input to the analog multiplexer 11 into digital data is started. It has become.

FIG. 2 is a flowchart showing an example of a processing procedure of the conversion process executed by the control unit 14. The control unit (CPU) is shown in each processing step together with a flowchart.
14 and the register 16 indicate a channel number to be processed. Upon receiving the reset signal, the control unit 14 performs predetermined initial processing, outputs a channel selection signal indicating channel 0 to the register 16, and then starts the conversion processing. First, in step S1, a conversion start command for instructing the analog-to-digital converter 12 to start a signal conversion process for converting an analog signal into a digital signal is output via the register 15, and this conversion start command is output. When a predetermined period of time elapses after the output, a conversion stop command for instructing the analog-to-digital converter 12 to stop the signal conversion processing is stored in the register 1.
5 (step S2). The predetermined time is a time set based on the specifications of the analog-to-digital converter 12, and is a time sufficient for the analog-to-digital converter 12 to convert an analog signal into a digital signal with a predetermined accuracy.

Next, the flow shifts to step S3 to switch the input channel. Here, in the initial state, the register 16 outputs a channel selection signal indicating the channel 0. Therefore, the control unit 14 sends the channel selection signal indicating the channel 1 to the analog multiplexer 11 via the register 16. Output. Next, the process proceeds to step S4 to read a digital signal from the analog-to-digital converter 12, and then proceeds to step S5 to perform a correction process on the read digital signal. The signal is converted into a format designated by the user, and is written into the external interface unit 13 as converted digital data (step S7). This completes the data conversion for channel 0.

Next, the process proceeds to step S11, in which a conversion start command to the analog-to-digital converter 12 is output, and when a predetermined time has elapsed since the output, a conversion stop command to the analog-to-digital converter 12 is output. (Step S12) Then, the process proceeds to step S13 to switch the input channel. That is, if the channel number is 1
And outputs a channel selection signal indicating channel 2.

At step S14, a digital signal is read from the analog-to-digital converter 12, corrected (step S15), converted into a predetermined format (step S16), and converted to digital data as an external interface unit 13. Write to. Since then
The same processing as above is performed, and the processing of steps S1 to S7 is repeated while sequentially updating the channel numbers. When the conversion of the analog signal is completed for all n channels of the analog multiplexer 11, the processing returns to channel 0 again. The conversion of analog data is repeatedly performed for channels 0 to n.

Next, the operation of the above embodiment will be described.
When a reset command from the higher-level control unit 20 is output to each device constituting the A / D converter 5 at the time of start-up or reset, each device that has input this reset command becomes an initial state, The unit 14 executes a predetermined initial process, and outputs a channel selection signal indicating the channel 0 to the analog multiplexer 11 to the register 16 as an initial value.

In response, the analog multiplexer 1
At 1, an analog signal input to channel 0 is output to the analog-to-digital converter 12. Then, when the predetermined initial processing is completed, the control section 14 starts the conversion processing shown in FIG. 2, and first outputs a conversion start command to the analog-to-digital converter 12 (Step S).
1) In response to this, the analog-to-digital converter 12 starts signal conversion processing for converting an analog signal into a digital signal.

Here, the time from when the control unit 14 outputs a channel selection signal instructing the channel 16 to the register 16 as an initial value to when the initial processing in the control unit 14 ends is input to the analog-to-digital converter 12. Assuming that the analog signal to be input is sufficiently longer than the stabilization time required for stabilization, the control unit 14 outputs a channel selection signal indicating channel 0 as an initial value when executing the initial processing. , Control unit 14
At the point when the initial processing is completed and the conversion start command is output, the analog signal input to the analog-to-digital converter 12 is sufficiently stable. Therefore, even if the analog-to-digital converter 12 starts the signal conversion process at this point, the accuracy of the obtained digital signal can be sufficiently ensured.

The stabilization time is calculated based on the circuit configuration up to the analog-to-digital converter 12.
This is the time required for the stability. When a predetermined time has elapsed since the output of the conversion start command, the control unit 14 outputs a conversion stop command (step S2).
Then, the signal conversion processing is stopped.

Next, the control section 14 outputs a channel selection signal indicating channel 1, and in response to this, the analog multiplexer 11 switches the selected channel from 0 to 1 (step S3). Therefore, as shown in FIG. 2, during the period from when the channel 0 is designated as the initial value to when the processing in steps S1 and S2 is performed, the control unit 1
4 and the register 16 both target channel 0, but when the processing of step S3 is performed, the control unit 14 keeps channel 0 as the processing target. Be processed.

Then, the control section 14 reads a digital signal corresponding to channel 0 from the analog-to-digital converter 12, corrects it, converts the format, and writes it as digital data in the external interface section 13 (steps S4 to S7). Thus, the data conversion for channel 0 ends. Then, in the same manner as above, a conversion start command is output to the analog-digital converter 12 (step S11), and after a predetermined time has elapsed, a conversion stop command is output to the analog-digital converter 12 (step S12).

Here, in the process of step S3, the control unit 14 reads the digital signal corresponding to channel 0 from the analog-to-digital converter 12 from the time when the control unit 14 outputs the channel selection signal indicating channel 1. The time required for performing the correction process and the format conversion process and writing the data to the external interface unit 13, that is, the time required for executing the processes of steps S 4 to S 7 is determined by the analog input to the analog-to-digital converter 12. If it is longer than the data stabilization time, the channel selection signal is switched to channel 1 before the controller 14 reads the digital signal corresponding to channel 0 from the analog-to-digital converter 12, so that the controller 14 After the processing of S7 is completed, At the time of executing the management, the analog signal corresponding to the channel 1 input to the analog-digital converter 12 will be have sufficient stability. Therefore, even if the signal conversion processing is started by the analog-to-digital converter 12 at this point, it is possible to sufficiently ensure the accuracy.

Next, the control unit 14 switches the input channel (step S13), and outputs a channel selection signal designating channel 2. As a result, the channel of the analog multiplexer 11 is switched, and an analog signal corresponding to channel 2 is input to the analog-to-digital converter 12. Therefore, as shown in FIG. 2, the control unit 14 processes channel 1, but the register 16 processes channel 2. From this point on, the stability time of the analog signal input to the analog-to-digital converter 12 is reduced. Security will begin.

The control section 14 reads out the digital signal corresponding to channel 1 from the analog-to-digital converter 12 and performs a correction process, a format conversion process, and the like on the digital signal (steps S14 to S16). Thereafter, processing is performed in the same manner as described above, the digital data after format conversion is written to the external interface unit 13, and a conversion start command is output to the analog-to-digital converter 12. Also in this case, similarly to the above, the control unit 14 switches channels in the process of step S13, so that the analog signal corresponding to channel 2 starts to secure a stable time from the time when the analog multiplexer 11 is switched. In addition, while the control unit 14 performs a predetermined process on the digital signal corresponding to channel 1 read from the analog-to-digital converter 12, the analog signal stabilization time is ensured. At the point when the digital data has been written into the external interface unit 13, the analog signal corresponding to channel 2 input to the analog-to-digital converter 12 is sufficiently stable.

Thereafter, in the same manner, the channels are sequentially switched, and data conversion for the channels is performed.
When the data conversion for is completed, the process proceeds to channel 0, where the data conversion is performed. As described above, before reading the digital signal corresponding to the channel m from the analog-to-digital converter 12, the channel of the analog multiplexer 11 is switched to start securing the stabilization time of the analog signal corresponding to the channel m + 1. The control unit 14 reads a digital signal corresponding to channel m from the analog-to-digital converter 12 and performs a predetermined process such as a correction process on the digital signal. In parallel with this, the stabilization time of the analog signal is secured. Therefore, the control unit 14 can start processing the analog signal corresponding to the next channel m + 1 at the time when the processing for the analog signal corresponding to the channel m is completed, and the control unit 14 has a useless waiting time. That can be avoided.

Therefore, since the control unit 14 can be operated efficiently, the entire time required for conversion into digital data can be reduced, and the speed can be increased. Also, at this time, since the stabilization time of the analog signal to the analog-to-digital converter 12 is ensured, the conversion into digital data can be realized without lowering the accuracy.

In the initial processing of the control unit 14, a channel selection signal designating the channel 0 is output as an initial value, and the control unit 14 performs an analog signal corresponding to the channel 0 in the analog-to-digital converter 12 first. Accordingly, by securing the time during which the predetermined initial processing is being executed by the control unit 14 as the stable time of the analog signal, it is possible to further increase the speed.

In the above embodiment, the control unit 14 sets the channel 0 as an initial value in the initial processing.
From the time when the channel selection signal indicating the instruction is output to the time when the initial processing ends and the conversion processing starts, is longer than the stabilization time required for the analog signal input to the analog-to-digital converter 12 to stabilize. Although the case where the length is sufficiently long has been described, if this is not satisfied, for example, a timer is provided, and the elapsed time from when the channel selection signal for setting the initial value is output is measured. The analog-to-digital converter 12 is turned on when the time that the analog signal input to the
A conversion start command may be output.

Similarly, from the time when the control section 14 outputs the channel selection signal, the digital signal is read out from the analog-to-digital converter 12 to perform the correction processing and the format conversion processing, and it is necessary to complete the writing to the external interface section 13. The case where the time is longer than the stabilization time of the analog data input to the analog-to-digital converter 12 has been described. If the time is not satisfied, for example, a timer is provided, and the timer is started when the input channel is switched. At the time when the conversion start command is output to the analog-to-digital converter 12, if the predetermined stabilization time has not elapsed since the timer was started,
It is sufficient to wait until the stabilization time elapses, and to output the conversion start command when the stabilization time elapses.

In these cases, a waiting time is generated in the control unit 14, and this waiting time is a minimum necessary waiting time, and is shorter than a stabilizing time required for stabilizing an analog signal. Therefore, even in this case, the speed can be increased. Further, in the above embodiment, the case where channel 0 is set as the initial value has been described. However, the present invention is not limited to this, and an arbitrary channel can be set.

Further, in the above-described embodiment, a case has been described in which the channels are sequentially switched from 0, but the present invention is not limited to this, and the channels can be switched in any order.

[0039]

As described above, according to the first aspect of the present invention,
According to the analog data conversion method according to the above, while the adjustment unit is performing the predetermined adjustment, a stabilization time of the analog data to be processed next is secured in parallel with the predetermined adjustment. The overall processing time required for conversion to digital data can be reduced, and higher speed can be achieved.

According to the method of converting analog data according to the second aspect, when the initial state is established, the switching means outputs predetermined analog data of the input analog data as initial analog data. West,
Since the converter converts the initial analog data first, until the converter can be converted, it will secure a stable time for the initial analog data in parallel with this. The entire processing time required for conversion to digital data can be shortened accordingly, and higher speed can be achieved.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an example of an AD converter to which the present invention is applied.

FIG. 2 is a flowchart illustrating an example of a conversion process, and an operation explanatory diagram of a control unit 14 and a register 16 in each processing stage of the flowchart.

FIG. 3 is a flowchart showing an example of a conventional conversion process, and a register 1 in each processing stage of the flowchart.
6 is an operation explanatory diagram of FIG.

[Explanation of symbols]

 Reference Signs List 11 analog multiplexer 12 analog-digital converter 13 external interface unit 14 control unit 15, 16 register

Claims (2)

[Claims] 1. A plurality of analog data are sequentially switched and output by a switching means, and after a predetermined stabilization time has elapsed after the switching by the switching means, the analog data is taken into a converter and converted into a digital signal. And converting the analog data into digital data by adjusting the converted digital signal by adjusting means. When the conversion of the analog data in the converter is completed, The method of converting analog data, wherein the adjusting means starts adjusting the digital signal, and the switching means switches the analog data. 2. The switching means outputs predetermined analog data of the analog data as initial analog data when an initial state is established, and the converter performs conversion on the initial analog data first. 2. The method for converting analog data according to claim 1, wherein: