JP2000266841A - Method for removing clutter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove and suppress clutters in a small-scale circuit at high speed by hardware. SOLUTION: Signals belonging to an equal range with a sweeping direction aligned are taken out from discrete radar signals, whereby a received data vector R is formed. A base function vector ψhaving a non-zero part of a sequence of components expressing Doppler echoes and the remaining zero part of components of a value 0 is defined. The received data vector R is loaded to a shift register 22, while the base function vector ψ is loaded to a shift register 24, and an inner product of the vectors is operated with use of a product-sum operation circuit 28. A shift at the time of wavelet transform is executed as a shift operation of the shift register 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clutter removing method for removing unnecessary components such as clutter contained in a radar signal.

[0002]

2. Description of the Related Art A radar detects a position, a speed, and the like of another object (hereinafter, referred to as a "target") by transmitting a radio wave or the like to the surroundings and receiving a reflected wave (echo) from another object. System. A reception signal (hereinafter referred to as a “radar signal”) in a radar includes a time from transmission of a radio wave or the like to reception of a reflected wave, that is, a distance from a target, a transmission direction of a radio wave or the like, or a reception direction of a reflected wave, that is, a target direction. Are associated with each other. Therefore, the radar signal has a “range” indicating the distance to the target and a “sweep” indicating the direction of the target.
Can be grasped as a signal distributed and existing on a two-dimensional space defined by each direction, and such a signal can be displayed on a screen as needed.

[0003] A radar has a two-dimensional system (for mounting on a vehicle, a ship, etc.) that expresses a target direction with one type of angle, and a three-dimensional system (for weather, etc.) with two types of angles. ). In the latter, the radar signal is a signal distributed in a three-dimensional space, but the three-dimensional space can be grasped as a set of two-dimensional spaces obtained by appropriately cutting at a required angle. In this application, the description is made on the premise of a two-dimensional system, but the discussion in the present application and the technical scope of the present invention also apply to a two-dimensional space which is a part of a three-dimensional space assumed in a three-dimensional system. And shall extend.

[0004] In recent radars, it is common that radar signals are digitally processed. For example, an analog radar signal obtained by a radar receiver is converted into a digital signal, and the digitally converted radar signal is stored in a buffer in units of one sweep, and is stored in a two-dimensional memory corresponding to the screen of the display device. In scan conversion memory that provides space,
Write. The display on the display is performed based on a digital radar signal written in the scan conversion memory. Typically, a two-dimensional space defined by the above-described range and sweep directions is displayed on a screen, and the presence or absence and speed of a target are displayed by bright spots, colors, symbols, and the like. The user reads information about a target in the surroundings from the display on the screen and uses the information for a predetermined purpose. For example, in the case of a mobile-mounted radar, the user
Information about a fixed target or a moving target that hinders the operation of the moving object to be mounted is obtained from the radar, and the moving object is operated. Further, depending on the system, a process is also performed in which a user manually selects some of the targets to be displayed or the device automatically selects and tracks the targets.

[0005] When considering such a use form, a particular problem is various noises contained in the radar signal. The radar signal contains noise generally called clutter. For example, when rainfall, snowfall, and the like occur around the radar, reflections caused by raindrops, ice drops, and snowflakes cause clutter (weather clutter). Also, reflections from the ground and the sea surface around the radar become clutter (grand clutter, sea clutter). If such a clutter is included in the radar signal, it will be difficult for the user to read the presence or absence of the target and its behavior from the screen, and it will be difficult for the user to accurately execute the target tracking process. Become. Therefore, conventionally, various proposals have been made on a method of removing or suppressing clutter in a radar signal.

[0006] However, the conventional method has several problems. First, the parametric CFAR (Constan
In a method called “t False Alarm Rate”, it is assumed that the amplitude wave height of the clutter is distributed according to a Rayleigh distribution, a Weibull distribution, or a lognormal distribution. Conversely, in a method called non-parametric CFAR, it is assumed that the amplitude wave height of clutter is substantially random without following any of the Rayleigh distribution, the Weibull distribution, and the lognormal distribution. All of these methods focus on the statistical properties of the amplitude wave height distribution of the clutter, and their application ranges are limited. For example, the effect of the parametric CFAR is small when the amplitude wave height distribution of clutter is unknown or uncertain. In addition, the non-parametric CFAR is generally used for a clutter whose amplitude wave height distribution is known to be, for example, a Weibull distribution.
It cannot have an effect that is superior to AR.

[0007] In recent years, the target detection using the wavelet transform has been studied. In addition to the fact that the conventional clutter elimination method is limited as described above, the localization of the radar signal and its spatial position are considered. Attention is paid to the properties of the periodic structure. That is, a radar signal is a signal existing on a two-dimensional space (including a subspace of a three-dimensional space as described above; the same applies hereinafter) defined by each direction of a range and a sweep, and is a reflected wave (echo) from a target. ) Is located at any place in this two-dimensional space, that is, at the place where the target exists.
Further, the period of this echo in the two-dimensional space varies with time. On the other hand, wavelet transform, the following expression in place of the basis functions e ^-j omega ^t in the Fourier transform

(Equation 1) Using the basis function ψ _{a, b} (t) represented by
To the following formula

(Equation 2) Is a process of converting into a wavelet coefficient T (a, b) in accordance with The wavelet coefficient T (a, b) is calculated by the function f
The spatial frequency = 1 / a component contained in the signal represented by (t) gives the magnitude of the shift b. Thus, the basis functions e ^-j omega ^t is different from the Fourier transform frequency to periodic structure has not handle the varying signal over time for uniformly distributed on the frequency axis, wavelet transform, frequency or periodic structures Can handle signals that change over time. Since the radar signal, particularly the echo contained therein, is a signal whose spatial frequency or periodic structure along the sweep direction changes over time,
In principle, it can be subjected to wavelet transformation as a function f (t).

[0008]

In order to eliminate or suppress clutter in a radar signal by wavelet transform, it is necessary to make the basis function ψ _{a, b} (t) suitable. Until now, a basis function ψ _{a, b} (t) having a plurality of types of frequency components has been defined, and the wavelet transform of the function f (t) as a radar signal is performed using the basis function. In order to realize this, enormous software processing is required, and the wavelet coefficient T
It is also necessary to considerably stop the derivation of (a, b). Therefore, in connection with the development of the clutter elimination method using the wavelet transform, it can be realized with dedicated small-scale hardware, and the arithmetic processing for the wavelet transform can be executed at high speed. This has been required in the past.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and the basis function の_{a, b} (t) is focused on the property of Doppler echo expected from a target.
The purpose of the present invention is to make it possible to implement the wavelet transformation and to devise the processing related to the wavelet transformation and to implement the clutter removal / suppression with a small circuit and at high speed by hardware. And

[0010]

SUMMARY OF THE INVENTION One of the considerations of the present inventor in connection with this object is that echoes from the target generally include Doppler shifts (Doppler echoes) caused by movement of the target relative to radar. When viewed along the sweep direction (that is, when a signal belonging to the same range is extracted from a plurality of adjacent sweeps), the Doppler echo becomes a sine wave or a waveform close to the sine wave.
On the other hand, an unnecessary component represented by clutter can be considered not to exhibit such a waveform.

Based on these findings, in the present invention, the wavelet transform is used as the basis function ψ _{a, b} (t) for the wavelet transform in the present invention. Further, since the Doppler echo generated by the relative movement of the target has a sine wave or a periodic waveform close to the sine wave, a waveform representing the expected Doppler echo, for example, several cycles of the sine wave (about the transmission pulse width). The waveform was used as a part of the basis function ψ _{a, b} (t) (“non-zero portion”), and its value was set to 0 in the rest of the basis function ψ _{a, b} (t) (“zero part").

In the present invention, these Doppler echo wavelet transform and used as the basis function ψ _{a, b (t),} basis functions including zero portion of the non-zero portion and the remainder of the Doppler echo number cycles [psi _{a, b} ( The idea of using t) is combined with a processing technique called discrete wavelet transformation of radar signals. That is, the radar signal to be subjected to the wavelet transform in the present invention exists on a two-dimensional space defined by the range and the sweep direction, and its spatial periodic structure generally changes with time. In addition to having the property of being a signal that
It is a signal discretized along each range and sweep direction.

According to the present invention, a plurality of received data vectors are formed corresponding to each range by extracting signals belonging to the same range while maintaining the arrangement in the sweep direction from the radar signals discretized in this manner. I do. In the present invention, on the other hand, the basis function ψ _{a, b} (t) is also discretized in advance and defined as a basis function vector. The wavelet transform in the present invention is based on a discretized basis function ψ
_{a, b} (t), which is a discrete function f
Wavelet transformation for (t), that is, discrete wavelet transformation.

One of the reasons for using the discrete wavelet transform is that the radar has conventionally employed digital processing of the radar signal and is relatively easy to implement in the radar. Another reason for using the discrete wavelet transform is that the discrete wavelet transform can be realized by repeating the inner product operation. In the present invention, specifically, an inner product of a basis function vector and a received data vector relating to an arbitrary range is obtained, and the result is converted into a sweep belonging to the range relating to the received data vector and corresponding to the current shift amount. The calculation as the processed data for the position to which the data belongs is repeatedly executed while shifting one of the basis function vector and the received data vector in the sweep direction.

[0015] Thus, a discrete wavelet transform with the sweep direction as a shift axis is applied to the radar signal of an arbitrary range, and processed data is generated in which unnecessary components typified by clutter included in the radar signal are removed. can do. Further, by performing the wavelet transform of the radar signal relating to an arbitrary range for each of a plurality of ranges belonging to a predetermined range, processed data can be obtained for at least a part of the two-dimensional space where the radar signal exists. .

In the present invention, as described above, the basis function ψ _{a, b} (t), and thus the basis function vector has a non-zero part and a zero part. The non-zero portion is, for example, a sine wave having the same spatial frequency as the expected Doppler echo, and a portion of about two, three or four wavelengths is divided by 1 / th of the spatial wavelength.
It consists of components obtained by sampling at intervals of about 18 to 1/4. When the number of components of each received data vector, that is, the number of sweeps is N (a natural number of 2 or more), and the length of the non-zero part of the basis function vector, that is, the number of components constituting the non-zero part is M (a natural number), The length of the zero part of the basis function vector is NM.

Here, in calculating the inner product of the basis function vector and the received data vector, it is not necessary to calculate the product of the zero part in the basis function vector and the corresponding component in the received data vector. In other words, even if the calculation is performed, the result is 0 and does not contribute to the value of the inner product. Therefore, when the clutter elimination method according to the present invention is implemented, the number of multiplications required for one inner product operation can be reduced to M, and as a result, the number of multipliers can be reduced or the multiplication in the multipliers can be reduced. Since the number of operations can be reduced, processing for removing and suppressing clutter can be executed at high speed with a small-scale circuit.

As an embodiment of the present invention, the shift in the discrete wavelet transform, that is, the shift in the sweep direction when the inner product operation is repeated, is realized by shifting the received data vector, and by shifting the basis function vector. There is a form to do. Either embodiment can be realized by a basis function memory, a reception data memory, and a product-sum operation unit. The basis function memory is a memory having a plurality of cells provided corresponding to each sweep (however, only a non-zero portion may be used), and is realized by a combination of various registers and latch circuits, a shift register, or a ROM. it can. The reception data memory is a memory having a plurality of cells provided corresponding to each sweep, and can be realized by a combination of various registers and latch circuits or a shift register. The product-sum operation means is means for obtaining the product of the stored contents between each cell of the basis function memory and each cell of the reception data memory, and further obtaining the sum of the products for all cells. , That is, a multiplier provided for each component of the non-zero part of the basis function vector to obtain the product, and a summation unit for summing up the results of the multiplication in each multiplier.

The received data vector is the object of the discrete wavelet transform and changes successively, while the basis function vector represents the expected echo, and it is sufficient to prepare one or several types of echo. From this viewpoint, it is easier to shift the received data vector while holding the basis function vector, especially its non-zero part, in a fixed manner. In such an embodiment, first,
Prior to the calculation of the inner product, the non-zero portion of the basis function vector is stored in the basis function memory so that the component related to the corresponding sweep among the components constituting the non-zero portion of the basis function vector is stored in each cell. Keep it. When performing the discrete wavelet transform, the received data vector related to the target range is stored in the received data memory so that the component related to the corresponding sweep among the components constituting the received data vector is stored in each cell. Initially memorized. Further, the calculation of the inner product is performed by obtaining the product of the stored contents between each cell of the basis function memory and each cell of the reception data memory, and further obtaining the sum of the products for all the cells. The shift when the calculation of the inner product is repeated is performed as a shift of the received data vector by sequentially shifting the components of the received data vector to the next cell on the received data memory.

In a mode in which the shift related to the discrete wavelet transform is realized by shifting the received data vector, the basis function vector may be fixedly stored in a ROM or the like. However, when assuming a plurality of Doppler echoes, in implementing the present invention, while preparing a plurality of basis function vectors corresponding to the assumed Doppler echoes, the discrete wavelet transform process, It has to be repeated by exchanging basis function vectors. Therefore, it is desirable to use a memory that can rewrite the basis function vector at a high speed as the basis function memory.

More specifically, a plurality of basis function vectors are prepared including storage means or setting means other than the basis function memory, and are provided between the shift of the received data vector and the next shift. By rewriting the contents of the basis function memory at high speed, the calculation of the inner product with the received data vector at the same shift position is performed for a plurality of types of basis function vectors. More preferably, both the basis function memory and the reception data memory are shift registers, and by operating the shift register as the basis function memory at a higher speed than the operation speed of the shift register as the reception data memory, the reception data vector is shifted. The contents of the basis function memory are rewritten at high speed until the next shift.

In the inner product operation, at least M multiplications must be performed. These multiplications can be realized using M multipliers provided corresponding to the cell pairs of the basis function memory and the reception data memory.
It is advantageous to reduce the number of multipliers by performing a time-division operation on a smaller number of multipliers in terms of downsizing the circuit. As a form of the time-sharing operation of the multiplier, there is a form in which a pair of cells for supplying the storage contents to a small number, that is, M or less, is switched several times during one shift. is there.

The M multiplications or product-sum operations in the inner product operation may be performed using a memory. When the multiplication is realized by a memory (multiplication memory), the product of a value that can be taken by each component of the basis function vector and a value that can be taken by each component of the received data vector is stored in the multiplication memory. It is stored in an address represented by a combination of a value that each component can take and a value that each component of the received data vector can take. The calculation of the product in the inner product calculation is executed by accessing the multiplication memory at high speed by specifying an address based on a combination of the contents of the corresponding cells in the basis function memory and the reception data memory.

When the product-sum operation is performed using a memory (product-sum operation memory), the sum of products of values that can be taken by the corresponding components of the basis function vector and the received data vector is stored in the product-sum operation memory. Of the components of the basis function vector and the received data vector, the component is stored in an address represented by a combination of possible values of the component for which the product is to be obtained. The product-sum operation in the inner product operation is executed by accessing the product-sum operation memory at a high speed by specifying an address based on a combination of the contents of the corresponding cells in the basis function memory and the reception data memory.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of an apparatus according to an embodiment of the present invention. The device shown in this figure is a device for removing unnecessary components such as clutter from a radar signal obtained by the radar device, and can be used during actual use of the radar device or after use of the radar device. . For example,
The apparatus shown in this figure is built in or attached to a radar apparatus, and radar signals obtained by reception are sequentially input to the apparatus shown in this figure to obtain an image free from clutter and the like. Alternatively, when the radar device is used, the radar signal is stored for an appropriate period, and the stored radar signal is given to the device of FIG.
Play back images without clutter and other effects. The display or reproduction of the video may be performed only for the range of interest, or the clutter removal processing of the present embodiment may be performed for various ranges to obtain a three-dimensional video.

As shown in FIG. 2, the transmission of a radio signal by the radar device and the reception of its reflected wave are called sweeps. The radar device repeats the transmission of the radio signal while gradually changing the transmission direction. The direction in which the transmission direction is changed is called a sweep direction. However, when describing a shift in which the sweep direction is the shift axis in the present application, it is not important whether the azimuth increases or decreases, so that both the sweep direction in the above-described sense and the direction opposite thereto are swept together. Called direction. The elapsed time from the transmission of the radio signal to the reception of the reflected wave corresponds to the distance to the target measured along the propagation direction of the radio signal. Therefore, the elapsed time or the distance is called a range, and the propagation direction of the radio signal is called a range direction.

The received data vector R in FIG. 2 is obtained by discretizing N adjacent (N: a natural number of 2 or more) radar signals, and the same range among the digital radar signals obtained as a result. Are taken out and arranged in the order along the sweep direction. In this embodiment, the received data vector R is subjected to discrete wavelet transform using the basis function vector ψ. The basis function vector ψ is a vector obtained by discretizing the basis function ψ _{a, b} (t). In the present embodiment, 2, 3 or 4 wavelengths of a sine wave having the same spatial frequency as that of the Doppler echo expected to be received from the target are extracted, and this is 1/1 of the spatial wavelength of the Doppler echo.
By sampling at intervals of about 8 to 1/4 and arranging them along the sweep direction, the basis function vector ψ strictly, the non-zero part thereof is derived. Further, the number of components of the basis function vector ψ is set to N as in the case of the received data vector R. If N is sufficiently large, the number of components NM of the zero part in the basis function vector ψ is larger than the number of components M of the non-zero part for 2, 3 or 4 wavelengths in the sine wave representing the Doppler echo. In the present embodiment,
The values of the components of the basis function vector ０ other than the portion indicating the sine wave representing the Doppler echo are set to 0 values. That is, the basis function vector ψ includes a non-zero portion that gives a sine wave representing a Doppler echo and a zero portion in which each component has a zero value.

The A / D converter 10 in FIG. 1 is means for converting an analog radar signal into a digital signal, that is, means for discretizing and quantizing the radar signal. The buffer 12 provided at the subsequent stage temporarily stores the radar signal converted into the digital signal for at least N sweeps (for example, for one scan). Inner product operation circuit 14
Receives signals related to a range specified in a predetermined order or from the outside from the radar signals on the buffer 12. That is, the received data vector R related to the range is input. On the other hand, a basis function vector creation (storage) circuit 16
Creates and stores a basis function vector ψ. However, the creation may be performed in advance offline and the basis function vector creation (storage) circuit 16 may store the result. The buffer 18 provided at the subsequent stage temporarily stores the basis function vector ψ stored by the basis function vector creation (storage) circuit 16 and
4 Basis function vector creation (storage) circuit 16
Stores several types of basis function vectors ψ,
The buffer 18 is a basis function vector creation (storage) circuit 1
6, one of which is specified in a predetermined order or externally received, and is set as a basis function vector ψ to be subjected to an inner product operation, by an inner product operation circuit 14.
To supply. The inner product calculation circuit 14 calculates the inner product of the received data vector R and the basis function vector ψ, and supplies this to the display 20 and the like as a radar signal from which clutter and the like have been removed.

In this embodiment, the discrete wavelet transform of the radar signal is realized by the inner product operation of the received data vector R and the basis function vector ψ. The inner product operation circuit 14 for executing the inner product operation has two shift registers 22 and 24 as shown in FIG. The shift register 22, which is a reception data memory, is composed of N cells each holding one component of the reception data vector R. The reception data vector R input from the input terminal Sina is stored in units of one component and a shift clock. In synchronization with CKa, the cell is shifted from the 0th cell to the first cell, to the next cell, and so on. The component output from the (N-1) th cell via the output terminal Souta is temporarily stored in the buffer 26, and is re-input from the input terminal Sina as appropriate. On the other hand, the shift register 24, which is a basis function memory, is composed of N cells each holding one component of the basis function vector ψ, and the basis function vector 入 力 input from the input terminal Sinb is in units of one component and In synchronization with the shift clock CKb, the data is shifted from the 0th cell to the first cell, to the next cell, and so on. Note that each cell constituting the shift registers 22 and 24 can be realized by, for example, a latch circuit or the like.

The inner product operation circuit 14 further has a product-sum operation circuit 28 and a clock generation circuit 30. The clock generation circuit 30 generates clocks CKa and CKb and supplies them to the corresponding shift register 22 or 24. The clocks CKa and CKb have different speeds and generation timings.

For example, initially, N clocks CKb or a predetermined load signal is generated and supplied to the shift register 24. As a result, the basis function vector ψ is loaded from the buffer 18 into the shift register 24. Thereafter, the operation of generating the clock CKa and sequentially applying the clock CKa to the shift register 22 is repeated to load the received data vector R from the buffer 12 to the shift register 22 and shift the loaded received data vector R along the sweep direction ( Shift in the wavelet transform).

When the basis function creation (storage) circuit 16 stores a plurality of basis function vectors ψ, while the received data vector R is at a certain shift position on the shift register 22, the speed is higher than that of the clock CKa. Clock CK
By generating b, it is also possible to replace the basis function vector 上 の on the shift register 24 with another basis function vector 、, so that during one shift (while one clock CKa is generated) For one kind of radar signal, a plurality of different basis functions 基底
Wavelet transformation using _{a, b} (t) can be executed in parallel.

In the example shown in FIG.
It is composed of (M: natural number, but smaller than N) multipliers 32 and adders 34. Each of the multipliers 32 is provided corresponding to M adjacent cells among the cells of the shift register 24, and calculates the product of the components on the corresponding cells of the shift registers 22 and 24. The adder 34 inputs the products obtained by the M multipliers 32, calculates the sum Σ of them, and outputs the sum Σ to the display 20 or the like. The product-sum Σ is the processed data for the two-dimensional position determined by the range in which the inner product operation was performed and the shift position (sweep) at which the inner product was obtained;
That is, the data is treated as data from which clutter or the like has been removed or suppressed.

M is the length of the above-mentioned non-zero part. Correspondingly, M cells provided with the multiplier 32 are cells to which the non-zero part of the basis function vector ψ is loaded. It is. That is, since the value of the component in the zero part is 0, even if the multiplier 32 is provided corresponding to the cell related to the zero part, the product is always 0. Therefore, the output of the multiplier 32 is added to the adder. Even if supplied to 34, it does not contribute to the value of the inner product at all. Therefore, in the present embodiment, the multiplier 32 is provided only for a cell to which a component belonging to the non-zero part of the basis function vector ψ is loaded.

The product-sum operation circuit 28 can be modified to the form shown in FIG. In this figure, as a member corresponding to the multiplier 32 in FIG.
2a is provided, and a portion corresponding to the adder 34 in FIG. 3 is realized by cascade connection or tree connection of the plurality of adders 34a. Multiplication memory 32a
Is obtained by using a combination of a value (for example, 16 bits) that the component Ri of the received data vector R can take and a value (for example, 16 bits) that the component ψi of the basis function vector ψ can take as an address (for example, 32 bits). ,
This is a memory configured to output the product of these values as data, and can be realized in the form of a ROM. Each adder 34a adds together the values input from the two input devices, ie, the multiplication memory 32a or the previous adder 34a, and adds the result to the subsequent adder 34a, or
In the case of the adder 34a at the last stage, it is output to the display 20 or the like. If M is relatively small, the product-sum operation circuit 28 can be realized by a single product-sum operation memory 36 as shown in FIG. The product-sum operation memory 36 combines the value of the non-zero part in the basis function vector ψ with the value of the part of the received data vector R on the cell corresponding to the non-zero part of the basis function vector ψ,
This is a memory configured to output a sum of products when accessed using the address. When only one type of basis function vector ψ is used, the product is obtained when the received data vector R is accessed using only the value of the portion on the cell corresponding to the non-zero portion of the basis function vector と し て as the address. It may be configured to output the sum.

The portion for obtaining the product in the product-sum operation circuit 28 may have the configuration shown in FIG. In the circuit shown in this figure, a product-sum clock CK is input from outside the product-sum operation circuit 28, for example, from a clock generation circuit 30. The product-sum clock CK is a clock that determines the speed of obtaining the product sum, that is, the inner product, and thus determines the cycle of one shift in wavelet transform. Product-sum clock CK
Is divided by n by a frequency divider 38 (n: a natural number equal to or less than M). The frequency divider 38 generates n types of signals obtained by dividing the product-sum clock CK by n. That is, as shown in FIG. 7 in the case of n = 4, the first cycle of the product-sum clock CK,
The clock CK1 that goes low at the..., The second and sixth cycles of the product-sum clock CK (not shown), the clock CK2 that goes low at the..., And the third and seventh cycles of the product-sum clock CK ( , And a clock CK4 that goes low in the 0th cycle, the fourth cycle,... Of the product-sum clock CK.

In the circuit shown in FIG. 6, a buffer 40 for temporarily storing the component Ri of the received data vector R and a buffer 4 for temporarily storing the component ψi of the basis function vector ψ
2 are provided for a total of n pairs. Each of the buffers 40 is connected to a bus 44, and each of the buffers 42 is connected to a bus 46. The buses 44 and 46 are connected to a multiplication memory 32a, and the multiplication memory 32a is connected to n buffers 50 via a bus 48. The i-th clock CKi (i = 1, 2,... N) of the n clocks output from the frequency divider 38 includes buffers 40 and 42 corresponding to the i-th component Ri or ψi, and n
Are supplied to the i-th one of the buffers 50. Buffers 40 and 42 receive the corresponding clock CK
When i falls, the shift register 22 or 24
Latches and temporarily stores the component Ri or $ i supplied from, and specifies an address determined by the values of these components Ri and $ i via the bus 44 or 46. The multiplication memory 32a sends the data stored at the designated address, that is, the data indicating the product of the two components, to the bus 48. The buffer 50 latches and temporarily stores this data when the corresponding clock CKi rises.

Therefore, the buses 44 and 46, the multiplication memory 3
2a and the bus 48 are used or occupied in a time sharing manner by n pairs of components Ri and ψi. As compared with the configuration in which the multiplication memory 32a is provided for each pair as shown in FIG. 4, the number of the multiplication memories 32a is reduced to 1 / n. Therefore, depending on the type of device that implements the multiplication memory 32a, the effect of reducing the number of multiplication memories 32a can reduce the circuit scale.
In some cases, the effect of increasing the circuit scale due to the provision of the buffers 40, 42, 50, etc. is negated and the circuit scale can be reduced as a whole. The supply destination of the data temporarily stored in the buffer 50 is, for example, the adder 34 as shown in FIG. 3 in the case of n = M. In the example where n <M, n pairs of components Ri
And an adder 34a (the one at the forefront in FIG. 4) provided corresponding to .DELTA.i.

FIGS. 8 to 10 show the results of the simulation by the inventor. The horizontal axis in each figure is the sweep number, that is, the number assigned to each sweep in FIG. 2, and corresponds to the azimuth. The sweeps targeted for the simulation are the first to 512th sweeps. The vertical axis in each figure indicates the value of each component of the received data vector R or the processed data by voltage.

The simulation by the inventor was performed on the assumption that the received data vector R was transformed into an analog form for easy understanding and represented graphically in FIG. In the figure, the DC waveforms appearing in the first to 100th sweeps are clutter, and the waveforms close to the sine wave appearing before and after the 400th sweep are Doppler echoes from the target, , The spike-like waveform appearing near the 260th position is noise. Further, Gaussian noise with a standard deviation of 0.2 is added for all sweeps. If a radar signal as shown in this figure is used for display or the like as it is, there is a possibility that spike-shaped waveforms appearing at the 220th, 260th, etc. may be mistaken for echoes from the target. Further, when the echo from the target is weak, the echo may be buried in noise corresponding to Gaussian noise added in the simulation.

The basis function vector ψ used in this simulation can be represented by an analog graph as follows:
This is as shown in FIG. Here, a waveform corresponding to two wavelengths of a sine wave having the same frequency as the expected Doppler echo is used. Further, the spatial frequency of the sine wave is matched with that of the fundamental wave component of the Doppler echo in FIG. 8 in order to verify the effect of removing unnecessary components. The non-zero portions occupied by this waveform are first to fourth.
Only the eighth sweep, the remaining sweeps are null parts. Therefore, when the circuit of FIG. 4 is used, 48 multiplication memories 32a are necessary, and when the circuit of FIG. 6 is used with n = 4, the number of multiplication memories 32a may be 12 pieces.

In both the case of using the circuit of FIG. 4 and the case of using the circuit of FIG. 6, the processed data obtained as the output of the inner product calculation circuit 14 has the contents shown in FIG. . Compared with the data before processing shown in FIG. 8, that is, the received data vector R, first, the clutter waveform (DC) in FIG. 8 is almost eliminated (however, unnecessary in the sweep corresponding to the start and end of the clutter). In this embodiment, second, spike-like noise is almost completely removed, third, Gaussian noise is almost completely removed, and fourth, Doppler echo is emphasized. The advantages are clear.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an apparatus according to an embodiment of the present invention.

FIG. 2 is a conceptual diagram showing a relationship between a sweep and a range in a radar.

FIG. 3 is a block diagram illustrating an example of a configuration of an inner product operation circuit according to the embodiment.

FIG. 4 is a block diagram illustrating an example configuration of a product-sum operation circuit according to the embodiment;

FIG. 5 is a block diagram illustrating an example configuration of a product-sum operation circuit according to the embodiment;

FIG. 6 is a block diagram illustrating an example configuration of a product-sum operation circuit according to the embodiment.

FIG. 7 is a timing chart showing the timing of a clock output from a frequency divider.

FIG. 8 is a diagram in which a received data vector used in the simulation is drawn as a waveform.

FIG. 9 is a diagram illustrating a basis function vector used in the simulation as a waveform.

FIG. 10 is a diagram showing a result of a simulation.

[Explanation of symbols]

10 A / D converter, 12, 18, 26, 40, 42,
50 buffer, 14 inner product operation circuit, 16 basis function vector creation (storage) circuit, 20 display, 22, 24
Shift register, 28 product-sum operation circuit, 30 clock generation circuit, 32 multiplier, 32a multiplication memory, 3
4, 34a adder, 36 product-sum operation memory, 38
Frequency divider, R received data vector, ψ basis function vector, length of N basis function vector and received data vector, length of non-zero part of M basis function vector, Σ inner product (product sum).

Continued on the front page F term (reference) 5J070 AA14 AB01 AC01 AC02 AC13 AH01 AH02 AH13 AH20 AH23 AH31 AH33 AH50 AJ05 AJ10 AJ14 AK16 AK28 AK40 BA01 BG01 BG06 BG11

Claims (9)

[Claims] The present invention resides in a two-dimensional space defined by a range and a sweep direction, is discretized along the range and a sweep direction, and generally has a spatial periodic structure that changes over time. By extracting from the radar signal those belonging to the same range while maintaining the arrangement in the sweep direction, a plurality of received data vectors are formed corresponding to each range, and a series of Doppler echoes expected to be received from the target are generated. A basis function vector having a non-zero part composed of components and a residual zero part composed of components whose values are 0 is defined, and an inner product of the basis function vector and a reception data vector relating to an arbitrary range is obtained. The result is processed data for a position belonging to the range related to the received data vector and belonging to the sweep corresponding to the current shift amount. Is repeated while shifting one of the basis function vector and the received data vector in the sweep direction.Thus, the discrete wavelet transform with the sweep direction as the shift direction is performed on the radar signal according to an arbitrary range, Thus, a clutter removing method characterized by generating post-processing data from which unnecessary components typified by clutter included in the radar signal are removed. 2. The clutter elimination method according to claim 1, wherein the wavelet transform of the radar signal relating to an arbitrary range is performed for each of a plurality of ranges belonging to a predetermined range, whereby the two-dimensional space in which the radar signal exists is obtained. A method for removing clutter, wherein at least a part of the post-processing data is created. 3. The clutter elimination method according to claim 1, wherein prior to the calculation of the inner product, a non-zero value of the basis function vector is stored in a basis function memory having a plurality of cells provided for each sweep. The non-zero part of the basis function vector is stored so that the component related to the corresponding sweep among the components constituting the part is stored in each cell, and when performing the discrete wavelet transform, the Initially, the received data vector related to the target range is stored on the received data memory having a plurality of cells so that the component related to the corresponding sweep among the components constituting the received data vector is stored in each cell. The inner product is calculated by calculating the product of the stored contents between each cell of the basis function memory and each cell of the reception data memory, and further calculating all the cells. The shift when repeating the calculation of the inner product is performed by successively shifting the components of the received data vector to the next cell on the received data memory. A clutter removing method, which is performed as a shift. 4. The clutter removing method according to claim 3, wherein a plurality of basis function vectors are prepared including storage means or setting means other than the basis function memory, and after the received data vector is shifted, Until the shift, the contents of the basis function memory are rewritten at high speed, so that the calculation of the inner product with the received data vector at the same shift position is performed for the plurality of types of basis function vectors. Clutter removal method. 5. The clutter removing method according to claim 4, wherein the basis function memory and the reception data memory are both shift registers, and the shift register as the basis function memory is operated at a speed higher than the operation speed of the shift register as the reception data memory. A clutter elimination method characterized by operating to rewrite the contents of a basis function memory at high speed between the time when a received data vector is shifted and the time when the received data vector is next shifted. 6. The clutter elimination method according to claim 3, wherein a process of obtaining a product of storage contents between each cell of the basis function memory and each cell of the reception data memory is performed,
A clutter removing method, which is performed by a time-division operation of a number of multipliers smaller than the number of cells. 7. The clutter elimination method according to claim 6, wherein a process of calculating a product of storage contents between each cell of the basis function memory and each cell of the reception data memory is performed,
A clutter elimination method, wherein the method is executed by the multiplier while switching cells related to the input to the multiplier at a higher speed than the shift. 8. The clutter elimination method according to claim 3, wherein a product of a value that can be taken by each component of the basis function vector and a value that can be taken by each component of the received data vector is calculated based on the basis. A multiplication memory stored at an address represented by a combination of a value that each component of the function vector can take and a value that each component of the received data vector can take is prepared, and each cell of the basis function memory is prepared. And a process of obtaining the product of the stored contents between each cell of the received data memory and
A method for removing clutter, which is performed by accessing the multiplication memory with an address given by a combination of the contents of both cells. 9. The clutter elimination method according to claim 3, wherein a sum of products of values that can be taken between corresponding components of the basis function vector and the received data vector is represented by a basis function vector and a received data. A product-sum operation memory stored at an address expressed by a combination of components for which a product is to be obtained among vector components is prepared, and the correspondence between the basis function memory and the reception data memory is provided. The process of calculating the sum of the products between the stored contents of the cells
A method for removing clutter, which is performed by accessing the product-sum operation memory with an address given by a combination of the contents of both cells.