JP2000250453A - Image display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image display device which consists of a small number of components and is minutely adaptive to frequency variation. SOLUTION: An arithmetic circuit 107 receives data directly from a video circuit 105 and a deflecting circuit 106, performs operation so as to obtain the best linearity for a received video signal according to the video signal and deflecting current waveform data, and sends the data to a timing control circuit 103 in a host system 101. The timing control circuit 103 controls the timing signal received from the arithmetic circuit 107 and sends it to a video circuit. A video circuit 102 outputs the video signal to be displayed in the signal timing of the best linearity for the signal received from the timing control circuit 103.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image display device, and more particularly to an image display device which controls the timing of a video signal output from a host system to correct both horizontal and vertical linearity.

[0002]

2. Description of the Related Art As shown in FIG. 2, a conventional image display device, in the case of a linear coil system, comprises a video circuit 204 and a deflection circuit 205 having a linearity correction function formed of a deflection circuit and a linear coil. As shown in FIG. 3, in the case of the image processing method, an image memory and a line memory are used.
It comprises a linearity correction image processing circuit 303 formed by a D / A converter, a video circuit 305, and a deflection circuit 306.

In the operation of this conventional image display device, in the case of a linear coil system, first, a video signal is input to a video circuit. The deflection circuit is corrected by a linear coil having a linearity correction function so that the linearity of the video signal is optimized.

Second, in the image processing method, a video signal is input to a linearity correction image processing circuit. The video signal is corrected in the linearity correction image processing circuit so as to have an optimum linearity according to the characteristics of the deflection circuit.

Therefore, both methods have a linearity correction circuit inside the display means, and the screen linearity is determined by a predetermined correction characteristic.

[0006]

However, in the conventional image display device, the linear coil system cannot correct linearity only with a predetermined characteristic, cannot follow a change in frequency, etc., and uses a plurality of linear coils. Even if the frequency is switched to follow the frequency, the linear coil cannot be switched only in steps, so that there is a problem that sufficient correction cannot be performed.

Further, in the conventional image display device, the linear coil system has a large variation in the characteristics of the linear coil, the screen linearity has a large variation, and in the image processing system, the number of components in the display means is increased and the cost is increased. There was a problem that it became high.

An object of the present invention is to provide an image display device which has a small number of parts and realizes a precise response to a frequency change.

[0009]

In order to solve the above-mentioned problems, an image display apparatus according to the present invention provides a video circuit for outputting a video signal based on a synchronizing signal, and each video circuit is generated according to the frequency of the synchronizing signal. A host system having a timing control circuit for transmitting the timing of a linear video signal obtained by inverting the nonlinear deflection current waveform data to the video circuit; a video circuit for processing a video signal output from the video circuit of the host system; A deflection circuit for setting a display position in synchronization with a synchronization signal output from the video circuit, and an arithmetic circuit for calculating a signal timing for correcting nonlinear linearity based on the output signal from the deflection circuit and the video circuit; Display means comprising a display element for displaying the video signal based on the signal timing calculated by the arithmetic circuit; and And characterized in that it is configured.

[0010]

Next, an image display device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an image display device according to an embodiment of the present invention.

As shown in FIG. 1, an image display device according to an embodiment of the present invention includes a video circuit 102 for outputting a video signal based on a synchronization signal, and a non-linear deflection circuit generated according to the frequency of the synchronization signal. A host system 101 having a timing control circuit 103 for transmitting the timing of a linear video signal obtained by inverting the current waveform data to a video circuit 102, and a video circuit 10 of the host system 101
Circuit 105 for processing the video signal output from the second
A deflection circuit 106 for setting a display position in synchronization with a synchronization signal output from the video circuit 102; and a signal timing for correcting nonlinear linearity based on output signals from the deflection circuit 106 and the video circuit 105. And a display element 1 for displaying a video signal based on the signal timing calculated by the arithmetic circuit 107
08 and a display means 104 having

Next, the operation of the image display device according to one embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 1, the operation of the image display device according to the embodiment of the present invention is as follows.
The host system 101 inputs data directly from the video circuit 105 and the deflecting circuit 106, and performs an arithmetic operation based on the video signal and the deflection current waveform data sent from the arithmetic circuit 107 so as to obtain optimum linearity for the signal. The timing control circuit 103 controls the timing signal received from the arithmetic circuit 107 and causes the video circuit to transmit the data, and the video circuit 102 optimizes the signal received from the timing control circuit. The video signal to be displayed is output according to the signal timing of the linearity.

Therefore, the horizontal and vertical linearity can be corrected without using an S-shaped capacitor or switching a linear coil as in a conventional image display device, and an image on a display element such as a display element can be corrected. Is always set with appropriate linearity and can provide a comfortable use environment for users.

[0016]

As described above, according to the image display apparatus of the present invention, the linearity is corrected not by the display device monitor but by the video output signal of the host system, so that the linear coil can be added to the display device monitor. Eliminates the need to mount an S-shaped capacitor, reduces the cost of the display means, and corrects the linearity with the video output signal from the host system. There is an effect that can be done.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image display device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional image display device.

FIG. 3 is a block diagram of a conventional image display device.

[Explanation of symbols]

 Reference Signs List 101 Host system 102 Video circuit 103 Timing control circuit 104 Display means 105 Video circuit 106 Deflection circuit 107 Operation circuit 108 Display element

Claims (1)

[Claims] 1. A video circuit for outputting a video signal based on a synchronization signal, and a timing of a linear video signal obtained by inverting nonlinear deflection current waveform data generated in accordance with the frequency of the synchronization signal is transmitted to the video circuit. A host system having a timing control circuit, a video circuit for processing a video signal output from a video circuit of the host system, and a deflection circuit for setting a display position in synchronization with a synchronization signal output from the video circuit. ,
Based on the output signal from the deflection circuit and the video circuit,
Display means comprising: an arithmetic circuit for calculating a signal timing for correcting nonlinear linearity; and a display element for displaying the video signal based on the signal timing calculated by the arithmetic circuit. Image display device.