JP2000242560A - Address translator - Google Patents

Abstract

(57) [Problem] To set an address of a real storage device larger than an address of a virtual storage space, and to provide an operating system operating on a computer system in which the capacity of the real storage device does not exceed the capacity of the virtual storage space. It is to operate as it is. A virtual storage is provided by using a first address conversion table for a real storage device having a capacity equal to or less than a virtual storage space and another second address conversion table as an address conversion table. The object is achieved by providing means for generating a real address of a real storage device having a capacity larger than a space.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an address translation device for converting an address in a virtual storage space into an address in a real storage device, and more particularly to an address conversion device for a computer system of a real storage device having a larger capacity than the virtual storage space. The present invention relates to an address translation device that performs translation.

[0002]

2. Description of the Related Art As an Ares conversion device for a real storage device having a larger capacity than a virtual storage space, Japanese Patent Publication No. H8-3106
The technique described in Japanese Patent Publication No. 0 is known.

The technology described in this publication extends a 31-bit real address when converting an address (virtual address) of a 24-bit or 31-bit virtual storage space to an address (real address) of a real storage device. By that
An extended real address for accessing a real storage device exceeding 2 GB can be generated. 31
An extension called an address extender is connected to the upper part of the bit real address to generate a real address exceeding 31 bits (extended real address). An example of the length of the linked address extender is 32 bits.

In the technique described in the above publication, a virtual address is converted into a real address, and a 31-bit real address is obtained. Above the 31-bit real address, an address conversion table, such as an ASTE, a segment table (STE), or a page table (PT
The address extenders stored in E) are linked to obtain an extended real address. This address extender extends the entry size of the address conversion table and stores it in the extended portion.

In the technique described in the above-mentioned publication, the ASTE mode, the STE mode,
There are provided a TE mode, a PTE mode, and a compatibility mode for prohibiting the use of the address extender in order to maintain backward compatibility capable of generating a 31-bit real address.

In the STE mode, the STE entry size is extended.

[0007] In the PTE mode, the PTE entry size is extended. The STE entry size is not disclosed.

Similarly, there is no disclosure about the STE entry size or the PTE entry size in the ASTE mode or compatible mode.

[0009]

In the technique described in the above publication, the entry size of the 31-bit address translation table is extended in order to translate the address into a real address larger than the virtual address. Therefore, there has been a problem that a program which referred to the conventional 31-bit address conversion table cannot be executed without correction.

An object of the present invention is to solve the above-mentioned problems of the prior art and to provide an address translation device for translating a virtual address into a real address larger than a virtual address, and having a capacity equal to or less than a virtual storage space. An object of the present invention is to provide compatibility that can be executed without modifying a program that referred to an address conversion table for a real storage device.

[0011]

According to the present invention, an object of the present invention is to provide, as an address translation table, a first address translation table for a real storage device having a capacity equal to or less than a virtual storage space. This is achieved by generating the real address of the real storage device having a larger capacity than the virtual storage space by using the second address conversion table.

Further, according to the present invention, an object of the present invention is to provide a computer system equipped with a real storage device having a larger capacity than the virtual storage space, and a real storage device having a smaller capacity or the same capacity as the virtual storage space. Achieved by performing address translation using only an address translation table for a real storage device with a capacity equal to or less than the virtual storage space in order to run a program that was running on the installed computer system Is done.

[0013]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of an address translation apparatus according to the present invention.

FIG. 9 is a configuration diagram of a virtual storage space for performing address translation using the address translator according to one embodiment of the present invention, and a real storage device. Virtual storage space 2000
Has a capacity of 2 31 bytes. Further, a plurality of virtual storage spaces can be created. The virtual page 20 provided by the address translator 2100 to the virtual storage space
The 10 size is 4 KB.

The virtual page 2010 in the virtual storage space is converted from a virtual address to a real address by the address conversion device, and can be made to correspond to the real page 2210 of the real storage device 2200. Next, the configuration and operation of the address translation device of the present invention will be described with reference to FIGS.

FIG. 1 shows an address translation device having an address translation table in which two independent segment tables and two page tables are linked, and an operation when an address of a real storage device larger than a virtual storage space is set. It is shown.

The virtual address 1200 includes a segment field 1210, a page field 1220, and a displacement field 1230. Hereinafter, an operation of converting a virtual address into a real address will be described.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1000). The first real address of the segment table 1 (1310) is stored in the extension register 1 (1100). The control register 1 has a real storage expansion mode flag 11
10 is also stored.

The real storage expansion mode flag permits reference to a real storage device exceeding 2 GB. When the real storage expansion mode flag is on, a real storage device exceeding 2 GB can be referred to. When the real storage expansion mode flag is off, only real storage devices of less than 2 GB can be referenced. The initial state of the real storage mode flag is off and has nothing to do with the installed capacity of the real storage device of the computer system. That is, even if a real storage device exceeding 2 GB is mounted, the real storage expansion mode flag remains off. The real storage expansion mode flag is controlled by software.

The contents of the segment table 0 address stored in the control register 1 and the contents obtained by quadrupling the contents of the segment field of the virtual address are added by the adder 10, and the segment table 0 (1300) corresponding to the contents of the segment field is added. Address. The segment table 0 (1300) stores the 31-bit portion of the head real address of the page table, and is used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is on, the following operation is also performed.

The contents obtained by quadrupling the contents of the segment field of the segment table 1 of the virtual table and the address of the segment table 1 stored in the extension register 1 are added by the adder 10, and the contents of the segment table 1 (1310) corresponding to the contents of the segment field are added. Address. The segment table 1 (1310) stores the address extension of the first real address of the page table, and is used when referring to the segment table.

The above segment table 0 (1300)
And the contents of the segment table 1 (1310) are concatenated to form an extended page table address 1320.
Can be obtained. The extended page table address is
A real address exceeding 31 bits obtained by concatenating the address extension stored in the segment table 1 above the page table address stored in the segment table 0.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the extended page table address and the page field is added by the adder 10, and becomes the address of the page table 1400 corresponding to the content of the page field. A page address is stored in the page table 1400, and is used when referring to the page table.

An address extension is stored in a page table 1410 obtained by adding a constant 1450 to the address of the page table 1400, and is used when referring to the page table. 1024 is used as the value of the constant referred to here.

Next, a virtual address displacement field 1230 is linked to the lower part of the page address stored in the page table 1400, and the page table 14
By concatenating the address extensions stored in 10, an extended real address 1600 exceeding 31 bits is obtained.

With the above operation, it is possible to set the address of the real storage device larger than the address of the virtual storage space.

Since the size of the control register 1 and the extension register 1 for storing the start address of the segment table is 4 bytes, the segment table 0 and the segment table 1 are arranged on a real storage device of less than 2 GB. Although the size of the segment table 0 entry and the segment table 1 entry for storing the head address of the page table is 4 bytes, the page table is located on a real storage device exceeding 2 GB because it is linked and referred to by 8 bytes. Is done. The size of the segment table used in one virtual storage space is 8 KB each, that is, 16 KB in total, which is not very large.
16 MB, which is very large. Therefore, even though the segment table is placed on the real storage of less than 2 GB, the element that presses the real storage device is small, but the page table is
If it is arranged in a real storage device of less than 2 GB, the real storage device will be squeezed. Therefore, the page table is allocated on a real storage device exceeding 2 GB.

FIG. 2 shows an address translation device having an address translation table in which two independent segment tables and two page tables are linked, in which an address of a real storage device having the same capacity as the virtual storage space is set. This shows the operation of.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1000). The real storage expansion mode flag 1110 is set to off in the control register 1 (1000).

The address of the segment table 0 stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10, and the segment table 0 (1300) corresponding to the content of the segment field is added. Address. The segment table 0 (1300) stores the 31-bit portion of the head real address of the page table, and is used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is off, the operation for obtaining the segment table 1 address is not performed.

The above segment table 0 (1300)
Are directly used as page table addresses.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table address and the page field is added by the adder 10, and becomes the address of the page table 1400 corresponding to the content of the page field. A page address is stored in the page table 1400, and is used when referring to the page table.

Next, a 31-bit real address 15 in which a displacement field 1230 of a virtual address is linked below the page address stored in the page table 1400.
00.

With the above operation, the address of the real storage device having the same capacity as the virtual storage space can be set.

FIG. 3 shows the operation when an address of a real storage device larger than the virtual storage space is set in an address conversion device having two independent segment table and two independent page table address conversion tables. It is a thing.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1000). The first real address of the segment table 1 (1310) is stored in the extension register 1 (1100).

The address of the segment table 0 stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10, and the segment table 0 (1300) corresponding to the content of the segment field is added. Address. The segment table 0 (1300) has the page table 0 (14
20) is stored and used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is on, the following operation is also performed.

The contents of the segment table 1 address stored in the extension register 1 and the contents of the segment field of the virtual address quadrupled are added by the adder 10, and the contents of the segment table 1 (1310) corresponding to the contents of the segment fields are added. Address. The segment table 1 (1310) has the page table 1 (14
30) is stored and used when referring to the segment table.

Next, page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table 0 address and the page field is added by the adder 10, and becomes the address of the page table 0 (1420) corresponding to the content of the page field. A page address is stored in the page table 0 (1420) and is used when referring to the page table. The content obtained by quadrupling the page table 1 address and the page field is added by the adder 10, and the page table 1 (14) corresponding to the content of the page field is added.
30). Page table (1430)
Stores an address extension, which is used when referring to the page table.

Next, the displacement field 1230 of the virtual address is concatenated below the page address stored in the page table 0 (1420), and the address extension stored in the page table 1 (1430) is appended above the page address. Concatenation to obtain an extended real address 1600 exceeding 31 bits.

By the above operation, it is possible to set the address of the real storage device larger than the address of the virtual storage space.

FIG. 4 shows an operation when an address of a real storage device which is the same as a virtual storage space is set in an address translation device having two independent segment table and two independent page table address translation tables. It is a thing.

First, the content of the segment field 1210 of the virtual address is quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1100). The first real address of the segment table 1 (1310) is stored in the extension register 1 (1100). In the control register 1 (1000), the content obtained by quadrupling the content of the segment field of the virtual address and the segment table 0 address stored in the control register 1 in which the real storage extension mode flag 1110 is set to off is added. And the address of the segment table 0 (1300) corresponding to the contents of the segment field. The first real address of the page table 0 (1420) is stored in the segment table 0 (1300), and is used when referring to the segment table.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table 0 address and the page field is added by the adder 10, and becomes the address of the page table 0 (1420) corresponding to the content of the page field. A page address is stored in the page table 0 (1420) and is used when referring to the page table.

Next, a 31-bit real address 1500 in which the displacement field 1230 of the virtual address is linked to the lower order of the page address stored in the page table 0 (1420).

With the above operation, the address of the real storage device having the same capacity as the virtual storage space can be set.

FIG. 5 shows an address translation device having an address translation table in which two segment tables are linked and two page tables are linked, in which an address of a real storage device larger than the virtual storage space is set. It shows the operation.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1100). The control register 1 also stores a real storage expansion mode flag bit 1110.

The segment table address stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10 to obtain an address of the segment table 1320 corresponding to the content of the segment field. . The segment table 1320 contains the first real address 3 of the page table.
One bit portion is stored and used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is on, the following operation is also performed.

The segment table 1330 obtained by adding a constant 1350 to the address of the segment table 1320 stores the address extension of the first real address of the page table, and is used when referring to the segment table. 8192 is used as the value of the constant referred to here.

The contents shown in the segment table 1320 and the contents shown in the segment table 1330 can be linked to obtain the extended page table address 1320. The extended page table address is a real address exceeding 31 bits obtained by concatenating the address extension stored in the segment table 1330 above the page table address stored in the segment table 1320.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table address and the page field is added by the adder 10, and becomes the address of the page table 1400 corresponding to the content of the page field. A page address is stored in the page table 1400, and is used when referring to the page table.

An address extension is stored in the page table 1410 obtained by adding a constant 1450 to the address of the page table 1400, and is used when referring to the page table. 1024 is used as the value of the constant referred to here.

Next, a virtual address displacement field 1230 is linked to the lower part of the page address stored in the page table 1400, and the page table 14
By concatenating the address extensions stored in 10, an extended real address 1600 exceeding 31 bits is obtained.

By the above operation, it is possible to set the address of the real storage device larger than the address of the virtual storage space.

FIG. 6 shows an address translation device having an address translation table in which two segment tables are linked and two page tables are linked, in which the same address of the real storage device as the virtual storage space is set. It shows the operation.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1100). The control register 1 has a real storage expansion mode flag 11
10 is set to off.

The segment table address stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10 to obtain an address of the segment table 1320 corresponding to the content of the segment field. . The segment table 1320 contains the first real address 3 of the page table.
One bit portion is stored and used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is off, the operation for obtaining the segment table 1330 address is not performed.

The contents shown in the segment table 1320 are used as page table addresses as they are.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table address and the page field is added by the adder 10, and becomes the address of the page table 1400 corresponding to the content of the page field. A page address is stored in the page table 1400, and is used when referring to the page table.

Next, a 31-bit real address 1 in which the displacement field 1230 of the virtual address is linked to the lower order of the page address stored in the page table 1400
Get 500.

By the above operation, the address of the real storage device having the same capacity as the address of the virtual storage space can be set.

FIG. 7 shows an operation in which two segment tables are linked to each other to set an address of a real storage device larger than the virtual storage space in an address conversion device having two independent page tables and two address conversion tables. It is shown.

First, the content of the segment field 1210 of the virtual address is quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1100). The control register 1 also stores a real storage expansion mode flag bit 1110.

The segment table address stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10 to become the address of the segment table 1320 corresponding to the content of the segment field. . The segment table 1320 stores the first real address of the page table 0 and is used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is on, the following operation is also performed.

In the segment table 1330 obtained by adding a constant 1350 to the address of the segment table 1320, the head real address of the page table 1 is stored and used when referring to the segment table. 8192 is used as the value of the constant referred to here.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table 0 address and the page field is added by the adder 10, and becomes the address of the page table 0 (1420) corresponding to the content of the page field. A page address is stored in the page table 0 (1420) and is used when referring to the page table. The content obtained by quadrupling the page table 1 address and the page field is added by the adder 10, and the page table 1 (14) corresponding to the content of the page field is added.
30). Page Table 1 (142
0) stores an address extension, which is used when referring to the page table.

Next, the virtual address displacement field 1230 is linked to the lower part of the page address stored in the page table 1400, and the page table 14
By concatenating the address extensions stored in 10, an extended real address 1600 exceeding 31 bits is obtained.

With the above operation, it is possible to set the address of the real storage device larger than the address of the virtual storage space.

FIG. 8 shows an operation of linking two segment tables and having an independent page table and two address conversion tables, and setting an address of the real storage device which is the same as the virtual storage space. It is shown.

First, the contents of the segment field 1210 of the virtual address are quadrupled by the multiplier 20. The first real address of the segment table 0 (1300) is stored in the control register 1 (1100). The control register 1 has a real storage expansion mode flag 11
10 is set to off.

The segment table address stored in the control register 1 and the content obtained by quadrupling the content of the segment field of the virtual address are added by the adder 10 to obtain the address of the segment table 1320 corresponding to the content of the segment field. . The segment table 1320 contains the first real address 3 of the page table.
One bit portion is stored and used when referring to the segment table.

When the real storage expansion mode flag of the control register 1 is off, the operation for obtaining the address of the segment table 1330 is not performed.

The contents indicated by the segment table 1320 are used as page table addresses as they are.

Next, the page field 1 of the virtual address
The content of 220 is quadrupled by the multiplier 20. The content obtained by quadrupling the page table address and the page field is added by the adder 10, and becomes the address of the page table 1400 corresponding to the content of the page field. A page address is stored in the page table 1400, and is used when referring to the page table.

Next, a 31-bit real address 1 in which the displacement field 1230 of the virtual address is linked to the lower order of the page address stored in the page table 1400
Get 500.

With the above operation, the address of the real storage device having the same capacity as the address of the virtual storage space can be set.

[0084]

As described above, according to the present invention, when obtaining the address of the real storage device from the address of the virtual storage space, there is provided means for setting the real storage device address larger than the address of the virtual storage space. Thus, the data of a large-scale online system can be increased.

Further, according to the present invention, since the address conversion is performed using the address conversion table for the real storage device having the capacity equal to or less than the virtual storage space, it is equal to or less than the virtual storage space. The amount of hardware can be reduced by using an address translation device for a real storage device having a capacity of.

Further, according to the present invention, an operating system operating in a computer system in which the capacity of the real storage device does not exceed the capacity of the virtual storage space can be operated as it is, so that the computer system can be easily migrated. be able to.

[Brief description of the drawings]

FIG. 1 is a view for explaining the operation of an address translation device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an operation when an address of a real storage device having the same capacity as a virtual storage space is set by the address translation device of the present invention.

FIG. 3 is a diagram showing an operation when an address of a real storage device larger than a virtual storage space is set by the address translation device of the present invention.

FIG. 4 is a diagram showing an operation when an address of a real storage device same as a virtual storage space is set by the address translation device of the present invention.

FIG. 5 is a diagram showing an operation when an address of a real storage device larger than a virtual storage space is set by the address translation device of the present invention.

FIG. 6 is a diagram showing an operation when the address of the real storage device same as the virtual storage space is set by the address translation device of the present invention.

FIG. 7 is a diagram showing an operation when an address of a real storage device larger than a virtual storage space is set by the address translation device of the present invention.

FIG. 8 is a diagram showing an operation when the address of the real storage device same as the virtual storage space is set by the address translation device of the present invention.

FIG. 9 is a diagram showing a configuration of a virtual storage space, an address translation device, and a real storage device according to the present invention.

[Explanation of symbols]

10 adder, 20 multiplier, 1000 control register 1, 1100 extension register 1, 1200 virtual address, 1300 segment table, 1400 page table, 1500 31-bit real address, 1600
... Extended real address, 1700 ... 31-bit real address.

Continuing from the front page (72) Inventor Yuri Hiraiwa 1099 Ozenji Temple, Aso-ku, Kawasaki City, Kanagawa Prefecture Inside Hitachi, Ltd.System Development Laboratory Co., Ltd. Engineering Co., Ltd. In-house F-term (reference) 5B005 JJ22 MM32 RR02 RR03 RR04

Claims (4)

[Claims] 1. An address translation device for translating an address of a virtual storage space into an address of a real storage device, when performing address translation in a computer system of the real storage device having a larger capacity than the virtual storage space, the same as the virtual storage space. A first address conversion table for a real storage device having a capacity equal to or smaller than the first address conversion table, and means for converting the data into a real address of the real storage device using another second address conversion table. Address translation device. 2. The address translation device according to claim 1, wherein the first address translation table and the second address translation table are independent of each other, and have means for referring to them. Address translation device. 3. The address translation device according to claim 1, wherein the first address translation table and the second address translation table are continuous as an area of the real storage device, and means for referring to them is provided. An address translation device, comprising: 4. The address translator according to claim 1, further comprising means for combining the address translator and the address translator.