JP2000236012A - Alignment method in repair device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce frequency of alignment and improve efficiency of operation by carrying out alignment to a mark in one fixed position among marks within the range of a shot and obtaining a position of all the chips based on alignment information. SOLUTION: If attention is paid to chips A to H, for example, chips A to D are exposed on a first shot. After a stage whereon a wafer is loaded is subjected to step movement, chips E to H are exposed by a second shot. In the process, if a position of chips B, C, D to a position of a chip A in one shot is decided first, a position of chips F, G, H can be known just by carrying out alignment to a chip E, for example, in the next one shot. A position of each chip is obtained indirectly by carrying out alignment to an alignment mark inside the same shot.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an improvement in a method of aligning a chip when laser repair is performed by a laser repair device.

[0002]

2. Description of the Related Art Generally, when a semiconductor device is manufactured, there is a possibility that a margin may exceed a margin determined at the time of design or manufacture, or a part of the semiconductor device may be defective due to a manufacturing error or generation of particles.

If such a defect occurs in a part of a semiconductor device, the entire device may become defective in some cases. The method is such that the defective part can be electrically separated and used as a non-defective product. Is used.

[0004] As this method, a typical one is to provide a fuse that can be cut off at a wiring portion in a circuit network,
There is a technique for using a chip as a non-defective product by melting the fuse using a laser repair device and electrically disconnecting the defective element itself or a circuit including the defective element in block units.

Referring to FIG. 4, the alignment associated with the repair process will be described.

[0006] The repairing process by the repairing device is performed according to procedures such as a theta alignment process, a wafer alignment process, a chip alignment process, and a repair process. At this time, the control unit stores a setting file for each chip arranged on the semiconductor substrate (wafer) to be repaired and a program for controlling the operation of the components of the repair device. The alignment and the repair are executed by controlling the movement of the stage on which the semiconductor substrate is mounted and the optical lens for irradiating the laser beam.

[0007]

When the fuse is cut off by the above-described laser repair device, it is necessary to perform positioning, that is, so-called alignment, in order to accurately irradiate the laser to the target fuse.

In a general alignment method, FIG. 5 shows a plurality of chips 12 arranged on a semiconductor substrate 11, and these chips 12 are provided with a pair of alignment marks 13a and 13b, respectively. Yes,
These alignment marks 13a and 13b have been used as alignment standards. Then, after performing alignment using the alignment marks 13a and 13b for each chip 12, the position of a corresponding fuse (not shown) is determined, and the chip is cut by irradiating a laser from a laser repair device.

[0009] Therefore, the repair process requires the same number of alignments as the number of chips arranged on the wafer 11, which takes a lot of trouble.

In view of the above, the present invention provides a method of aligning a plurality of chips in a batch at the time of chip alignment in a repair process, thereby reducing the number of times alignment is performed and improving the work efficiency. The aim is to provide a method.

[0011]

According to the present invention, in order to achieve the above object, in a step of exposing a semiconductor substrate in a chip forming step, a plurality of chips having the same composition are formed for each shot exposure by stepping movement. In an alignment method in a repair apparatus for performing a repair process on a semiconductor substrate formed sequentially, in the semiconductor substrate to be subjected to the repair process, as position information of a plurality of chips arranged in the range of the shot and a mark attached to each chip, A step of inputting information used at the time of exposure in the exposure step into a predetermined table; and, based on the alignment information, estimating a chip position and a mark position within a range of the shot based on coordinates constructed on a program. Alignment is performed for one fixed position mark among the marks within the shot range. A step of obtaining the positions of all chips based on the alignment information; and a step of performing alignment with respect to the one mark at the fixed position in each range of a succeeding shot thereafter to obtain the positions of all chips in the range. And an alignment method in a repair device comprising:

[0012] The alignment method in the repair apparatus as described above provides shot information relating to a shot position on a semiconductor substrate exposed to a mask type, a chip arrangement within a shot range, and the like at the time of exposure in an exposure step input to a table. From the alignment information on the mark position and the circuit element position provided for each of the chips, the positional relationship of chips and fuses within one shot range arranged on the wafer on the program coordinates is estimated. The alignment is executed by focusing on one of the marks. Repair is performed by specifying the positions of all chips and fuses in one shot from the estimated positional relationship, and thereafter, for each range of one shot, alignment is performed by using marks at the same position in the first one shot range. All chips and all fuses within the shot range are located.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a schematic configuration example of a repair apparatus for explaining an alignment method according to the present invention.

[0015] The repair device is a semiconductor substrate (wafer).
1, and a stage 2 that can be moved in a three-dimensional (XYZ) direction by a drive unit 8,
A wafer hand link device 3 for unloading, a laser source 4 including an acousto-optic modulator (AOM), an optical system / galvanometer 5 for irradiating and controlling the laser on the wafer 1, and an objective for converging the laser Lens 6
And a control unit 7 that controls these components and has a chip alignment table described later.

The control unit 7 further includes a setting file for a chip arranged on a wafer and a circuit element formed on the chip, a lens positioning operation program, and the like, for performing repair processing and alignment.
A stage positioning operation program and a repair execution operation program are stored.

In the chip alignment table, information relating to a shot position on the wafer 1 exposed to a mask type, a chip arrangement within a shot range, and the like from the control unit 7 in a photolithography process as a previous manufacturing process, and the like. Alignment information on alignment marks and the like provided for each chip is provided via a recording medium or a network. Based on this information, (exposure) of the actual wafer to be repaired
A shot arrangement, a chip position and an alignment mark position in a one-shot range can be specified, and a fuse position is obtained from a circuit element position inside the chip.

A description will be given of an alignment method of the present invention using the repair apparatus configured as described above.

FIG. 2 shows a plurality of chips arranged on the wafer 1 to be subjected to the repair processing in the present embodiment. The same applies to the chip arrangement shown in FIG. 5, but usually, a plurality of chips are exposed at a time in exposure to a wafer by photolithography. When the diameter of the wafer is small, the chips can be exposed on the entire surface of the wafer at once, but when the diameter is large, the light source is moved by scanning or the wafer is moved stepwise to perform exposure. .

In the illustrated example, a so-called stepper device is used to move the wafer 1 step by step for each exposure of one shot. Here, four shots at a time
One chip is formed.

For example, paying attention to each of the chips A to H, when the first shot is performed, the chips A to D are exposed. Then, after the stage 2 on which the wafer 1 is mounted is moved stepwise, a second shot is performed to expose the chips E to H.

In this case, since the first and second shots are exposures in which the same composition is repeatedly performed, the relative chip positions for each shot, for example, the positional relationship between the chip A and the other chips B, C, and D Is the chip F with respect to the chip E,
G and H, and the alignment accuracy is very high. That is, if the positions of chips B, C, and D with respect to the position of chip A in one shot are determined first, for example, chip E in the next one shot
Alignment to chips F, G, H
You can know the position of. In the present embodiment, the position of each chip is obtained indirectly by performing alignment with respect to the alignment mark in the same shot.

Hereinafter, similarly, it is possible to locate all the chips within the range of the shot by continuously aligning only a pair of alignment marks defined at a certain position within the continuously exposed shot range. it can.

Therefore, in the previous photolithography step,
In the case where four chips are exposed at one time by one shot as shown in the drawing, it is possible to perform positioning of 16 chips only by performing alignment four times.
However, the positional accuracy between chips in a shot is repeated with high accuracy, but since the positional accuracy between shots depends on the mechanical accuracy of table movement during the exposure,
Variation is large, and very high accuracy cannot be obtained.

Referring to FIG. 3, the repair process will be described.

First, the wafer 1 is carried in by the wafer hand link device 3 and mounted on the stage 2 to perform theta alignment. At this time, the stage position and the lens position are initialized, and the apparatus stands by at the origin position.

For the wafer or lot thereof to be further processed, alignment information relating to the alignment at the time of exposure in the previous photolithography step, shot information relating to the exposure shot range, etc., and mask information relating to the type of mask, etc., are stored in the control unit. 7, the position of a chip arranged on the wafer 1 placed thereon and the position of a circuit element such as a fuse in the chip are confirmed on the coordinates in the program from these information, and a reference in the chip as an alignment reference is obtained. An alignment mark is selected and determined.

Then, the stage 2 on which the wafer 1 is mounted is slightly moved to perform wafer alignment so that the stage 2 is set at the alignment start position. At this time, the chip arrangement position on the wafer is confirmed, and the chip arrangement position and the alignment mark position set from the information at the time of exposure are collated. Here, if the wafer is different from the information, the fact is notified and the wafer is ejected in some cases.

Next, chip alignment is performed. For example,
The alignment is performed on the alignment mark 9a selected from the four in the first one shot.

From the position of the alignment mark 9a,
Based on the above-described alignment information, shot information, and mask information, the position of the chip A on the wafer 1 and the position of the fuse and the like in the chip are specified.

Then, the objective lens 6 is set so that the laser to irradiate the fuse to be cut in the chip A. The repair is performed by irradiating the set fuse with laser.

Next, after the repair of the chip A is completed, the chips B, C, D are determined based on the alignment mark 9a.
Of these, the objective lens 6 is set for a necessary chip and repair is performed.

Thereafter, the stage 2 is moved to the position of the next one shot, and the alignment marks 9b located at the same position as the alignment marks 9a are aligned with the chips E to H. To identify
Further, the desired fuse in the chip is set so as to be irradiated with the laser, and the repair is performed.

As described above, according to the present embodiment, the program information is obtained from the alignment information relating to the alignment at the time of exposure in the previous photolithography process, the shot information relating to the shot range of exposure, and the mask information relating to the type of mask. The positional relationship between the chip, circuit elements such as fuses in the chip, and the alignment marks within the range of one shot arranged on the wafer on the coordinates can be specified.

Then, alignment is executed by focusing on one alignment mark arranged at a certain position in one shot, and all chip positions and fuse positions in one shot are specified based on this positional relationship. Repair can be performed.

After that, alignment is performed for each of the ranges of one shot with an alignment mark positioned equivalent to the range of the first shot, and repair is performed.

In the prior art, the alignment is performed with the alignment mark attached to each chip and the repair processing is performed. Therefore, the alignment is performed by the number of chips. If alignment is performed once for all the chips arranged in the chip, the position of each chip and the position of a fuse or the like to be irradiated with laser can be set, so that the working efficiency is significantly improved.

In the wafer to which the present embodiment is applied, as the number of chips arranged in one shot increases, the number of chips whose position can be set by one alignment increases, so that the working efficiency further increases. .

In the alignment method of this embodiment,
The chip position was used by incorporating information on the position used in the previous photolithography process, but if the information obtained by the photolithography process was not obtained, in the first shot, each chip position and each The position of the associated alignment mark is detected and stored as position information in the table, and the present embodiment is applied to the positioning of the chip in the subsequent shots, and the alignment is performed for one alignment mark within the range of the shot. Is performed, and the positions of all chips within the range are specified.

When the entire wafer is exposed by one-shot exposure because the wafer area is small, the present embodiment is similarly applied to align one alignment mark on the wafer. Thus, the positions of all chips can be specified.

[0041]

As described above in detail, according to the present invention, in the alignment of the chips involved in the repair processing, the alignment is performed collectively on a plurality of chips, the number of times of the alignment is reduced, and the work is performed. It is possible to provide an alignment method in a repair device for improving the efficiency of the apparatus.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic configuration example of a repair apparatus for explaining an alignment method according to the present invention.

FIG. 2 is a diagram showing a plurality of chips arranged on a semiconductor wafer to be aligned according to the embodiment.

FIG. 3 is a diagram illustrating a repair process in the embodiment.

FIG. 4 is a diagram for explaining alignment associated with a conventional repair process.

FIG. 5 is a view showing a plurality of chips arranged on a semiconductor wafer for explaining alignment according to the conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate (wafer) 2 ... Stage 3 ... Wafer hand link device 4 ... Laser generating source 5 ... Optical system / galvanometer 6 ... Objective lens 7 ... Control unit 8 ... Driver 9a, 9b ... Alignment mark

Claims (2)

[Claims] In a step of exposing a semiconductor substrate in a chip manufacturing process, a repair process for performing a repair process on a semiconductor substrate on which a plurality of chips are sequentially formed with the same composition for each shot exposure by stepping movement. In the alignment method in the apparatus, information used at the time of exposure in the exposure step is determined as position information of a plurality of chips arranged in the range of the shot and a mark attached to each chip in a semiconductor substrate to be subjected to a repair process. A step of inputting into a table; a step of estimating a chip position and a mark position within the range of the shot based on coordinates constructed on a program based on the position information; and one of marks within the range of the shot Alignment is performed on the fixed position mark, and based on the chip position and the mark position, A step of obtaining a chip position; and a step of similarly performing alignment with respect to one mark of the fixed position in each range of a subsequent shot to obtain positions of all chips in the shot range. Alignment method in a repair device. 2. The position information input to the table includes, in the exposure step, shot information on a shot position on a semiconductor substrate exposed to a mask type, a chip arrangement in a shot range, and the like, and for each of those chips. 2. The alignment method according to claim 1, wherein the alignment method comprises alignment information on the provided mark position and the circuit element position.