JP2000215650A - Disc editor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the need for prohibiting update of TOC on a disc until a disc is taken out by taking a TOC stored in a buffer memory into a work memory and copying it into a second area of the buffer memory. SOLUTION: A copy of TOC data is made simultaneously when a system microcomputer reads out a data from a DRAM to a work RAM. Editing is performed in the work RAM and the TOC data in the DRAM is updated to produce a new TOC data. The content is written on a disc immediately. When the TOC data on the disc is updated every time when editing, it can be taken out quickly as required. In the operation for canceling editing the TOC data (copy) area is returned back to the essential TOC area in the DRAM immediately after it is read out to the work RAM. The TOC on the disc is also rewritten immediately.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mini disc (M
D) A disc editing apparatus having a buffer memory such as a player, in particular, a TOC (Table Of Con
The present invention relates to a disk editing device capable of quickly rewriting tents).

[0002]

2. Description of the Related Art Conventionally, in the case of editing such as division, synthesis, deletion, writing and rewriting of character information on a disk such as an MD, the TOC information on the disk is read into a buffer memory, and the microcomputer reads the information. Is decoded, and the TOC content in the buffer memory is rewritten by a user's key input operation or the like. Then, when the editing is determined, the TOC content on the buffer memory is written to the TOC area on the disk, thereby completing the editing.

[0003]

The problem with the above series of editing operations is that the TOC data before editing is lost when the TOC data is written to the disk.
This means that the editing operation cannot be canceled. In order to avoid the problem, the TOC rewriting operation is often performed for the first time when the disk is removed. In this case, it is necessary to re-read the TOC data from the disk if the cancel operation is performed after editing on the buffer memory before rewriting the disk.

[0004] For this reason, it takes time to remove the disc or cancel the editing, giving an unnatural or uneasy impression. In order to avoid this, it is conceivable to take the TOC information before editing into another area of the buffer memory, but this increases the number of times of access to the disk, and still leaves a problem of time. The present invention has been made in view of such a problem, and an object of the present invention is to make it possible to easily generate a copy of the TOC area in the buffer memory.
At the time of OC editing, T
It is an object of the present invention to provide a disk editing apparatus which eliminates the necessity of prohibiting the update of the OC, and makes it possible to take out a disk and cancel editing in a short time.

[0005]

A disk editing apparatus according to the present invention includes a buffer memory for temporarily storing a TOC read from a disk and a TOC for writing to the disk in a first area, and a work for storing the TOC for editing the TOC. A memory; and fetching means for fetching the TOC stored in the buffer memory into the work memory and copying the TOC into another second area of the buffer memory.

[0006] In addition, editing means for editing the TOC stored in the work memory, copying the edited TOC to the first area, and writing the TOC to a disk is provided. Even if the TOC of the disc is rewritten, the original TOC can be retained. Further, when the operator cancels the editing operation, the editing means loads the TOC stored in the second area into the work memory, copies the TOC into the first area, and writes the TOC into the disk. Even if the TOC of the disc is rewritten while performing the editing operation, the original TOC can be returned when the editing is canceled.

The buffer memory outputs data and changes a read address by a predetermined amount by designating a read start address and inputting a read control pulse. By inputting the pulse, the data is written and the write address is changed by a predetermined amount. By inputting the read control pulse and the write control pulse, reading and writing are performed, and the read address and the write address are automatically set. Can be incrementally increased. The buffer memory writes the read data to a write address by inputting a write pulse, so that data can be copied in the buffer memory when reading data.

[0008]

An embodiment of the present invention will be described below with reference to the drawings. First, in the overall block diagram of FIG. 1, an outline of the present invention will be described by taking reproduction of an MD device as an example. Reference numeral 1 denotes a disk, and 2 denotes an optical pickup. At the time of reproduction, the optical pickup 2 irradiates the disk 1 with laser light, takes in the reflected light, and records an RF signal (modulated audio data) recorded on the disk 1 Is read.
The RF amplifier 3 amplifies it, and the signal processing circuit 4 performs frame synchronization, demodulation, C1 error correction based on an error correction code,
C2 error correction is performed, a 1-bit byte flag is created for 1-byte (8-bit) data, and then sector synchronization and descrambling are performed.
The HSG flag indicating whether or not the half sound group data can be restored is detected, and this is written to the DRAM 6 in real time with the data in the same manner as the byte flag.

Here, the spin motor 10 rotates the disk 1, and the feed motor 11 moves the optical pickup 2 in a direction perpendicular to the tracks of the disk 1. The driver circuit 13 is a circuit that supplies power to the spin motor 10, the feed motor 11, and a drive device that drives the objective lens of the optical pickup 2 in order to operate the drive device. Further, the servo circuit 12 performs feedback control of each device driven by the driver circuit 13 so that an operation of making the light emitted from the optical pickup 2 follow a target track of the disk 1 is performed accurately. It is.
Reference numeral 14 denotes a power ON / OFF circuit, and reference numeral 15 denotes a system microcomputer.

At the time of reading from the DRAM 6, only the correct DRAM data address having the closest time is always stored in the register in the error processing circuit 7, and the data and the data to be transferred to the audio decompression circuit 8 are stored. If the HSG flag corresponding to the byte flag is correct, the data and the byte flag are transferred as they are. If the error is an error, the register in the error processing circuit 7 is accessed, and the data of the DRAM 6 indicated by the address, that is, The data in which the HSG flag is correct is always sent to the audio decompression circuit 8 in the next stage. Therefore, first, based on the information in the half sound group data, detailed error processing for correcting the data is performed so as to reduce the original sound, and then expansion processing is performed. The digital signal is converted to an analog signal by the DA converter 9. , An audio signal is output.

At the time of recording, the audio signal is converted from an analog signal to a digital signal by the AD converter 17,
The voice is compressed by the voice compression circuit 18 and recorded. TOC
The information is recorded on the inner circumference of the disc 1, and position information and time information of a tune essential for reproduction of the disc 1, character information such as a title displayed on a display of the set, and the like are recorded. The method of reading out the data to the DRAM 6 is the same as the method of reproducing the sound described above.

The TOC is managed in a specific area in the DRAM 6, and by reading this area, the system microcomputer 15 recognizes the position of the tune number to be reproduced and goes to search, or recognizes the title of the tune to display. Or to be displayed. For a recordable disc, the control of the editing operation such as creation of a TOC, division and combination of music, and rewriting of character information is performed. The editing operation is realized by rewriting the TOC instead of actually changing the recording area of the music. Therefore, a major feature of the MD system is that editing can be performed easily in a short time.

All of the above processing is performed by the system microcomputer 1
5 is centrally managed. Further, detailed error processing and decompression processing are performed by the audio decompression circuit 8, and compression processing is performed by the audio compression circuit 17, but detailed description is omitted. Next, T
An OC editing example will be described. For comparison, the conventional TO
An example of C editing will be described. FIG. 2A shows a flow in which the TOC data in the work RAM 16 of the system microcomputer 15 is transferred. The work RAM 16 takes in all or a part of the TOC data.

FIG. 2B shows a flow at the time of editing. The contents of the TOC are rewritten on the work RAM 16. For example,
The song title is entered in alphabet for each song. When the input operation is completed, the TOC data on the DRAM 6 becomes the work R
The content is updated to the content of AM16. At the time of editing operation, up to here, that is, up to the point of updating data on the DRAM 6, updating of the TOC data on the disk 1 is first performed when the disk 1 is taken out (FIG. 2 (c)).
This is because, if the user wants to cancel the editing operation and return to the original state, rewriting the TOC on the disc 1 every time the editing operation is performed will cause the initial TOC content to be lost anywhere. Cancellation of the editing operation is realized by re-reading the TOC of FIG. 2A from the state of FIG. 2B.

Next, an example of TOC editing according to the present invention is shown in FIG.
This will be described with reference to FIG. FIG. 3A shows an operation of simultaneously creating a copy of the TOC data when the system microcomputer 15 reads data from the DRAM 6 to the work RAM 16. FIG. 3B shows a state in which the editing is performed in the work RAM 16 and the TOC data in the DRAM 6 is newly updated based on the editing and becomes the TOC data (new). This content is immediately written to the disk 1. This is DR
This is because since the TOC data (copy) exists on the AM 6, the data before editing remains, and the editing can be canceled. By updating the TOC on the disk 1 each time editing is performed, the time T
Compared with the conventional method of updating the OC, it is possible to quickly retrieve when it is desired to retrieve.

FIG. 3C shows the operation of canceling editing according to the present invention. TOC data (copy)
The area is read out to the work RAM 16 and the DRAM 6
It returns to the original TOC area. In addition, the TOC on the disk 1 is immediately rewritten. The DRAM 6 has a much larger capacity than the TOC data, and is mostly used for buffering audio data (compressed data). Even if a copy area of the TOC data is generated as in the present invention, substantially no trouble occurs. The audio data stored in the DRAM 6 enables continuous sound reproduction even if data read from the disk 1 is interrupted due to a shock or the like. Next, the system microcomputer 15
Reads the TOC data in the DRAM 6 and
4 and 8 show a method of generating a copy area in AM6.
This will be described below.

FIG. 4 shows a system microcomputer 15 and a DRAM.
An interface with the control unit 20 (not shown in the system configuration diagram of FIG. 1) is shown, and FIG. 8 shows details of the DRAM control unit 20. 4 and 8, the system microcomputer 15 outputs data to be written to the DRAM 6 and data to be written to the control register.
This is a data bus for the microcomputer 15 to read out. Here, it is assumed that it is configured with a 16-bit width. The input / output switching signal indicates the direction of the read / write data bus. When this signal is low, the system microcomputer 15 outputs, and when it is high, the DRAM control unit 20 outputs. The command is an 8-bit bus indicating the address of a command register existing in the DRAM control unit 20. For example, an address of a read register that specifies an address of data of the DRAM 6 to be read from now is output to a command line. The value to be written to the register is output to the read / write data bus. The write pulse is used as a clock by which the DRAM control unit 20 latches a read / write data bus and a command. With the rise of the write pulse, the write data is taken into the DRAM control unit 20. Also, the DRAM control unit 20 causes the system microcomputer 1 to respond to the rise of the read pulse.
5 is selected by the register selection / register write control signal generation circuit 21 (see FIG. 8), whereby the designated DRAM read data register 23 output from the DRAM interface circuit 22 is selected by the selector 24. .

FIG. 6 shows control for reading data in the DRAM 6. First, the input / output switching signal is set to L to enter a write state. A DRAM read address setting command is output in response to the command, and a value of an address at which reading is to be started is output as read / write data. Then, by outputting a write pulse, the register selection / register write control signal generation circuit 21 writes a read address to the DRAM read address setting register 25. And the system microcomputer 1
5, the read / write data bus is set to the input state, and the address of the read register is output to the command bus.
By outputting the RAM data read / write command and setting the input / output switching terminal to H, the DRAM control unit 20 is set to the output state. By outputting a pulse to the read pulse terminal, the selector 27 selects the read address counter 28 by the DRAM read / write timing generation circuit 26, and data 0 of the previously set DRAM read address is designated from the DRAM interface circuit 22. The data is output via the DRAM read data register 23. Each time a read pulse is output, the DRAM read address is automatically incremented by the read address counter 28 and data 1, 2, 3,.
‥‥‥ is output.

FIG. 7 shows a control for writing data in the DRAM 6. First, the input / output switching signal is set to L to enter a write state. DRA for command
An M write address setting command is output, and the value of the address at which writing is to be started is output as read / write data. By outputting a write pulse, the write address is written to the DRAM write address setting register 29 by the register selection / register write control signal generation circuit 21. And the system microcomputer 1
5, data to be written to the read / write data bus,
By outputting a DRAM data read / write command to the command bus and outputting a pulse to the write pulse terminal, the selector 27 selects the write address counter 30 by the DRAM read / write timing generation circuit 26, and the DRAM write data 0 is output to the DRAM. The data is written to the write data register 31. Each time a write pulse is output, the write address counter 30
The DRAM write address is automatically incremented to output data 1, 2, 3,.

FIG. 5 shows an operation of simultaneously performing the read operation from the DRAM and the write operation to the DRAM described with reference to FIGS. 6 and 7. When the system microcomputer 15 reads the data, This is an operation of writing data to another writing area specified in the above. That is, FIG.
The operation of writing the TOC to different addresses on the DRAM 6 shown in FIGS. 3A and 3C is described. The system microcomputer 15 only outputs a write pulse when reading the TOC data, and does not prepare a special transfer routine for area copying or require a transfer time. Note that the present invention is not limited to the above embodiment. The buffer memory and the work memory may be different areas of a single memory.

[0021]

As described in detail above, according to the present invention, a copy of the TOC area can be easily generated in the DRAM with a simple circuit configuration. It is not necessary to prohibit the updating of the above TOC, and it is possible to avoid a situation in which the operator has to wait when removing the disc or canceling the editing, and a natural and stable editing operation is performed.

[Brief description of the drawings]

FIG. 1 shows an MD to which a disc editing apparatus according to the present invention is applied.
It is a block diagram of an apparatus.

FIG. 2 is an operation explanatory diagram showing a conventional example of TOC editing.

FIG. 3 is an operation explanatory diagram showing an example of TOC editing according to the present invention.

FIG. 4 is a block diagram showing an interface between a system microcomputer and a DRAM control unit.

FIG. 5 is an operation explanatory diagram for performing read and write operations from a DRAM.

FIG. 6 is an operation explanatory diagram for performing a write operation to a DRAM.

FIG. 7 is an explanatory diagram of an operation of reading from a DRAM.

FIG. 8 is a block diagram showing details of a DRAM control unit.

[Explanation of symbols]

 1 disk 6 DRAM 15 system microcomputer 16 work RAM

Claims (5)

[Claims] 1. A TOC (Table) read from a disk
Of contents) and a buffer memory for temporarily storing the TOC for writing to the disc in the first area, a work memory for storing the TOC for editing, and a TOC for storing the TOC stored in the buffer memory. A disk editing device comprising: a capturing unit that copies the data to another second area of the buffer memory. 2. The TO stored in the work memory
2. The disk editing apparatus according to claim 1, further comprising editing means for editing C, copying the edited TOC to the first area, and writing the TOC to a disk. 3. When the operator cancels the editing operation, the editing means loads the TOC stored in the second area into the work memory, copies the TOC into the first area, and writes the TOC into the disk. 2. The disk editing apparatus according to claim 1, wherein: 4. The buffer memory outputs data and changes a read address by a predetermined amount by designating a read start address and inputting a read control pulse. 2. The disk editing apparatus according to claim 1, wherein a pulse is input to write data and change a write address by a predetermined amount. 5. The buffer memory according to claim 1, wherein the buffer memory is configured to write read data to a write address by inputting a write pulse.
Disc editing device as described.