JP2000206171A - Method and device for inspecting wiring of printed circuit board, and wiring pattern producing device - Google Patents

Method and device for inspecting wiring of printed circuit board, and wiring pattern producing device

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Publication number
JP2000206171A
JP2000206171A JP11008813A JP881399A JP2000206171A JP 2000206171 A JP2000206171 A JP 2000206171A JP 11008813 A JP11008813 A JP 11008813A JP 881399 A JP881399 A JP 881399A JP 2000206171 A JP2000206171 A JP 2000206171A
Authority
JP
Japan
Prior art keywords
signal line
wiring
phase difference
signal
coordinates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11008813A
Other languages
Japanese (ja)
Other versions
JP4079296B2 (en
Inventor
Mariko Kasai
真理子 笠井
Atsushi Hara
原  敦
Hitoshi Yokota
等 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP00881399A priority Critical patent/JP4079296B2/en
Publication of JP2000206171A publication Critical patent/JP2000206171A/en
Application granted granted Critical
Publication of JP4079296B2 publication Critical patent/JP4079296B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Length Measuring Devices With Unspecified Measuring Means (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce a radiant noise by comparing angles with each other which a straight line connecting points of analysis coordinates at locations at the same wiring length from the input point or output point of the plus and minus signal wires of the differential signal line of a wiring pattern forms with the plus signal wire and the minus signal wire to detect a phase difference. SOLUTION: Location information (a start point, an end point, the coordinates of a point of bending, layers, etc.), necessary for forming the wiring pattern of a differential signal line is extracted from the CAD data of a wiring board. The wiring length of a wiring to be inspected is computed from the extracted coordinates of the start point, end point, and point of bending of the wiring to be inspected, and the difference in wiring length between signal wires (a plus wire and a minus wire) which form a pair with the wiring to be inspected and is obtained and compared with Ldiff (the allowable value of difference in wiring length). In the case where the difference in wiring length is shorter than the Ldiff, phase difference detection is performed. In the case that it is longer, alarm processing is performed. In the case that the sum of the wiring lengths in a section with a phase difference is longer than Lmax, alarm processing is performed. In the case that it is shorter, checks on the signal wires to form a pair are completed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、高速な差動信号が
実装される配線基板の配線検査方法、該方法を用いた検
査装置、及び配線パターン生成装置に関する。
The present invention relates to a wiring inspection method for a wiring board on which a high-speed differential signal is mounted, an inspection apparatus using the method, and a wiring pattern generation apparatus.

【0002】[0002]

【従来の技術】近年、液晶ディスプレイ(LCD)への
データ転送方式として、低振幅の差動伝送方式が用いら
れるようになった。差動伝送方式とは、1つの信号から
+信号(+線)と−信号(−線)の2相の信号を発生
し、2本の信号線を用いて伝送する方式である。この方
式では、+線と−線が電磁気的に結合するため、信号線
とそのリターン電流の経路でできるアンテナループ面積
を零に近づける事ができ、従来のシングルエンドの伝送
方式と比較して、ディファレンシャルモードのノイズを
減らすことができる。
2. Description of the Related Art In recent years, a low-amplitude differential transmission system has been used as a data transfer system to a liquid crystal display (LCD). The differential transmission method is a method of generating two-phase signals of a + signal (+ line) and a − signal (− line) from one signal and transmitting the signal using two signal lines. In this system, the + line and the-line are electromagnetically coupled, so that the antenna loop area formed by the signal line and the return current path can be made close to zero, and compared with the conventional single-ended transmission system. Noise in the differential mode can be reduced.

【0003】差動信号の実装方法としては、平行で等長
に配線にしなければならない。差動信号の配線の検査方
法としては、「Allegro User Guide Volume 3B pp 4-85
−4-87 CADENCE社」が示すように、2本のネットの合
計長または合計遅延を検査する方法がある。
In order to mount a differential signal, wiring must be parallel and of equal length. Refer to “Allegro User Guide Volume 3B pp 4-85
As shown by “-4-87 CADENCE,” there is a method of checking the total length or total delay of two nets.

【0004】[0004]

【発明が解決しようとする課題】従来の検査方法では、
図18に示すようなドライバ182からレシーバ183
への配線パターン181の場合、ドライバ182からレ
シーバ183に至る+線と−線の配線パターン長は等し
いのでエラーにはならない。しかしながら、区間A,
B,Cではそれぞれ配線パターンは平行だが、伝播する
信号には迂回部分で生じた位相差がある。このため、+
線と−線の電磁気的な結合が崩れ、放射ノイズが発生す
る原因となる。例えば、図19下段の配線モデルに75
0MHzの矩形波を入力したときの放射ノイズをシミュ
レーションしたところ、迂回のずれと750MHzの放
射ノイズのノイズレベルとの関係は図19上段のグラフ
になった。このグラフから分かるように、迂回のずれが
大きいほど放射ノイズが大きい。従来の検査方法では、
+線と−線の位相差についての配慮がなされていないた
め、このような配線パターンをチェックすることができ
ないという問題がある。
In the conventional inspection method,
The driver 182 to the receiver 183 as shown in FIG.
In the case of the wiring pattern 181, there is no error because the wiring pattern lengths of the + line and the − line from the driver 182 to the receiver 183 are equal. However, section A,
In B and C, the wiring patterns are parallel to each other, but the propagating signal has a phase difference generated in a detour portion. Therefore, +
The electromagnetic coupling between the line and the-line is broken, which causes radiation noise. For example, 75 in the lower wiring model of FIG.
Simulation of radiation noise when a 0-MHz rectangular wave was input showed the relationship between the detour deviation and the noise level of the 750-MHz radiation noise in the upper graph of FIG. As can be seen from this graph, the greater the deviation of the detour, the greater the radiation noise. In the conventional inspection method,
Since no consideration is given to the phase difference between the + line and the-line, there is a problem that such a wiring pattern cannot be checked.

【0005】そこで、本発明の目的は、上述したような
差動信号の+線と−線の位相差を検出可能な配線検査方
法、該方法を用いた検査装置、及び配線パターン生成装
置を提供することにある。
Accordingly, an object of the present invention is to provide a wiring inspection method capable of detecting a phase difference between a positive line and a negative line of a differential signal as described above, an inspection apparatus using the method, and a wiring pattern generating apparatus. Is to do.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明は、プリント基板の配線検査方法において、
検査対象の配線パターンの差動信号線路の+信号と−信
号の位相差を検出することを特徴とする。
In order to achieve the above object, the present invention provides a method for inspecting wiring of a printed circuit board.
The phase difference between the + signal and the − signal of the differential signal line of the wiring pattern to be inspected is detected.

【0007】また本発明は、プリント基板の配線検査方
法において、検査対象の配線パターンである差動信号線
路の+信号線上、及び−信号線上の信号の伝播方向に、
所定配線長間隔で解析座標を生成するステップと、+信
号線及び−信号線の入力点または出力点から同じ配線長
にある解析座標の点を結んだ直線を求め、該直線と前記
+信号線及び−信号線とが作る角度をそれぞれ算出し、
それらの角度を比較するステップと、該比較の結果に基
づいて、+信号と−信号の位相差の発生を検出するステ
ップとを備えたことを特徴とする。
According to the present invention, in a method for inspecting wiring of a printed circuit board, the signal propagation direction on the + signal line and the-signal line of the differential signal line which is the wiring pattern to be inspected,
Generating analysis coordinates at a predetermined wiring length interval; and obtaining a straight line connecting analysis coordinate points having the same wiring length from input or output points of the + signal line and the-signal line, and determining the straight line and the + signal line. And-calculate the angle formed by the signal line, respectively,
The method includes the steps of comparing the angles and detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison.

【0008】さらに本発明は、プリント基板の配線検査
方法において、検査対象の配線パターンである差動信号
線路の+信号線上、及び−信号線上の信号の伝播方向
に、所定配線長間隔で解析座標を生成するステップと、
+信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較するステップと、該比較の結果
に基づいて、+信号と−信号の位相差の発生を検出する
ステップと、前記+信号線及び−信号線上の全解析座標
について位相差の発生の有無を検出し、位相差のある区
間の区間長の和を求めるステップと、前記位相差のある
区間の区間長の和が所定値よりも小さいか否かを判定す
るステップと、前記位相差のある区間の区間長の和が所
定値よりも小さくなかったとき、警告を出力するステッ
プとを備えたことを特徴とする。
Further, according to the present invention, in a method of inspecting wiring of a printed circuit board, analysis coordinates are provided at a predetermined wiring length interval in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line as a wiring pattern to be inspected. Generating
A straight line connecting the points of the analysis coordinates having the same wiring length from the input point or the output point of the + signal line and the − signal line is obtained, and the angles formed by the straight line and the + signal line and the − signal line are calculated. Comparing the angles, detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison, and generating the phase difference for all the analysis coordinates on the + signal line and the − signal line. Detecting the sum of the section lengths of the sections having a phase difference, determining whether the sum of the section lengths of the sections having the phase difference is smaller than a predetermined value, And outputting a warning when the sum of the section lengths of the sections having a certain length is not smaller than a predetermined value.

【0009】また本発明は、プリント基板の配線検査を
行うプログラムを記憶した記憶媒体であって、該プログ
ラムは、検査対象の配線パターンである差動信号線路の
+信号線上、及び−信号線上の信号の伝播方向に、所定
配線長間隔で解析座標を生成するステップと、+信号線
及び−信号線の入力点または出力点から同じ配線長にあ
る解析座標の点を結んだ直線を求め、該直線と前記+信
号線及び−信号線とが作る角度をそれぞれ算出し、それ
らの角度を比較するステップと、該比較の結果に基づい
て、+信号と−信号の位相差の発生を検出するステップ
とを備えたことを特徴とする。
Further, the present invention is a storage medium storing a program for inspecting wiring of a printed circuit board, wherein the program is stored on a positive signal line and a negative signal line of a differential signal line which is a wiring pattern to be inspected. Generating analysis coordinates at predetermined wiring length intervals in the signal propagation direction; and obtaining a straight line connecting the analysis coordinate points at the same wiring length from the input points or output points of the + signal line and the − signal line. Calculating the angles formed by the straight line and the + signal line and the − signal line, and comparing the angles; and detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison. And characterized in that:

【0010】また本発明は、プリント基板の配線検査を
行うプログラムを記憶した記憶媒体であって、該プログ
ラムは、検査対象の配線パターンである差動信号線路の
+信号線上、及び−信号線上の信号の伝播方向に、所定
配線長間隔で解析座標を生成するステップと、+信号線
及び−信号線の入力点または出力点から同じ配線長にあ
る解析座標の点を結んだ直線を求め、該直線と前記+信
号線及び−信号線とが作る角度をそれぞれ算出し、それ
らの角度を比較するステップと、該比較の結果に基づい
て、+信号と−信号の位相差の発生を検出するステップ
と、前記+信号線及び−信号線上の全解析座標について
位相差の発生の有無を検出し、位相差のある区間の区間
長の和を求めるステップと、前記位相差のある区間の区
間長の和が所定値よりも小さいか否かを判定するステッ
プと、前記位相差のある区間の区間長の和が所定値より
も小さくなかったとき、警告を出力するステップとを備
えたことを特徴とする。
The present invention is also a storage medium storing a program for inspecting wiring of a printed circuit board, wherein the program is stored on a positive signal line and a negative signal line of a differential signal line which is a wiring pattern to be inspected. Generating analysis coordinates at predetermined wiring length intervals in the signal propagation direction; and obtaining a straight line connecting the analysis coordinate points at the same wiring length from the input points or output points of the + signal line and the − signal line. Calculating the angles formed by the straight line and the + signal line and the − signal line, and comparing the angles; and detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison. Detecting the presence / absence of a phase difference with respect to all the analysis coordinates on the + signal line and the − signal line to obtain the sum of the section lengths of the sections having the phase difference; Sum is a predetermined value A remote small whether the determining, when the sum of the section length of the section of the phase difference is not less than a predetermined value, characterized by comprising a step of outputting a warning.

【0011】また本発明は、プリント基板の配線検査装
置において、検査対象の配線パターンの差動信号線路の
+信号と−信号の位相差を検出する手段を備えたことを
特徴とする。
The present invention is also characterized in that the printed circuit board wiring inspection apparatus further comprises means for detecting a phase difference between the + signal and the-signal of the differential signal line of the wiring pattern to be inspected.

【0012】また本発明は、プリント基板の配線検査装
置において、検査対象の配線パターンである差動信号線
路の+信号線上、及び−信号線上の信号の伝播方向に、
所定配線長間隔で解析座標を生成する手段と、+信号線
及び−信号線の入力点または出力点から同じ配線長にあ
る解析座標の点を結んだ直線を求め、該直線と前記+信
号線及び−信号線とが作る角度をそれぞれ算出し、それ
らの角度を比較する手段と、該比較の結果に基づいて、
+信号と−信号の位相差の発生を検出する手段とを備え
たことを特徴とする。
Further, according to the present invention, in a wiring inspection apparatus for a printed circuit board, in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line as a wiring pattern to be inspected,
Means for generating analysis coordinates at a predetermined wiring length interval; obtaining a straight line connecting analysis signal points having the same wiring length from input or output points of the + signal line and the-signal line; And means for calculating the angles formed by the signal lines and comparing the angles, based on the result of the comparison,
Means for detecting the occurrence of a phase difference between the + signal and the-signal.

【0013】また本発明は、プリント基板の配線検査装
置において、検査対象の配線パターンである差動信号線
路の+信号線上、及び−信号線上の信号の伝播方向に、
所定配線長間隔で解析座標を生成する手段と、+信号線
及び−信号線の入力点または出力点から同じ配線長にあ
る解析座標の点を結んだ直線を求め、該直線と前記+信
号線及び−信号線とが作る角度をそれぞれ算出し、それ
らの角度を比較する手段と、該比較の結果に基づいて、
+信号と−信号の位相差の発生を検出する手段と、前記
+信号線及び−信号線上の全解析座標について位相差の
発生の有無を検出し、位相差のある区間の区間長の和を
求める手段と、前記位相差のある区間の区間長の和が所
定値よりも小さいか否かを判定する手段と、前記位相差
のある区間の区間長の和が所定値よりも小さくなかった
とき、警告を出力する手段とを備えたことを特徴とす
る。
Further, according to the present invention, in a wiring inspection apparatus for a printed circuit board, in a signal propagation direction on a + signal line and a − signal line of a differential signal line which is a wiring pattern to be inspected,
Means for generating analysis coordinates at a predetermined wiring length interval; obtaining a straight line connecting analysis signal points having the same wiring length from input or output points of the + signal line and the-signal line; And means for calculating the angles formed by the signal lines and comparing the angles, based on the result of the comparison,
Means for detecting the occurrence of a phase difference between the + signal and the-signal, and detecting the presence or absence of the occurrence of a phase difference for all the analysis coordinates on the + signal line and the-signal line, and calculating the sum of the section lengths of the sections having the phase difference. Means for determining, and means for determining whether or not the sum of the section lengths of the section having the phase difference is smaller than a predetermined value, and when the sum of the section lengths of the section having the phase difference is not smaller than a predetermined value. Means for outputting a warning.

【0014】また本発明は、プリント基板の配線パター
ンを生成する配線パターン生成装置であって、配線パタ
ーン生成後に、差動信号線に位相差が生じるか否かを検
査する手段を備えたことを特徴とする。前記検査の結
果、差動信号線路の位相差がある区間が長い場合は、位
相差がある区間がより短くなる配線パターンに変更する
手段をさらに備えてもよい。
According to the present invention, there is provided a wiring pattern generating apparatus for generating a wiring pattern of a printed circuit board, comprising means for inspecting whether or not a phase difference occurs in a differential signal line after generating the wiring pattern. Features. As a result of the inspection, when a section having a phase difference of the differential signal line is long, a means for changing to a wiring pattern in which a section having a phase difference becomes shorter may be further provided.

【0015】なお、本発明の対象とする配線パターン
は、多層の配線パターンでもよい。
The wiring pattern of the present invention may be a multilayer wiring pattern.

【0016】[0016]

【発明の実施の形態】以下、図面を用いて本発明の実施
の形態を説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0017】図1は、本発明の第1の実施形態の差動信
号配線の検査方法の流れを示すフローチャートである。
図中、Ldiffとは配線長差の許容値を示す。また、Lma
xとは位相差のある区間の和の許容値を示す。Ldiff及
びLmaxの値は予め決めておく。工程11では、差動信
号配線の配線座標を抽出する。工程12では、配線長差
とLdiffを比較する。工程13では位相差を検出する。
工程14では、位相差のある区間の区間長の和とLmax
を比較する。工程15では警告処理をする。以下、各工
程についてそれぞれ詳しく説明する。
FIG. 1 is a flowchart showing the flow of the method for testing a differential signal wiring according to the first embodiment of the present invention.
In the figure, Ldiff indicates an allowable value of the wiring length difference. Also, Lma
x indicates an allowable value of the sum of sections having a phase difference. The values of Ldiff and Lmax are determined in advance. In step 11, the wiring coordinates of the differential signal wiring are extracted. In step 12, the wiring length difference and Ldiff are compared. In step 13, a phase difference is detected.
In step 14, the sum of the section lengths of the sections having a phase difference and Lmax
Compare. In step 15, a warning process is performed. Hereinafter, each step will be described in detail.

【0018】差動信号の配線座標を抽出する工程11で
は、配線基板のCAD(Computer Aided Design)デー
タから、差動信号線の配線パターンを形成するのに必要
な位置情報(始点、終点、屈曲点の座標、層など)を抽
出する。
In step 11 for extracting the wiring coordinates of the differential signal, positional information (start point, end point, bending) necessary for forming a wiring pattern of the differential signal line is obtained from CAD (Computer Aided Design) data of the wiring board. Point coordinates, layers, etc.).

【0019】配線長差とLdiffを比較する工程12で
は、工程11で抽出した検査対象の配線の始点、終点、
及び屈曲点の座標からその配線の配線長を計算し、その
配線の対になる信号線(+線と−線)の配線長差を求
め、Ldiffと比較する。Ldiffは0が望ましいが、高密
度実装の場合などは必ずしも対になる信号のパターンを
等長にすることが難しい。そこで、許容範囲を、信号の
伝播速度を考慮して設定する。発明者のシミュレーショ
ンによると、250MHzの矩形波信号ではLdiff=1
0mm相当の値である。そして、配線長差がLdiffより
短い場合(16)は位相検出13を行い、配線長差がL
diffより長い場合(17)は警告処理15を行う。
In step 12 for comparing the wiring length difference and Ldiff, the starting point, the ending point,
Then, the wiring length of the wiring is calculated from the coordinates of the bending point, and the wiring length difference between the signal lines (+ line and-line) forming the pair of the wiring is obtained and compared with Ldiff. Although Ldiff is desirably 0, it is difficult to make the pattern of the paired signals equal in length in the case of high-density mounting. Therefore, the allowable range is set in consideration of the signal propagation speed. According to the inventor's simulation, Ldiff = 1 for a 250 MHz rectangular wave signal.
This is a value equivalent to 0 mm. If the wiring length difference is shorter than Ldiff (16), phase detection 13 is performed, and
If it is longer than diff (17), a warning process 15 is performed.

【0020】次に、位相差検出工程13について説明す
る。図2に、位相差検出工程13の処理手順を示す。位
相差検出工程13は、配線パターンの関数化21と、位
相差の有無を解析するための座標の生成22と、位相差
の有無の解析23と、解析終了判定24とからなる。位
相差検出工程13では、検査対象の配線パターンの始点
から終点までの位相差の有無を一定区間毎に調べる。以
下、図2の各処理について詳しく説明する。
Next, the phase difference detecting step 13 will be described. FIG. 2 shows a processing procedure of the phase difference detecting step 13. The phase difference detection step 13 includes a function 21 of the wiring pattern, generation of coordinates 22 for analyzing the presence / absence of a phase difference, analysis 23 of the presence / absence of a phase difference, and analysis end determination 24. In the phase difference detection step 13, the presence / absence of a phase difference from the start point to the end point of the wiring pattern to be inspected is checked for each fixed section. Hereinafter, each processing of FIG. 2 will be described in detail.

【0021】配線パターンの関数化21では、検査対象
である配線パターンの始点、終点、及び屈曲点の座標か
らその配線パターンを関数化する。例えば、図3の配線
パターンの場合、+信号線31の配線パターンの関数
は、y=Ys1(Xs1≦x≦Xa1),x=Xa1(Ya1≦y≦Yb1),y=yb1
(Xb1≦x≦Xc1),x=Xc1(Yd1≦y≦Yc1),y=Yd1(Xd1≦x≦X
e1)となる。また、−信号線32の配線パターンの関数
は、y=Ys2(Xs2≦x≦Xa2),x=Xa2(Yb2≦y≦Ya2),y=yb2
(Xb2≦x≦Xc2),x=Xc2(Yc2≦y≦Yd2),y=Yd2(Xd2≦x≦X
e2)となる。なお、図3では、図の横方向にx軸を、縦
方向にy軸をとっている。
In the function 21 of the wiring pattern, the wiring pattern to be inspected is converted into a function from the coordinates of the start point, the end point, and the bending point. For example, in the case of the wiring pattern of FIG. 3, the function of the wiring pattern of the + signal line 31 is y = Ys1 (Xs1 ≦ x ≦ Xa1), x = Xa1 (Ya1 ≦ y ≦ Yb1), y = yb1
(Xb1 ≦ x ≦ Xc1), x = Xc1 (Yd1 ≦ y ≦ Yc1), y = Yd1 (Xd1 ≦ x ≦ X
e1). The functions of the wiring pattern of the signal line 32 are as follows: y = Ys2 (Xs2 ≦ x ≦ Xa2), x = Xa2 (Yb2 ≦ y ≦ Ya2), y = yb2
(Xb2 ≦ x ≦ Xc2), x = Xc2 (Yc2 ≦ y ≦ Yd2), y = Yd2 (Xd2 ≦ x ≦ X
e2). In FIG. 3, the x axis is taken in the horizontal direction and the y axis is taken in the vertical direction.

【0022】位相差の有無を解析するための座標の生成
22は、出力ピン側から(入力ピン側からでも同じであ
る)信号の伝播する方向に沿って処理を行う。このた
め、配線パターンがx軸またはy軸に平行なパターンで
構成されている場合は、x軸またはy軸に沿って座標を
1づつ移動させながら処理を進める。具体的には、出力
ピン側から、配線パターンがy軸に平行な場合は信号の
伝播する方向にy座標を1移動させ、配線パターンがx
軸に平行な場合は信号の伝播する方向にx座標を1移動
させて、位相差の有無を解析する座標(以下、解析座標
と呼ぶ)を、終点座標(入力ピン側)と等しくなるま
で、順次生成する。例えば、図3の配線パターンでは、
図4に示すように、出力ピンの座標(Xs1,Ys1)41及び
(Xs2,Ys2)42から、(Xs1+1,Ys1)43及び(Xs2+1,Y
s2)44、(Xs1+2,Ys1)45及び(Xs2+2,Ys2)46、
…、(Xa1,Ya1)47及び(Xs2+n,Ys2)48、(Xa1,Ya1+
1)49及び(Xs2+n+1,Ys2)410、…、(Xs1,Ye1-
1)411及び(Xs2,Ye2-1)412、並びに、入力ピンの
座標(Xe1,Ye1)413及び(Xe2,Ye2)414を順次生成す
る。
The generation 22 of coordinates for analyzing the presence or absence of a phase difference is performed along the direction in which a signal propagates from the output pin side (the same applies to the input pin side). Therefore, when the wiring pattern is formed of a pattern parallel to the x-axis or the y-axis, the process proceeds while moving the coordinates one by one along the x-axis or the y-axis. Specifically, when the wiring pattern is parallel to the y-axis from the output pin side, the y coordinate is moved by one in the signal propagation direction, and
If it is parallel to the axis, the x coordinate is moved by one in the direction in which the signal propagates, and the coordinates for analyzing the presence or absence of the phase difference (hereinafter, referred to as the analysis coordinates) are changed until they become equal to the end point coordinates (input pin side). Generate sequentially. For example, in the wiring pattern of FIG.
As shown in FIG. 4, the coordinates (Xs1, Ys1) 41 of the output pin and
From (Xs2, Ys2) 42, (Xs1 + 1, Ys1) 43 and (Xs2 + 1, Y
s2) 44, (Xs1 + 2, Ys1) 45 and (Xs2 + 2, Ys2) 46,
..., (Xa1, Ya1) 47 and (Xs2 + n, Ys2) 48, (Xa1, Ya1 +
1) 49 and (Xs2 + n + 1, Ys2) 410,..., (Xs1, Ye1-
1) 411 and (Xs2, Ye2-1) 412, and input pin coordinates (Xe1, Ye1) 413 and (Xe2, Ye2) 414 are sequentially generated.

【0023】なお、後述する工程23では解析座標(X1,
Y1)及び(X2,Y2)を対象として処理を行うので、本工程2
2では現解析座標を1つ進めて次の解析座標(X1,Y1)及
び(X2,Y2)を求め、その解析座標(X1,Y1)及び(X2,Y2)を
出力するようにしている。そして、工程22→24→2
3と処理を行った後、再び工程22に来たとき、前の(X
1,Y1)及び(X2,Y2)を現解析座標とし、その現解析座標を
1つ進めて次の解析座標(X1,Y1)及び(X2,Y2)を求めて出
力する。例えば図3及び図4の例では、工程21から工
程22に進んだときには(X1,Y1)=(Xs1,Ys1)かつ(X2,Y
2)=(Xs2,Ys2)とし、工程22→24→23の処理を終
えて次に工程22に来たときには(X1,Y1)=(Xs1+1,Ys
1)かつ(X2,Y2)=(Xs2+1,Ys2)とし、また次に工程22
に来たときには(X1,Y1)=(Xs1+2,Ys1)かつ(X2,Y2)=
(Xs2+2,Ys2)とし、…という具合である。もちろん、
始めに工程22に入ったときに、図4のような処理対象
の配線パターン上の全解析座標を求めて保持しておき、
工程22に来たとき順番に出力するようにしてもよい。
In step 23 described later, the analysis coordinates (X1,
Since processing is performed for (Y1) and (X2, Y2), this process 2
In step 2, the current analysis coordinates are advanced by one to obtain the next analysis coordinates (X1, Y1) and (X2, Y2), and the analysis coordinates (X1, Y1) and (X2, Y2) are output. Then, steps 22 → 24 → 2
After performing the process 3 and when the process returns to step 22, the previous (X
(1, Y1) and (X2, Y2) are set as the current analysis coordinates, and the current analysis coordinates are advanced by one to obtain and output the next analysis coordinates (X1, Y1) and (X2, Y2). For example, in the examples of FIGS. 3 and 4, when the process proceeds from the step 21 to the step 22, (X1, Y1) = (Xs1, Ys1) and (X2, Y
2) = (Xs2, Ys2), and when the process of steps 22 → 24 → 23 is completed and the next step is to be performed, (X1, Y1) = (Xs1 + 1, Ys
1) and (X2, Y2) = (Xs2 + 1, Ys2), and then in step 22
(X1, Y1) = (Xs1 + 2, Ys1) and (X2, Y2) =
(Xs2 + 2, Ys2), and so on. of course,
First, when the process 22 is entered, all analysis coordinates on the wiring pattern to be processed as shown in FIG.
Output may be performed in order when the process 22 is reached.

【0024】また、位相差の有無を解析するための解析
座標の間隔は1ではなく、任意の値mでも構わない。こ
の場合、図5に示すような屈曲点52が出現した場合、
(Xn1,Yn1)51の次の解析座標は、m1+m2=mを
満たす(Xm1,Ym1)53とする。
The interval between the analysis coordinates for analyzing the presence or absence of the phase difference is not 1 but may be an arbitrary value m. In this case, when a bending point 52 as shown in FIG.
The analysis coordinate next to (Xn1, Yn1) 51 is (Xm1, Ym1) 53 satisfying m1 + m2 = m.

【0025】さらに、図6に示すようにX,Y軸に平行
でない配線パターン61や曲線62の場合は、1つ前の
解析座標(Xn,Yn)63からパターン長がm64となる位
置の座標を次の解析座標(Xm,Ym)65とする。
Further, as shown in FIG. 6, in the case of a wiring pattern 61 or a curve 62 which is not parallel to the X and Y axes, the coordinates of the position where the pattern length becomes m64 from the immediately preceding analysis coordinates (Xn, Yn) 63. Is set to the next analysis coordinate (Xm, Ym) 65.

【0026】再び図2に戻って、解析終了の判定24で
は、位相差の有無の解析が終点座標(入力ピン側)まで
終了したか否かを判定する。終了している場合は図2の
処理を終了し、そうでない場合は次の工程23に進む。
Returning to FIG. 2 again, in the determination 24 of the end of the analysis, it is determined whether or not the analysis of the presence / absence of the phase difference has been completed up to the end point coordinates (input pin side). If the processing has been completed, the processing in FIG. 2 ends, and if not, the flow proceeds to the next step 23.

【0027】次に、位相差の有無の解析23の方法を説
明する。図7に、位相差の有無の解析23の手順を示
す。図8に、位相差なしの場合と位相差ありの場合の配
線の例を示す。
Next, a method 23 for analyzing the presence or absence of a phase difference will be described. FIG. 7 shows the procedure of the analysis 23 for the presence or absence of a phase difference. FIG. 8 shows an example of wiring when there is no phase difference and when there is a phase difference.

【0028】位相差の有無の解析23では、まず、工程
22から出力された解析座標(X1,Y1)及び(X2,Y2)を通る
直線が配線の2本の信号線に対して作る角度θ1,θ2
を求める(工程71)。図8に示すように、位相差がな
い場合はθ1=θ2、位相差がある場合はθ1≠θ2と
なる。そこで、位相差の有無の判定はこの角度θ1,θ
2を比較する事により行う(工程72)。θ1≠θ2で
ある場合は(73)、この解析座標が位相差のある区間
の開始点か否かを判定する(工程74)。もし、位相差
がある区間の開始点であれば(75)、位相差がある区
間が発生したこと及びこの開始座標を記録し(工程7
6)、処理を終了する。位相差がある区間の開始点でな
い場合は(712)、この座標の解析を終了する。ま
た、工程72で位相差がないと判断した場合は(71
1)、この解析座標の点が位相差がある区間の終了点か
どうかを調べる(工程77)。もし、終了点であれば
(78)、位相差がある区間が終了したこと及びこの終
了座標を記録するとともに、該位相差がある区間の開始
点と終了点とその間にある屈曲点の座標から、該位相差
のある区間の和(配線長)を計算し(工程79)、この
座標の解析を終了する。工程77で、位相差のある区間
の終了でなければ(710)、この座標の解析を終了す
る。
In the analysis 23 of the presence / absence of a phase difference, first, a straight line passing through the analysis coordinates (X1, Y1) and (X2, Y2) output from the step 22 is formed at an angle θ1 formed with respect to two signal lines of the wiring. , Θ2
(Step 71). As shown in FIG. 8, when there is no phase difference, θ1 = θ2, and when there is a phase difference, θ1 ≠ θ2. Thus, the determination of the presence or absence of the phase difference is made by the angles θ1, θ
This is performed by comparing 2 (step 72). If θ1 ≠ θ2 (73), it is determined whether or not this analysis coordinate is the start point of a section having a phase difference (step 74). If it is the start point of the section having the phase difference (75), the occurrence of the section having the phase difference and the start coordinates are recorded (step 7).
6), end the process. If the phase difference is not the start point of a section (712), the analysis of the coordinates is terminated. If it is determined in step 72 that there is no phase difference, (71
1) It is checked whether or not the point of the analysis coordinates is the end point of a section having a phase difference (step 77). If it is the end point (78), the end of the section having the phase difference and the end coordinates are recorded, and the coordinates of the start point and the end point of the section having the phase difference and the coordinates of the inflection point therebetween are recorded. Then, the sum (interconnect length) of the section having the phase difference is calculated (step 79), and the analysis of the coordinates is completed. If it is determined in step 77 that the section having the phase difference does not end (710), the analysis of the coordinates is ended.

【0029】図17に、工程79で計算する位相差があ
る区間の和を説明するための配線の例を示す。位相差の
ある区間の開始点176と終了点177とその間にある
屈曲点178の座標から位相差のある区間の和を計算す
る。例えば、図17の上段の配線パターン171の場合
は、開始点176から終了点177に至る配線長を計算
する。図17の下段の配線パターン172の場合は、位
相差のある区間が2つあるので、それぞれの配線長L1
(174)とL2(175)の和L1+L2を計算す
る。
FIG. 17 shows an example of wiring for explaining the sum of sections having a phase difference calculated in step 79. The sum of the section having the phase difference is calculated from the coordinates of the start point 176 and the end point 177 of the section having the phase difference and the bending point 178 located therebetween. For example, in the case of the wiring pattern 171 in the upper part of FIG. 17, the wiring length from the start point 176 to the end point 177 is calculated. In the case of the wiring pattern 172 in the lower part of FIG. 17, since there are two sections having a phase difference, the respective wiring lengths L1
The sum L1 + L2 of (174) and L2 (175) is calculated.

【0030】再び図2に戻って、以上のような位相差の
有無の解析23を、解析座標を進めながら実行し、検査
対象の配線パターン上の全解析座標について解析を行
う。結果として、位相差がある区間全てのの開始座標と
終了座標、及びそれら位相差のある区間の配線長の和が
求められたことになる。
Returning to FIG. 2 again, the analysis 23 for the presence or absence of a phase difference as described above is performed while advancing the analysis coordinates, and analysis is performed for all the analysis coordinates on the wiring pattern to be inspected. As a result, the start coordinates and the end coordinates of all the sections having the phase difference and the sum of the wiring lengths of the sections having the phase difference are obtained.

【0031】再び図1に戻って、工程13の後、工程1
4に進む。工程14では、位相差のある区間の配線長の
和と予め設定した長さLmaxとを比較する。Lmaxは0が
望ましいが、Ldiffと同様の理由で、許容範囲をもたせ
るとよい。
Referring back to FIG. 1, after step 13, step 1
Proceed to 4. In step 14, the sum of the wiring lengths of the sections having the phase difference is compared with a preset length Lmax. Although Lmax is desirably 0, it is preferable to have an allowable range for the same reason as Ldiff.

【0032】工程14で位相差のある区間の配線長の和
がLmaxより長い場合は(18)、警告処理(工程1
5)を行い、処理を終了する。短い場合(位相差のある
区間の配線長の和=0を含む)は(19)、対になる信
号線のチェックを終了する。
If it is determined in step 14 that the sum of the wiring lengths in the section having the phase difference is longer than Lmax (18), a warning process (step 1)
5) is performed, and the process ends. If the length is short (including the sum of the wiring lengths of sections having a phase difference = 0) (19), the check of the paired signal lines is terminated.

【0033】警告処理工程15では、対になる信号線に
配線長差及び位相差があることを、テキスト表示、信号
線のハイライト表示、または警告音などでユーザに知ら
せる。また、ユーザに対してだけでなく、警告信号など
を出力することでシステムやアプリケーションソフトに
も知らせることができる。
In the warning processing step 15, the user is informed that there is a wiring length difference and a phase difference between the paired signal lines by text display, signal line highlight display, or warning sound. Also, not only the user, but also a warning signal or the like can be output to notify the system or application software.

【0034】以上説明した差動信号配線の検査方法を、
図9の配線パターン96,97の解析に適用した場合に
ついて説明する。ここでは、Ldiff=100,Lmax=10
0と設定する。まず、図1の工程11で、図9の差動信
号の配線座標(1000,1010)91,(2000,1010)910,(2
000,1110)911,(2050,1110)912,(2050,1010)9
13,(5000,1010)914,(1000,1000)92,(4000,10
00)920,(4000,900)921,(4050,900)922,(40
50,1000)923,(5000,1000)924を抽出する(な
お、括弧中の数値は座標値である)。そして、これらの
座標から、工程12で、配線96と配線97の配線長
を、配線96の配線長=4200、配線97の配線長=
4200と求め、工程12で配線長差<Ldiffと判定す
る(16)。
The differential signal wiring inspection method described above
A case where the present invention is applied to the analysis of the wiring patterns 96 and 97 in FIG. 9 will be described. Here, Ldiff = 100, Lmax = 10
Set to 0. First, in step 11 of FIG. 1, the wiring coordinates (1000, 1010) 91, (2000, 1010) 910, (2
(000,1110) 911, (2050,1110) 912, (2050,1010) 9
13, (5000,1010) 914, (1000,1000) 92, (4000,10
00) 920, (4000,900) 921, (4050,900) 922, (40
(50,1000) 923 and (5000,1000) 924 are extracted (the numerical values in parentheses are coordinate values). Then, in step 12, the wiring lengths of the wiring 96 and the wiring 97 are calculated from these coordinates by setting the wiring length of the wiring 96 to 4200 and the wiring length of the wiring 97 to 4200.
4200, and it is determined in step 12 that the wiring length difference <Ldiff (16).

【0035】次に、位相差の検出工程13を行う。図2
で説明した工程13では、まず、配線パターンを関数化
する(工程21)。配線96は、y=1010(1000≦x≦200
0),x=2000(1010≦y≦1110),y=1110(2000≦x≦2050),
x=2050(1010≦y≦1110),y=1010(2050≦x≦5000)、配線
97は、y=1000(1000≦x≦4000),x=4000(900≦y≦100
0),y=900(4000≦x≦4050),x=4050(900≦y≦1000),y=
1000(4050≦x≦5000)と関数化する。
Next, a phase difference detecting step 13 is performed. FIG.
In step 13 described above, first, the wiring pattern is converted into a function (step 21). The wiring 96 has y = 1010 (1000 ≦ x ≦ 200
0), x = 2000 (1010 ≦ y ≦ 1110), y = 1110 (2000 ≦ x ≦ 2050),
x = 2050 (1010 ≦ y ≦ 1110), y = 1010 (2050 ≦ x ≦ 5000), wiring 97, y = 1000 (1000 ≦ x ≦ 4000), x = 4000 (900 ≦ y ≦ 100
0), y = 900 (4000 ≦ x ≦ 4050), x = 4050 (900 ≦ y ≦ 1000), y =
Function as 1000 (4050 ≦ x ≦ 5000).

【0036】次に、解析座標を生成する(工程22)。
まず、配線パターンの開始座標(1000,1010)91と(100
0,1000)92を解析座標とし、ここでの位相差の有無を
解析する(工程23)。まず図7の工程71で、配線と
解析座標の点(1000,1010)91及び(1000,1000)92を通
る直線とが作る角度をθ1=90°,θ2=90°と求
める(図10)。そして、工程72でθ1=θ2と判定
する(711)。そこで、工程77で、位相差がある区
間の終了か否かを判定する。位相差がある区間の終了で
はないので(710)、この座標での解析(工程23)
を終了する。
Next, analysis coordinates are generated (step 22).
First, the starting coordinates (1000, 1010) 91 and (100
(0,1000) 92 is used as an analysis coordinate, and the presence or absence of a phase difference is analyzed here (step 23). First, in step 71 of FIG. 7, angles θ1 = 90 ° and θ2 = 90 ° are determined as angles formed by the wiring and a straight line passing through points (1000, 1010) 91 and (1000, 1000) 92 of the analysis coordinates (FIG. 10). . Then, it is determined in step 72 that θ1 = θ2 (711). Thus, in step 77, it is determined whether or not the section where the phase difference is present ends. Since it is not the end of the section where the phase difference is present (710), analysis using this coordinate (step 23)
To end.

【0037】そして、工程22で次の解析座標を生成す
る。図9及び図10に示すように、配線はx軸に平行で
あるので、x座標を信号の伝播する向きに移動させて
(この場合はx座標を+1する)、次の解析座標(100
1,1010)101及び(1001,1000)102を生成する。そし
て、同様に位相差の有無の解析(工程23)を行う。解
析座標が、x軸に平行部分の領域A93(図9)内にあ
る場合は、図10に示すように、θ1=θ2=90°で
位相差は生じないため、工程23では開始座標(1000,1
010)91及び(1000,1000)92と同じ処理を繰り返す。
Then, in step 22, the next analysis coordinates are generated. As shown in FIGS. 9 and 10, since the wiring is parallel to the x-axis, the x-coordinate is moved in the signal propagation direction (in this case, the x-coordinate is incremented by 1), and the next analysis coordinate (100
(1,1010) 101 and (1001,1000) 102 are generated. Then, an analysis of the presence or absence of a phase difference (step 23) is performed in the same manner. When the analysis coordinates are within the area A93 (FIG. 9) of the portion parallel to the x-axis, as shown in FIG. 10, since there is no phase difference at θ1 = θ2 = 90 °, the start coordinates (1000 , 1
010) The same processing as 91 and (1000, 1000) 92 is repeated.

【0038】そして、図9の解析座標(2000,1010)91
0及び(2000,1000)99までの解析が終わると、配線9
6はy軸に平行になる。そこで、図11に示すように、
配線96の解析座標は、y座標を信号の伝播方向に1移
動させて、(2000,1011)111となる。配線97はx軸
に平行なので、x座標を信号の伝播方向に1移動させ
て、(2001,1000)112となる。そして、ここでの位相
差の有無を解析する(工程23)。まず、図7の工程7
1で、配線96,97と解析座標(2000,1011)111及
び(2001,1000)112が通る直線とが作る角度をTanθ1
=1/11、Tanθ2=11と求め、工程72でθ1≠θ2と
判定する(73)。そこで位相差がある区間の開始かど
うかを判定する(工程74)。この場合、この解析座標
は位相差がある区間の開始であるので(75)、位相差
が発生したこと、及び位相差発生の開始座標である(200
0,1011)111と(2001,1000)112を記録し(工程7
6)、この解析座標の位相差の有無の解析を終了する。
Then, the analysis coordinates (2000, 1010) 91 in FIG.
When the analysis up to 0 and (2000,1000) 99 is completed, wiring 9
6 is parallel to the y-axis. Therefore, as shown in FIG.
The analysis coordinates of the wiring 96 are (2000, 1011) 111 by moving the y coordinate by one in the signal propagation direction. Since the wiring 97 is parallel to the x-axis, the x-coordinate is moved by one in the signal propagation direction to become (2001, 1000) 112. Then, the presence or absence of the phase difference is analyzed (step 23). First, step 7 in FIG.
1, the angle formed by the lines 96 and 97 and the straight line passing through the analysis coordinates (2000, 1011) 111 and (2001, 1000) 112 is Tanθ1.
= 1/11, Tan θ2 = 11, and it is determined in step 72 that θ1 ≠ θ2 (73). Then, it is determined whether or not the phase difference is the start of a section (step 74). In this case, since the analysis coordinates are the start of the section having the phase difference (75), the analysis coordinates are the occurrence coordinates of the phase difference and the start coordinates of the phase difference occurrence (200
(0,1011) 111 and (2001,1000) 112 are recorded (step 7).
6), the analysis of the presence / absence of a phase difference between the analysis coordinates ends.

【0039】さらに、次に解析する座標を生成する(工
程22)。図11に示すように、次の解析座標(2000,10
12)113及び(2002,1000)114でもθ1≠θ2とな
る。そこで、位相差がある区間の開始かどうかを判定す
る(工程74)。この解析座標は位相差がある区間の開
始ではない(712)ので、この座標の位相差の有無の
解析(工程23)を終了する。そして、次に解析する座
標を生成する(工程22)。解析座標が図9の領域B9
4内にある間は、(2000,1012)113及び(2002,1000)1
14と同じ処理を繰り返す。
Further, coordinates to be analyzed next are generated (step 22). As shown in FIG. 11, the next analysis coordinates (2000, 10
12) 113 and (2002, 1000) 114 also satisfy θ1 ≠ θ2. Then, it is determined whether or not the phase difference is the start of a section (step 74). Since the analysis coordinates are not the start of the section having the phase difference (712), the analysis of the presence or absence of the phase difference of the coordinates (step 23) is completed. Then, the coordinates to be analyzed next are generated (step 22). The analysis coordinates are the area B9 in FIG.
4 while (2000,1012) 113 and (2002,1000) 1
The same processing as in step 14 is repeated.

【0040】そして、解析座標が図9の(4050,1010)9
8及び(4050,1000)923になると、図12に示すよう
に、θ1=θ2=90°となる。このため、工程72で
位相差がない(711)と判定する。そこで、位相差の
ある区間の終了か否かを判定する(工程77)。この解
析座標は、位相差がある区間の終了(78)であるの
で、位相差がある区間が終了したこと、及び位相差のあ
る区間の終了座標である(4050,1010)98,(4050,100
0)923を記録する(工程79)。さらに、位相差のあ
る区間の配線長の計算を行う(工程79)。この場合、
位相差のある区間の配線長は、記録してある配線96の
位相差の開始座標(2000,1011)111、終了座標(4050,
1010)98、及びそれらの間にある屈曲点の座標(2000,1
110)911,(2050,1110)912,(2050,1010)913か
ら求められ、位相差のある区間の配線長=99+50+
100+2000=2249(図13)である。そし
て、この座標の位相差の有無の解析を終了する。
The analysis coordinates are (4050,1010) 9 in FIG.
8 and (4050,1000) 923, θ1 = θ2 = 90 ° as shown in FIG. Therefore, it is determined in step 72 that there is no phase difference (711). Therefore, it is determined whether or not the section having the phase difference ends (step 77). Since the analysis coordinates are the end (78) of the section having the phase difference, the end coordinates of the section having the phase difference and the end coordinates of the section having the phase difference are (4050, 1010) 98, (4050, 100
0) 923 is recorded (step 79). Further, the wiring length of a section having a phase difference is calculated (step 79). in this case,
The wiring length of the section having a phase difference is represented by the start coordinate (2000, 1011) 111 and the end coordinate (4050,
1010) 98 and the coordinates of the inflection point between them (2000, 1
110) 911, (2050, 1110) 912, (2050, 1010) 913, obtained from (913), and the wiring length of a section having a phase difference = 99 + 50 +
100 + 2000 = 2249 (FIG. 13). Then, the analysis of the presence / absence of a phase difference between the coordinates is completed.

【0041】次の解析座標121,122(図12)
は、θ1=θ2=90°で位相差はなく(711)、ま
た位相差のある区間の終了ではない(710)ので、こ
の座標の位相差の有無の解析を終了する。同様の処理を
繰り返し、解析座標が配線パターンの終点座標と等しく
なると、工程24で解析終了と判定し、位相差の検出工
程13を終了する。そして、位相差のある区間の和=2
249であるので、工程14で位相差のある区間の和>
Lmaxと判定し、工程15で、位相差のある区間が長い
ことをテキスト表示、信号線のハイライト表示、警告
音、または警告信号などでユーザまたはシステムやアプ
リケーションソフトに知らせる。
The next analysis coordinates 121 and 122 (FIG. 12)
Since there is no phase difference at θ1 = θ2 = 90 ° (711) and the end of the section with the phase difference is not completed (710), the analysis of the presence or absence of the phase difference at this coordinate is ended. The same processing is repeated, and when the analysis coordinates become equal to the end point coordinates of the wiring pattern, it is determined in step 24 that the analysis is completed, and the phase difference detection step 13 is completed. Then, the sum of sections having a phase difference = 2
249, the sum of sections having a phase difference in step 14>
Lmax is determined, and in step 15, the user or the system or application software is notified of the fact that the section having the phase difference is long by text display, signal line highlight display, a warning sound, or a warning signal.

【0042】なお上記実施の形態では、位相差の有無の
判定をθ1=θ2か否かを判定することで行う方法を用
いたが、この場合、図14に示すように、位相差が小さ
い場合でも警告対象になってしまう。このため、位相差
の許容範囲を持たせ、|θ1−θ2|<θ0(θ0はあ
らかじめ決めた値)を判定することで位相差の有無の判
定を行うようにしてもよい。また、本実施の形態では、
位相差のある区間の和は、位相差のある区間の終了座標
の解析時に計算したが、位相差のある区間での解析時に
積算していくことで求めてもよい。
In the above embodiment, the method of determining the presence or absence of a phase difference by determining whether or not θ1 = θ2 is used. In this case, as shown in FIG. But it becomes a warning target. For this reason, the presence or absence of a phase difference may be determined by giving an allowable range of the phase difference and determining | θ1−θ2 | <θ0 (θ0 is a predetermined value). In the present embodiment,
The sum of the sections having the phase difference is calculated at the time of analyzing the end coordinates of the section having the phase difference, but may be obtained by integrating at the time of the analysis at the section having the phase difference.

【0043】次に、本発明の第2の実施の形態を説明す
る。上記第1の実施の形態では、配線基板上の1層の配
線パターンを対象とした。一方、複数の配線層を備えた
配線基板では、配線層によって信号の伝播速度が異な
る。このため、対になる信号の位相を合わせるために
は、配線パターンに層の入れ替えが生じる場合は、対に
なる信号の層が入れ替わる場所はできるだけ近くである
ことが望ましい。そこで、次に説明する第2の実施の形
態では、複数の配線層を備えた配線基板に配線する場合
の対になる信号の配線チェック方法を説明する。
Next, a second embodiment of the present invention will be described. The first embodiment is directed to a single-layer wiring pattern on a wiring board. On the other hand, in a wiring board having a plurality of wiring layers, the signal propagation speed differs depending on the wiring layer. For this reason, in order to match the phases of the paired signals, when the wiring patterns are switched, it is desirable that the places where the paired signal layers are switched be as close as possible. Therefore, in a second embodiment described below, a method of checking wiring of a pair of signals when wiring is performed on a wiring board having a plurality of wiring layers will be described.

【0044】図15に、本発明の弟2の実施形態の差動
信号の配線の検査方法の工程の流れを示す。本検査方法
は、対になる信号の配線座標を抽出する工程11と、配
線長差と予め設定した長さLdiffを比較する工程12
と、層の入れ替えがあるかを判定する工程151と、対
になる2線の層が入れ替わる場所の距離が予め設定され
た距離Lvより短いか否かを判定する工程152と、位
相差を検出する工程13と、位相差のある区間の和と予
め設定した長さLmaxを比較する工程14と、警告処理
をする工程15とで構成される。
FIG. 15 shows a flow of steps of a method for inspecting differential signal wiring according to the second embodiment of the present invention. The inspection method includes a step 11 of extracting wiring coordinates of a paired signal and a step 12 of comparing a wiring length difference with a preset length Ldiff.
A step 151 of determining whether or not the layers are switched; a step 152 of determining whether the distance of the place where the pair of two-layer layers are switched is shorter than a predetermined distance Lv; 13, a step 14 of comparing the sum of sections having a phase difference with a preset length Lmax, and a step 15 of performing a warning process.

【0045】工程11と12は、図1の同じ番号の工程
と同様の処理である。ただし、本実施の形態では、多層
にわたる配線が検査対象であるから、配線座標は3次元
のxyz座標で表現され、配線長もxyz座標系での長
さになる。
Steps 11 and 12 are the same as the steps of the same numbers in FIG. However, in the present embodiment, since wirings over multiple layers are to be inspected, the wiring coordinates are represented by three-dimensional xyz coordinates, and the wiring length is also a length in the xyz coordinate system.

【0046】層の入れ替えがあるか否かを判定する工程
151は、2本の配線パターンの層の入れ替えの有無を
判定する。層の入れ替えがない場合は(153)、第1
の実施形態の方法と同様に、位相差の検出13を行う。
層の入れ替えがある場合は(154)、対になる2線の
層が入れ替わる場所の距離が予め設定された距離Lvよ
り短いか否かを判定する工程152で、対になる2本の
配線の層が入れ替わる位置の距離が予め設定した値Lv
より短い距離であるか否かを判定する。対になる2線の
層が入れ替わる場所の距離は2信号の配線パターン間隔
であることが望ましいが、許容範囲は、パターン間隔と
各配線層での信号の伝播速度によって決める。対になる
2線の層が入れ替わる場所の距離が距離Lvより短い場
合は(155)、第1の実施形態の方法と同様に位相差
の検出13を行い、そうでない場合は、警告処理15を
行う。
The step 151 of judging whether or not the layers have been exchanged judges whether or not the layers of the two wiring patterns have been exchanged. If there is no layer exchange (153), the first
The phase difference detection 13 is performed in the same manner as in the method of the embodiment.
If the layers are exchanged (154), it is determined in step 152 whether or not the distance of the place where the layers of the two wires to be exchanged are shorter is shorter than a preset distance Lv. The distance between the positions where the layers are switched is a preset value Lv
It is determined whether or not the distance is shorter. It is desirable that the distance at which the layers of the two lines forming a pair are switched be the wiring pattern interval of two signals, but the allowable range is determined by the pattern interval and the signal propagation speed in each wiring layer. If the distance of the place where the layers of the two lines forming the pair are switched is shorter than the distance Lv (155), the phase difference detection 13 is performed in the same manner as in the method of the first embodiment. Do.

【0047】位相差検出工程13、位相差のある区間長
の和とLmaxとの比較の工程14、及び警告処理工程1
5は、図1の同じ番号の工程と同様の処理である。警告
処理をする工程15では、配線長差が大きいこと、位相
差がある区間が長いことを警告することに加えて、2線
の層が入れ替わる場所が離れていることを警告する場合
がある。
A phase difference detecting step 13, a step 14 for comparing the sum of the section lengths having a phase difference with Lmax, and a warning processing step 1
5 is a process similar to the process of the same number in FIG. In step 15 of performing the warning process, in addition to warning that the wiring length difference is large and that the section having the phase difference is long, there is a case that a warning is given that the place where the layers of the two wires are exchanged is distant.

【0048】図16の上段は、2線の配線長差がLdiff
より小さく、層が入れ替わる場所162があり、入れ替
わる場所の距離L1(163)及びL2(164)がL
vより小さい配線パターン161を示す。配線パターン
161において、実線で示した部分と点線で示した部分
とは別の層に配線されているものとする。図15の手順
でこの配線パターン161を検査する場合、配線長差と
予め設定した長さLdiffを比較する工程12で、配線長
差がLdiffより小さいと判定し(16)、層の入れ替え
があるかを判定する工程151で、層の入れ替えがある
と判定し(154)、2線の層が入れ替わる場所の距離
が予め設定された距離Lvより短いかを判定する工程1
52で、Lvより小さいと判定し(155)、位相差検
出工程13を行う。以後、第1の実施の形態と同じ処理
を行う。
In the upper part of FIG. 16, the difference between the two wiring lengths is Ldiff.
There is a smaller location 162 where the layers are switched, and the distances L1 (163) and L2 (164) of the switched locations are L
14 shows a wiring pattern 161 smaller than v. In the wiring pattern 161, it is assumed that the portion indicated by the solid line and the portion indicated by the dotted line are wired in different layers. When the wiring pattern 161 is inspected according to the procedure shown in FIG. 15, it is determined that the wiring length difference is smaller than Ldiff in the step 12 of comparing the wiring length difference with a preset length Ldiff (16), and the layers are switched. In step 151 for determining whether or not the layers are switched (154), it is determined whether the distance of the place where the two-line layers are switched is shorter than a preset distance Lv.
At 52, it is determined that the value is smaller than Lv (155), and the phase difference detecting step 13 is performed. After that, the same processing as in the first embodiment is performed.

【0049】図16の中段は、2線の配線長差がLdiff
より小さく、層が入れ替わる場所162があり、入れ替
わる場所の距離L3(165)がLvより大きい配線パ
ターン164を示す。配線パターン164において、実
線で示した部分と点線で示した部分とは別の層に配線さ
れているものとする。図15の手順でこの配線パターン
164を検査する場合、配線長差と予め設定した長さL
diffを比較する工程12で、配線長差がLdiffより小さ
いと判定し(16)、層の入れ替えがあるかを判定する
工程151で、層の入れ替えがあると判定し(15
4)、配線の層が入れ替わる場所の距離が予め設定され
た距離Lvより短いかを判定する工程152で、Lvよ
り大きい(156)と判定する。そして、工程15で2
線の層が入れ替わる場所が離れていることを警告する。
In the middle part of FIG. 16, the wiring length difference between the two lines is Ldiff.
There is a wiring pattern 164 that is smaller and has a place 162 where layers are switched, and the distance L3 (165) of the place where the layers are switched is larger than Lv. In the wiring pattern 164, it is assumed that the part shown by the solid line and the part shown by the dotted line are wired in different layers. When inspecting this wiring pattern 164 in the procedure of FIG. 15, the wiring length difference and the preset length L
In the step of comparing diff, it is determined that the wiring length difference is smaller than Ldiff (16), and in the step 151 of determining whether or not the layers are replaced, it is determined that the layers are replaced (15).
4) In step 152 of determining whether the distance of the place where the wiring layers are switched is shorter than a preset distance Lv, it is determined that the distance is larger than Lv (156). Then, in step 15, 2
Warns that the places where the line layers change places are far apart.

【0050】第1及び第2の実施の形態の配線検査方法
は、上記検査手順に従って処理を実行するプログラムで
具現化できる。また、上記検査手順を実行するプログラ
ムを計算機に実装して動作させることにより、配線検査
装置が具現化できる。
The wiring inspection methods of the first and second embodiments can be embodied by a program that executes processing according to the above inspection procedure. Also, a wiring inspection device can be embodied by mounting a program for executing the above inspection procedure on a computer and operating the computer.

【0051】次に、本発明の差動信号の配線検査方法を
配線パターン生成装置に適用した例を説明する。図20
は、配線パターン生成装置のパターン生成方法を説明す
るフローチャートである。配線パターン生成装置での配
線パターン生成は、配線パターン生成工程201と、差
動信号の配線を検査する工程202と、配線パターンを
変更する工程204とからなる。工程201で生成され
た配線パターンに対して、工程202で、本発明に係る
差動信号配線の検査を行う。例えば、上述の実施の形態
の検査方法を適用すればよい。工程202でNG、すな
わち警告が発生した場合は(206)、工程204で該
当する配線パターンを変更する。工程204の配線パタ
ーンの変更では、例えば、差動信号線路の位相差がある
区間が長い場合、その位相差がある区間を、より短くす
るような配線パターンに、変更する。
Next, an example in which the wiring inspection method for differential signals of the present invention is applied to a wiring pattern generating apparatus will be described. FIG.
5 is a flowchart illustrating a pattern generation method of the wiring pattern generation device. The generation of the wiring pattern by the wiring pattern generation apparatus includes a wiring pattern generation step 201, a step 202 of inspecting the wiring of the differential signal, and a step 204 of changing the wiring pattern. In step 202, the differential signal wiring according to the present invention is inspected for the wiring pattern generated in step 201. For example, the inspection method of the above embodiment may be applied. If NG, that is, a warning occurs in step 202 (206), the corresponding wiring pattern is changed in step 204. In the change of the wiring pattern in the step 204, for example, when the section having the phase difference of the differential signal line is long, the section having the phase difference is changed to a wiring pattern that shortens the section.

【0052】[0052]

【発明の効果】以上説明したように、本発明によれば、
1層あるいは多層のプリント基板の配線パターンに対し
て、差動信号配線の位相差検出が可能となり、放射ノイ
ズがより少ない基板を作成することができる。配線パタ
ーン生成装置に本発明を適用することで、差動信号線路
の位相差がある区間が短くなるような配線パターンを自
動生成できる。
As described above, according to the present invention,
With respect to a wiring pattern of a single-layer or multi-layer printed circuit board, the phase difference of the differential signal wiring can be detected, and a board with less radiation noise can be produced. By applying the present invention to the wiring pattern generation device, it is possible to automatically generate a wiring pattern in which a section having a phase difference between the differential signal lines is shortened.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る差動信号の配線の検査方法のフロ
ーチャート図
FIG. 1 is a flowchart of a differential signal wiring inspection method according to the present invention.

【図2】位相差検出工程を表わすフローチャート図FIG. 2 is a flowchart showing a phase difference detecting step.

【図3】配線パターンの関数化を説明する図FIG. 3 is a diagram for explaining functioning of a wiring pattern;

【図4】解析座標の生成方法を説明する図FIG. 4 is a diagram illustrating a method of generating analysis coordinates.

【図5】屈曲点での解析座標の生成方法を説明する図FIG. 5 is a diagram illustrating a method of generating analysis coordinates at a bending point.

【図6】斜線、曲線の配線パターンでの解析座標の生成
方法を説明する図
FIG. 6 is a view for explaining a method of generating analysis coordinates in oblique and curved wiring patterns;

【図7】位相差の有無の解析工程を表わすフローチャー
ト図
FIG. 7 is a flowchart illustrating an analysis process of the presence or absence of a phase difference;

【図8】位相差の有無の判定方法を説明する図FIG. 8 is a view for explaining a method for determining the presence or absence of a phase difference;

【図9】検査対象の配線パターンを示す図FIG. 9 is a diagram showing a wiring pattern to be inspected;

【図10】領域Aでの位相差の有無を判定する方法を説
明する図
FIG. 10 is a view for explaining a method for determining the presence or absence of a phase difference in a region A;

【図11】領域Bでの位相差の有無を判定する方法を説
明する図
FIG. 11 is a view for explaining a method for determining the presence or absence of a phase difference in a region B;

【図12】領域Cでの位相差の有無を判定する方法を説
明する図
FIG. 12 is a view for explaining a method for determining the presence or absence of a phase difference in a region C;

【図13】位相差のある区間の長さを説明する図FIG. 13 is a view for explaining the length of a section having a phase difference;

【図14】位相差の発生を説明する図FIG. 14 is a diagram illustrating generation of a phase difference.

【図15】第2の実施形態の差動信号線路の検査方法の
フローチャート図
FIG. 15 is a flowchart of the differential signal line inspection method according to the second embodiment;

【図16】層の入れ替えがある配線パターンを示す図FIG. 16 is a diagram showing a wiring pattern in which layers are exchanged.

【図17】位相差がある区間の和を説明する図FIG. 17 is a view for explaining the sum of sections having a phase difference;

【図18】+線と−線の位相差を説明する図FIG. 18 is a view for explaining a phase difference between a + line and a − line.

【図19】位相差のある区間と放射ノイズの関係を示す
FIG. 19 is a diagram showing a relationship between a section having a phase difference and radiation noise.

【図20】パターン生成方法を説明するフローチャート
FIG. 20 is a flowchart illustrating a pattern generation method.

【符号の説明】[Explanation of symbols]

11〜19…差動信号配線の検査工程、21〜24…位
相差検出工程、31…+信号線、32…−信号線、41
〜42…出力ピンの座標、43〜49…屈曲点の座標、
410〜412…屈曲点の座標、413〜414…入力
ピンの座標、51…前の解析座標(Xn1,Yn1)、52…
屈曲点、53…次の解析座標た(Xm1,Ym1)、61…
X、Y軸に平行でない配線パターン61、62…曲線の
配線パターン、63…1つ前の解析座標(Xn,Yn)、64
…パターン長m、65…次の解析座標(Xm,Ym)、71
〜77,710…位相差の有無の解析工程、81…解析
座標(X1,Y1)、82…解析座標(X2,Y2)、83…解析座標
(X1,Y1)と(X2,Y2)を通る直線、84…配線と解析座標が
作る角度θ1、85…配線と解析座標が作る角度θ2、
93…領域A、94…領域B、95…領域C、96,9
7…配線パターン、98,99…解析座標、91,91
0〜914…配線座標、92,920〜924…配線座
標、101,102…解析座標、98,99…解析座
標、111,112,113,114,121,122
…解析座標、151〜155層入れ替えの検査工程、1
61…配線パターン、162…層が入れ替わる場所、1
63…入れ替わる場所の距離L1、164…入れ替わる
場所の距離L2、165…入れ替わる場所の距離L3、
171…配線パターン、172…配線パターン、173
…位相差のある区間の長さ、174…位相差のある区間
の長さL1、175…位相差のある区間の長さL2、1
76…開始点、177…終了点、178…屈曲点、20
1,202,205〜206…配線パターンの生成工
程。
11-19: Differential signal wiring inspection step, 21-24: Phase difference detection step, 31 ... + signal line, 32 ...- signal line, 41
~ 42 ... coordinates of output pins, 43 to 49 ... coordinates of bending points,
410 to 412: coordinates of a bending point; 413 to 414: coordinates of an input pin; 51: previous analysis coordinates (Xn1, Yn1);
Bending point, 53 ... The next analysis coordinates (Xm1, Ym1), 61 ...
Wiring patterns 61 and 62 that are not parallel to the X and Y axes Curve wiring patterns 63 63 Previous analysis coordinates (Xn, Yn), 64
... pattern length m, 65 ... next analysis coordinates (Xm, Ym), 71
7777,710: Analysis step for the presence or absence of a phase difference, 81: Analysis coordinates (X1, Y1), 82: Analysis coordinates (X2, Y2), 83: Analysis coordinates
A straight line passing through (X1, Y1) and (X2, Y2), 84: angle θ1 formed by the wiring and the analysis coordinates, 85: angle θ2 formed by the wiring and the analysis coordinates,
93 ... Area A, 94 ... Area B, 95 ... Area C, 96, 9
7: wiring pattern, 98, 99: analysis coordinates, 91, 91
0-914 ... wiring coordinates, 92, 920-924 ... wiring coordinates, 101, 102 ... analysis coordinates, 98, 99 ... analysis coordinates, 111, 112, 113, 114, 121, 122
... Analytical coordinates, inspection process for replacing 151-155 layers, 1
61: wiring pattern, 162: place where layers are switched, 1
63: distances L1 and 164 of the places to be replaced L2 and 165 ... distances of the places to be replaced
171: wiring pattern, 172: wiring pattern, 173
... The length of a section with a phase difference, 174... The length L1 of the section with a phase difference, 175.
76 ... Start point, 177 ... End point, 178 ... Bend point, 20
1, 202, 205 to 206: wiring pattern generation step.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 横田 等 神奈川県海老名市下今泉810番地 株式会 社日立製作所PC事業部内 Fターム(参考) 2G014 AA10 AB59 AC09  ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yokota et al. 810 Shimoimaizumi, Ebina-shi, Kanagawa F-term in PC Division, Hitachi, Ltd. F-term (reference) 2G014 AA10 AB59 AC09

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】プリント基板の配線検査方法において、検
査対象の配線パターンの差動信号線路の+信号と−信号
の位相差を検出することを特徴とする配線検査方法。
1. A wiring inspection method for a printed circuit board, comprising detecting a phase difference between a + signal and a-signal of a differential signal line of a wiring pattern to be inspected.
【請求項2】プリント基板の配線検査方法において、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成するステップと、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較するステップと、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出するステップとを備えたことを特徴とする配線
検査方法。
2. A wiring inspection method for a printed circuit board, wherein analysis coordinates are generated at predetermined wiring length intervals in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line as a wiring pattern to be inspected. And calculating a straight line connecting the points of the analysis coordinates having the same wiring length from the input points or the output points of the + signal line and the − signal line, and calculating the angles formed by the straight line and the + signal line and the − signal line, respectively. A wiring inspection method, comprising: calculating and comparing angles thereof; and detecting occurrence of a phase difference between a + signal and a − signal based on a result of the comparison.
【請求項3】プリント基板の配線検査方法において、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成するステップと、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較するステップと、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出するステップと、 前記+信号線及び−信号線上の全解析座標について位相
差の発生の有無を検出し、位相差のある区間の区間長の
和を求めるステップと、 前記位相差のある区間の区間長の和が所定値よりも小さ
いか否かを判定するステップと、 前記位相差のある区間の区間長の和が所定値よりも小さ
くなかったとき、警告を出力するステップとを備えたこ
とを特徴とする配線検査方法。
3. A wiring inspection method for a printed circuit board, wherein analysis coordinates are generated at predetermined wiring length intervals in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line as a wiring pattern to be inspected. And calculating a straight line connecting the points of the analysis coordinates having the same wiring length from the input points or the output points of the + signal line and the − signal line, and calculating the angles formed by the straight line and the + signal line and the − signal line, respectively. Calculating and comparing the angles; detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison; Detecting the presence or absence of a phase difference, obtaining the sum of the section lengths of the sections with a phase difference, and determining whether the sum of the section lengths of the sections with a phase difference is smaller than a predetermined value; With the phase difference When the section length sum between is not less than the predetermined value, wiring inspection method characterized by comprising the step of outputting a warning.
【請求項4】プリント基板の配線検査を行うプログラム
を記憶した記憶媒体であって、 該プログラムは、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成するステップと、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較するステップと、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出するステップとを備えたことを特徴とする記憶
媒体。
4. A storage medium storing a program for inspecting wiring of a printed circuit board, the program comprising: a signal propagation on a + signal line and a − signal line of a differential signal line which is a wiring pattern to be inspected. Generating analysis coordinates at predetermined wiring length intervals in the direction, obtaining a straight line connecting the points of the analysis coordinates having the same wiring length from the input points or output points of the + signal line and the-signal line, and The method includes the steps of calculating angles formed by the + signal line and the − signal line and comparing the angles, and detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison. A storage medium characterized by the following.
【請求項5】プリント基板の配線検査を行うプログラム
を記憶した記憶媒体であって、 該プログラムは、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成するステップと、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較するステップと、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出するステップと、 前記+信号線及び−信号線上の全解析座標について位相
差の発生の有無を検出し、位相差のある区間の区間長の
和を求めるステップと、 前記位相差のある区間の区間長の和が所定値よりも小さ
いか否かを判定するステップと、 前記位相差のある区間の区間長の和が所定値よりも小さ
くなかったとき、警告を出力するステップとを備えたこ
とを特徴とする記憶媒体。
5. A storage medium storing a program for inspecting wiring of a printed circuit board, the program comprising: a signal propagation on a + signal line and a − signal line of a differential signal line which is a wiring pattern to be inspected. Generating analysis coordinates at predetermined wiring length intervals in the direction, obtaining a straight line connecting the points of the analysis coordinates having the same wiring length from the input points or output points of the + signal line and the-signal line, and Calculating each of the angles formed by the + signal line and the − signal line, and comparing the angles; detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison; Detecting the presence or absence of a phase difference with respect to all the analysis coordinates on the + signal line and the − signal line to obtain the sum of the section lengths of the sections having the phase difference; Less than value Determining whether, when the sum of the section length of the section of the phase difference is not less than the predetermined value, the storage medium characterized by comprising a step of outputting a warning.
【請求項6】プリント基板の配線検査装置において、検
査対象の配線パターンの差動信号線路の+信号と−信号
の位相差を検出する手段を備えたことを特徴とする配線
検査装置。
6. An apparatus for inspecting wiring of a printed circuit board, comprising means for detecting a phase difference between a + signal and a-signal of a differential signal line of a wiring pattern to be inspected.
【請求項7】プリント基板の配線検査装置において、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成する手段と、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較する手段と、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出する手段とを備えたことを特徴とする配線検査
装置。
7. A printed circuit board wiring inspection apparatus, wherein analysis coordinates are generated at predetermined wiring length intervals in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line which is a wiring pattern to be inspected. Means for obtaining a straight line connecting points of analysis coordinates having the same wiring length from input points or output points of the + signal line and the-signal line, and determining angles formed by the straight line and the + signal line and the-signal line, respectively. A wiring inspection apparatus comprising: means for calculating and comparing angles thereof; and means for detecting occurrence of a phase difference between a + signal and a − signal based on a result of the comparison.
【請求項8】プリント基板の配線検査装置において、 検査対象の配線パターンである差動信号線路の+信号線
上、及び−信号線上の信号の伝播方向に、所定配線長間
隔で解析座標を生成する手段と、 +信号線及び−信号線の入力点または出力点から同じ配
線長にある解析座標の点を結んだ直線を求め、該直線と
前記+信号線及び−信号線とが作る角度をそれぞれ算出
し、それらの角度を比較する手段と、 該比較の結果に基づいて、+信号と−信号の位相差の発
生を検出する手段と、 前記+信号線及び−信号線上の全解析座標について位相
差の発生の有無を検出し、位相差のある区間の区間長の
和を求める手段と、 前記位相差のある区間の区間長の和が所定値よりも小さ
いか否かを判定する手段と、 前記位相差のある区間の区間長の和が所定値よりも小さ
くなかったとき、警告を出力する手段とを備えたことを
特徴とする配線検査装置。
8. A wiring inspection apparatus for a printed circuit board, wherein analysis coordinates are generated at predetermined wiring length intervals in a signal propagation direction on a positive signal line and a negative signal line of a differential signal line as a wiring pattern to be inspected. Means for obtaining a straight line connecting points of analysis coordinates having the same wiring length from input points or output points of the + signal line and the-signal line, and determining angles formed by the straight line and the + signal line and the-signal line, respectively. Means for calculating and comparing those angles; means for detecting the occurrence of a phase difference between the + signal and the − signal based on the result of the comparison; Means for detecting the presence or absence of occurrence of a phase difference, obtaining a sum of section lengths of sections having a phase difference, and means for determining whether or not the sum of section lengths of the sections having a phase difference is smaller than a predetermined value; The sum of the section lengths of the section having the phase difference is When not smaller than the value, wiring inspection apparatus characterized by comprising a means for outputting a warning.
【請求項9】プリント基板の配線パターンを生成する配
線パターン生成装置であって、配線パターン生成後に、
差動信号線に位相差が生じるか否かを検査する手段を備
えたことを特徴とする配線パターン生成装置。
9. A wiring pattern generating apparatus for generating a wiring pattern on a printed circuit board, comprising:
A wiring pattern generation device, comprising: means for checking whether or not a phase difference occurs in a differential signal line.
【請求項10】請求項9に記載の配線パターン生成装置
において、 前記検査の結果、差動信号線路の位相差がある区間が長
い場合は、位相差がある区間がより短くなる配線パター
ンに変更する手段を備えたことを特徴とする配線パター
ン生成装置。
10. The wiring pattern generating apparatus according to claim 9, wherein, as a result of the inspection, when a section having a phase difference of the differential signal line is long, the section is changed to a wiring pattern having a shorter section having a phase difference. A wiring pattern generation device, comprising:
JP00881399A 1999-01-18 1999-01-18 Printed circuit board wiring inspection method, inspection apparatus, and wiring pattern generation apparatus Expired - Fee Related JP4079296B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100412506C (en) * 2005-12-15 2008-08-20 鸿富锦精密工业(深圳)有限公司 System and method for inspecting differential signal line deviation
JP2009015678A (en) * 2007-07-06 2009-01-22 Nec Corp Differential line emi analysis system, differential line emi analysis method, and differential line emi analysis program
CN110501353A (en) * 2019-07-26 2019-11-26 苏州浪潮智能科技有限公司 A kind of horizontal vertical of PCB walks Check Methods and relevant apparatus
CN113468849A (en) * 2021-05-27 2021-10-01 山东英信计算机技术有限公司 Printed circuit board wiring detection method, printed circuit board wiring detection device, electronic equipment and storage medium

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100412506C (en) * 2005-12-15 2008-08-20 鸿富锦精密工业(深圳)有限公司 System and method for inspecting differential signal line deviation
JP2009015678A (en) * 2007-07-06 2009-01-22 Nec Corp Differential line emi analysis system, differential line emi analysis method, and differential line emi analysis program
CN110501353A (en) * 2019-07-26 2019-11-26 苏州浪潮智能科技有限公司 A kind of horizontal vertical of PCB walks Check Methods and relevant apparatus
CN113468849A (en) * 2021-05-27 2021-10-01 山东英信计算机技术有限公司 Printed circuit board wiring detection method, printed circuit board wiring detection device, electronic equipment and storage medium

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