JP2000193718A - Semiconductor testing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor testing apparatus which avoids an increase of a failure rate of devices to be measured because of failures of sockets. SOLUTION: A test board 1 has sockets 2 set for mounting devices to be measured. A tester main body 4 mounts devices to be measured only to sockets 2 designated by mask data on a mask data memory part 6, and moreover tests the devices to be measured and outputs test times and test results. A test end process control part 5 accumulates the test times and number of use times of the board on a use time memory part 7 and a use number-of-times memory part 8 respectively, and also stores for each socket a cumulative number of fails, the number of continuance times of fails and the number of continuance times of fails of a pretest prior to a test on a cumulative fail number memory part 9, a continuance fail number-of-times memory part 10 and a continuance pretest fail number-of times memory part 11. A threshold memory part 12 stores maximum values of stored contents. The test end process control part 5 makes it impossible to load mask data for the socket having stored contents exceeding the corresponding maximum value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor test apparatus for testing a device under test using a test board on which a number of sockets for mounting the device under test are arranged. The present invention relates to a technology for detecting a defective socket from among the above and making the socket unavailable.

[0002]

2. Description of the Related Art When testing a device to be measured such as an integrated circuit, a plurality of test boards on which a large number of devices to be measured of the same type are mounted are prepared, and a semiconductor test apparatus performs these tests via each test board. A test is performed by applying a signal to the device under test and appropriately checking the signal output from the device under test. Each test board is provided with sockets corresponding to the number of devices to be measured for mounting the devices to be measured.

By the way, when such a test is performed many times, these sockets gradually deteriorate due to aging and the influence of a heat load in a constant temperature bath, and finally become defective and become a defective product. It cannot be used at all. Such defective sockets, including sockets that were originally defective, can be found to some extent in a pretest performed prior to the original test. However, in the pre-test, in addition to checking whether the device under test is mounted on each socket, the test is only a simple test compared to the original test, and there are problems that may affect the test results. However, it cannot always be determined by a pretest. For sockets that are determined to be defective in the pretest stage, mask data for manually disabling these defective sockets is manually created by humans, and then mask data created for the device program that controls the entire test give,
The device program instructs the semiconductor test apparatus not to mount the device under test on the socket specified by the mask data.

[0004]

As described above, in order to disable the use of a defective socket, it is necessary for a human to manually create mask data while observing the result of the pretest, which is very complicated. . Further, in the conventional semiconductor test apparatus, sockets that cannot be sorted out in the pre-test stage or sockets that are defective only during the original test are used until all tests are completed. This is because during the original test, it is impossible to distinguish at all whether the socket itself is broken or the mounted device under test has a defect. If the defective socket continues to be used during the original test, the devices to be measured successively mounted on the socket will be erroneously determined to be defective even if they are all good. For this reason, a non-defective device to be measured is wastefully discarded due to the presence of the defective socket, thereby increasing the defect rate of the entire device to be measured.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object thereof is to avoid the problem that the failure rate of a device to be measured is increased by the presence of a defective socket as much as possible, and to ensure test reliability. It is an object of the present invention to provide a semiconductor test apparatus capable of performing the above.

[0006]

In order to solve the above-mentioned problems, the invention according to claim 1 is directed to only sockets which are specified to be mountable by mask data among sockets arranged on a test board. In a semiconductor test apparatus that mounts a device under test and performs a test, based on a result of the test, a recording unit that records one or more indicators related to a failure of the socket or the device under test, Permissible value storage means for storing a permissible value of an index, and control means for detecting a socket in which the recorded value of the index in the recording means exceeds the permissible value, and setting mask data of the socket to be unmountable. Are provided. According to a second aspect of the present invention, in the first aspect of the present invention, the recording means records, for each of the test boards, an accumulated value of test time required for one test as the index. Is characterized in that a test board in which the accumulated value of the test time exceeds the allowable value is detected, and mask data of all sockets arranged on the test board is set to be unmountable.

According to a third aspect of the present invention, in the first or the second aspect of the present invention, the recording means uses the cumulative number of times the test board has been used for the test as the index, for each test board. The control means detects a test board in which the cumulative value of the number of times of use exceeds the permissible value, and sets mask data of all sockets arranged on the test board to be unmountable. It is characterized by doing. According to a fourth aspect of the present invention, in the second or third aspect of the present invention, the control means determines whether or not the recorded value of another index indicates whether the accumulated value exceeds the allowable value. The processing is performed prior to the determination of whether the index exceeds the allowable value. According to a fifth aspect of the present invention, in the invention according to any one of the first to fourth aspects, the recording unit is configured to accumulate the number of test results indicating a failure of the socket or the device under test. Is recorded for each device under test as the index, the control means detects the device under test in which the cumulative number of failures exceeds the allowable value, and outputs the mask data of the socket in which the device under test is mounted. It is characterized in that it cannot be mounted.

[0008] The invention according to claim 6 is the first invention.
5. In the invention according to any one of the items 5, the recording unit performs the measurement under test using the number of consecutive failures in which a test result indicating the failure of the socket or the device under test is continuously detected in a series of tests as the index. Recording for each device, the control means detects a device under test in which the number of continuous failures exceeds the allowable value, and sets mask data of a socket in which the device under test is mounted to unmountable. It is characterized by. The invention according to claim 7 is the invention according to any one of claims 1 to 6, wherein
The recording unit is configured such that, in a series of pretests performed prior to the test, the number of consecutive pretest failures in which a test result indicating a failure of the socket or the device under test is continuously detected is used as the index as the index. The control means detects the device under test in which the number of continuous pretest failures exceeds the allowable value, and sets the mask data of the socket in which the device under test is mounted as unmountable. Features.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the semiconductor test apparatus according to the present embodiment, in which only relevant parts related to the present invention are shown together with a test board. In FIG. 1, reference numeral 1 denotes a test board, on which a plurality of sockets 2,..., 2 are arranged, and a device to be measured, not shown, is mounted on each socket 2. Will be. On the other hand, the semiconductor test apparatus 3 is an apparatus for performing various tests on these devices under test. Actually, a plurality of test boards 1 are connected to the semiconductor test apparatus 3, but FIG. 1 shows only one test board 1 to avoid complication.

In the semiconductor test apparatus 3, the tester main body 4 controls each part in the semiconductor test apparatus 3 according to a built-in device program to control the entire test. The tester body 4 has all the functions of a general tester, and includes, for example, the following. That is, the tester body 4 holds a test result (that is, either pass or fail) obtained by testing the device under test, and measures the test time required for each test. Each time the test is completed, the test result and the test time are output to a test end processing control unit 5 described later together with a test end notification. Further, the tester main body 4 receives the mask data (described later) from the test end processing
Is obtained, and it is determined whether the device to be measured is to be mounted on each socket according to the mask data. For this purpose, the tester main body 4 controls the operation of an unillustrated automatic insertion / extraction device so that the device to be measured is mounted only on the socket for which the mounting instruction is given by the mask data. Note that functions of the tester main body 4 other than those just described will be described in detail in the operation description to be described later.

Next, each time the tester main body 4 is notified of the completion of one test, the test termination processing control section 5 determines whether each socket on the test board 1 is good or defective based on the test result or the like. Is estimated, and mask data for disabling the socket determined to be defective is created. The details of the control performed by the test termination processing control unit 5 will be described later in the description of the operation. The mask data storage unit 6 is a memory for storing mask data for managing whether or not a device to be measured is to be mounted on each socket on the test board 1. In other words, the mask data is data for masking the defective socket to make it use-prohibited. Either “mountable” or “unmountable” is set for each mask data. The mask data storage unit 6 stores mask data for each socket arranged on each test board 1, that is, the mask data is stored for each test board.

The use time storage unit 7 is a counter for accumulating the time (use time or board use time) in which each test board 1 is used for the test at each test. Similarly, the number-of-uses storage unit 8 is a counter for accumulating the number of times each test board 1 has been used for the test (the number of times of use or the number of times the board has been used) for each test. On the other hand, the cumulative failure count storage unit 9 is a counter for accumulating the number of times a fail is detected at each test based on the test result sent from the tester main body 4. The number of failures of each socket is individually accumulated. The continuous failure count storage unit 10 is a counter for accumulating the number of times a series of failures are detected in a series of tests based on the test results sent from the tester main unit 4 at each test. Thus, the number of continuous failures of each socket is individually stored for each test board 1. Further, the continuous pretest failure count storage unit 11 is the same counter as the continuous failure count storage unit 10, and is different only in that the target is not the original test but the pretest.

The threshold value storage unit 12 has a predetermined threshold value for determining whether or not each socket is in a mounting impossible state so as to correspond to the use time storage unit 7 to the continuous pretest failure count storage unit 11, respectively. It is memorized. That is, the maximum use time of the test board 1 corresponding to the use time in the use time storage unit 7 (for example, about several hundred to several thousand hours), and the maximum use time of the test board 1 corresponding to the use number in the use number storage unit 8 The number of times of use (for example, about several tens to several hundreds), the maximum cumulative number of failures of each socket corresponding to the cumulative number of failures in the cumulative number of failures storage section 9, and the number of continuous failures in the continuous failure number storage section 10 The maximum number of consecutive pretest failures of each socket corresponding to the maximum number of continuous failures of each socket and the number of continuous pretest failures in the continuous pretest failure number storage unit 11 are set.

Next, the operation of the semiconductor test apparatus 3 having the above configuration will be described. Here, FIG. 2 is a flowchart showing the outline of the operation of the apparatus, and FIGS.
7 is a flowchart showing a detailed procedure of the test end processing shown in FIG. First, the overall operation of the semiconductor test apparatus 3 will be outlined with reference to FIG. First,
Prior to the test of the device under test, various initialization operations are performed inside the semiconductor test apparatus 3. As a part of this initialization processing, all the mask data in the mask data storage unit 6 is set to “mountable”, and the usage time, the usage count, and the accumulated The values of the number of failures, the number of continuous failures, and the number of continuous pretest failures are all cleared to zero. Further, a specific value is set for each of the thresholds in the threshold storage unit 12. For example, 5
It is assumed that 00 hours, the maximum number of times of use is 50, the maximum number of cumulative failures is "3", the maximum number of continuous failures is "2", and the maximum number of continuous pretest failures is "4".

Thereafter, when a test start instruction is given to the semiconductor test apparatus 3, the tester main unit 4 acquires the mask data in the mask data storage unit 6 from the test end processing control unit 5 and sets the “mountable” state. To the automatic insertion / extraction device so that the device under test is mounted only on the socket. However, immediately after the execution of step S1, since all the mask data are "mountable", the device to be measured is mounted on all sockets at first. When the device under test is mounted on each socket in this way, the tester main unit 4 starts the test of the device under test on the test board 1 (step S2). Thereafter, the tester main unit 4 terminates the test for one time and notifies the test termination processing control unit 5 of that fact, so that the test termination processing control unit 5 performs “test termination processing” on each socket based on the test result. A failure determination is performed and the defective socket is set to a use prohibited state (step S3). Thereafter, until all of the series of tests are completed (the determination result of step S4 is “YES”), the above-described steps S2 to S2 are performed for each test.
The procedure of S4 is repeated.

Next, the details of the processing at the end of the test in step S3 shown in FIG. 2 will be described with reference to the flowcharts of FIGS. In the following, first, an overview of the overall processing will be given, focusing on the processing relating to the “number of cumulative failures”, and then the processing relating to the “number of consecutive failures” will be described. Processing related to “time”, “board use count”, and “continuous pretest failure count” will be briefly described. In the following description, a case where 5 × 5 = 25 sockets are arranged on the test board 1 as shown in FIG. 1 will be described as an example. Here, as shown in FIGS. 5 and 6, the test board 1 has "1" to "5", "1" to "5", respectively, on the row side and the column side of the sockets arranged in a matrix.
Identification codes “A” to “E” are given, and individual sockets are specified by, for example, “A1”. As described above, since one device under test is mounted on each socket, the same identification code (for example, socket A1 and device A1 to be measured) is used to identify the socket on the test board 1 or the device under test. ). In addition, in FIGS.
Fail is abbreviated by “P” / “F”, respectively, and a portion where the socket is not mounted is indicated by a symbol “.”. As for the mask data, "E (Enable)" indicates "Mountable" / "Mounting not possible".
/ "D (Disable)".

First, when the first test is completed, the tester main body 4 sends a test time and a test result required for the test to the test end processing control section 5 together with a notification to that effect. Then, the test termination processing control unit 5 adds the notified test time to the usage time in the usage time storage unit 7 (step S11), and the value of the usage time after the addition is the maximum usage time in the threshold storage unit 12. Is checked (step S12). Shortly after using the test board 1 for the first time, the judgment result of the step is “YES”.
Therefore, the test termination processing control unit 5 adds “1” to the number of uses in the number-of-uses storage unit 8 (step S1).
4) Then, it is checked whether or not the number of uses after the addition exceeds the maximum number of uses in the threshold storage unit 12 (step S1).
5). Also in this case, the determination result of the step does not become "YES" at the beginning of use.

For this reason, the test termination processing control unit 5 shifts the control to the processing relating to the “cumulative failure count”. FIG. 5 shows the test results, the cumulative number of failures, and the mask data arranged for each test, focusing on the cumulative number of failures, and shows how these values change as the test progresses. I have. Then, the test termination processing control unit 5 selects one device to be measured on the test board 1 (for example, the device to be measured A1 shown in FIG. 5) and checks whether the test result is pass or fail. . If the test result is “fail”, the test termination processing control section 5 adds “1” to the cumulative failure count of the device under test stored in the cumulative failure count storage section 9 (Step S).
17) After that, the accumulated failure count after the addition is stored in the threshold storage unit 1
It is checked whether or not the number exceeds the maximum cumulative number of failures in Step 2 (Step S18). As described above, “3” is set as the maximum cumulative failure frequency.

In this case, the first test is performed.
Since the test results of all the devices to be measured are pass (P) as shown in (1), the cumulative number of failures related to the socket A1 is not updated in step S17, but is initialized in step S1 (see FIG. 2). , The value remains “0”. For this reason, the determination result of step S18 is also “N”.
O ", the step S19 is not executed, and the socket A
The mask data of No. 1 remains "mounted (E)" at the time of initialization without change. Thereafter, the test termination processing control unit 5 sequentially selects another device to be measured on the test board 1 until there is no unprocessed device to be measured (the determination result in step S20 is “YES”).
Steps 17 to S20 are repeated. As described above, since all test results are passes here, all devices under test are processed in exactly the same procedure as described above, all mask data is “mountable”, and the cumulative number of failures is all It becomes “0”. After that, by processing each procedure of steps S21 to S28 (FIG. 4; details will be described later), 1
The processing at the end of the test in the second test is completed, and thereafter, the second and subsequent tests are processed in the same procedure.

That is, in the second test, the devices A1, A3, A5, B2, B4, C1, C3, C
5, D2, D4, E1, E3, and E5 fail.
Therefore, the test termination processing control unit 5 adds "1" to the cumulative number of failures of each socket corresponding to the device under test (step S17), whereby the cumulative number of failures of these sockets becomes "1". . Therefore, also in this case, the result of the determination in step S18 is "NO", and the mask data of any socket is not updated. Next, in the third test, since the test results of all the devices to be measured fail, “1” is added to all the cumulative failure counts, and the socket that failed in the second test is returned. Is "2" and the others are "1". As a result, the mask data of any socket does not change. Next, in the fourth test, the test results of the devices under test A1 to E1 and A2 to E2 fail, and the cumulative number of failures of these devices to be measured becomes “2” or “3”. There is no change in the socket mask data.

On the other hand, in the fifth test, the test results of the devices under test A1 to E1 and A5 to E5 fail, and “1” is added to the cumulative number of failures of these devices under test. Devices under test A1, C
The cumulative failure frequency of E4 and E4 becomes “4” and exceeds the maximum cumulative failure frequency “3” (the determination result of step S18 is “YES”). Therefore, the test termination processing control unit 5 sets the mask data relating to the sockets A1, C4, and E4 to “unmountable (D)” (step S19) and prohibits the use of these sockets. Then, when the tester main unit 4 issues an instruction to the automatic inserter / extractor according to the updated mask data when starting the sixth test, these sockets A
1, 1, and 4, the device to be measured is not mounted ("." In the figure). Thereafter, in the sixth test, the test results of the devices under test B1, A5 to F5 fail, and the devices under test B1, A5, C5, E
The cumulative failure count of 5 becomes “4”, and the mask data of the corresponding socket is set to “unmountable”. Therefore, when the seventh test is performed, seven sockets are left unmounted. When the test results of the devices under test A2 to E2 fail in the seventh test, the cumulative failure counts of the devices under test B2 and D2 are newly set to “4” and the mask data of the corresponding socket is “mounted”. Disabled ”is set. The subsequent tests are also performed according to the above-described procedure.

Next, referring to FIG. 6, a process relating to the "number of continuous failures" will be described. This figure shows the time series change of the test result, the number of continuous failures, and the mask data, focusing on the number of continuous failures. In the following, it is assumed that the mask data is in a state immediately after the execution of step S1, and that all the mask data are “mountable” and the number of consecutive failures is all “0”. Also, as described above, it is assumed that “2” is set as the maximum number of continuous failures by the initialization processing in step S1.

First, in the first test, the test end processing control unit 5 selects, for example, the device under test A1 through the processing of steps S2 (FIG. 2) and steps S11 to S20 (FIG. 3), and If the test result is “fail”, “1” is added to the number of continuous failures of the device under test stored in the number-of-continuous-failures storage unit 10 (step S21), and the consecutive failures after the addition are added. It is checked whether the number of times exceeds the maximum number of consecutive failures in the threshold storage unit 12 (step S22). On the other hand, if the test result is a pass, the test termination processing control unit 5 clears the number of continuous failures related to the device under test A1 to zero. Here, since the value of “1” or more is always set to the maximum number of continuous failures, if the test result is a pass, the process does not proceed to step S23, and the mask data of the socket is not changed. In this case, since the test results of the device under test are all passes, the number of continuous failures of the socket A1 is cleared to zero in step S21, the determination result in step S22 becomes "NO", and the socket S1 is not executed without executing step S23. The mask data of A1 remains "mounted" at the time of initialization. Thereafter, there are no unprocessed devices to be measured (the determination result in step S24 is “YE
Steps S21 to S24 are repeated until S ''). However, since all the test results are passed, all the accumulated failure times are cleared to zero and the mask data is not changed.
Thereafter, the processing at the end of the first test is completed through steps S25 to S28 (details will be described later).

Next, in the second test, the devices A1, A3, A5, B2, B4, C1, C3, C5,
Since the test results of D2, D4, E1, E3, and E5 fail, the number of continuous failures for these devices to be measured is set to "1", but still exceeds the value of the maximum number of continuous failures "2". Therefore, the mask data of the corresponding socket is not changed at all. In addition, since the number of continuous failures regarding the device under test is cleared to zero, the mask data does not change. Next, in the third test, all test results of the device under test fail, and “1” is added to all the continuous failure counts, and their values are “1” or “2”.
However, also in this case, the mask data of any socket is not changed.

Next, in the fourth test, the device under test A
When 1 to E1 and A2 to E2 fail and “1” is added to the number of continuous failures of these devices under test, the number of continuous failures of the devices A1, C1, E1, B2, and D2 becomes “3”. Becomes Therefore, the result of the determination in step S22 is "YES", and the mask data corresponding to these devices to be measured are all set to "unmountable" (step S23). 5 where these devices to be measured should be mounted
All sockets are left unmounted. For the devices under test whose test result is passed, the number of continuous failures is cleared to zero, and the mask data of the corresponding socket does not change.

Next, in the fifth test, since the test results of the devices under test B1, D1, A5 to E5 fail, the number of continuous failures of the devices B1, D1 exceeds the value of the maximum number of continuous failures. , The mask data of the corresponding socket is set to “unmountable”. In addition, sockets A1 and C set to be unmountable in the fourth test
1, E1, B2, and D2 indicate that the corresponding test result is passed,
Since it is not any of the failures, the number of continuous failures remains "3" without change, and subsequently, the state is "unmountable". Further, for the devices to be measured other than these, the number of continuous failures is cleared to zero, and the mask data is not changed.

Next, at the start of the sixth test, the two sockets whose use is prohibited in the fifth test are newly unmounted. In this sixth test, the devices under test A5 to E5 fail, and the number of continuous failures of these devices becomes "2". For this reason, there is no new mask data that cannot be mounted, and there is no change in the mounting state of the socket from the fifth test. Next, in the seventh test, the device under test A2,
In addition to the failure of the test results of C2 and E2 and the setting of the number of continuous failures to "1", the devices under test in the mounted state including the devices A5 to E5 which failed at the sixth time Are all cleared to zero. As a result, the mounted state of the socket does not change even after the seventh test. Thereafter, the same applies to the eighth and subsequent tests.

By repeating the test as described above, the use time of the test board 1 is accumulated (step S11 in FIG. 3) accordingly, and the number of times the test board 1 is used is also accumulated (step S11). S14). Therefore, when the use time of the test board 1 exceeds the maximum use time in the threshold storage unit 12 (the determination result in step S12 is “YES”), the test end processing control unit 5 Is set to "not mountable" (step S13). As a result, the use of the entire test board 1 is prohibited, and thereafter, the same operation is performed on other test boards that are being tested in parallel with the test board 1. The same applies to the case where the number of times of use of the test board 1 exceeds the maximum number of times of use in the threshold storage unit 12 (the determination result in step S15 is “YES”). The mask data is set to “unmountable” (step S16), and the entire test board 1 is set to the use prohibited state.

Next, the processing relating to the "number of continuous pre-test failures" is basically the same as the processing relating to the "number of consecutive failures" when the original test is performed. Each procedure is described in step S2
1 to S24 are directly supported. The difference between the two is
The result of the pretest is used instead of the test result, the continuous pretest failure number storage section 11 is used instead of the continuous failure number storage section 10, and the maximum pretest continuous failure number is used instead of the maximum continuous failure number It is only done. For this reason, a detailed description of the processing relating to the number of continuous pretest failures is omitted.
In the above description, subsequent steps S14 and S17 are performed even when mask data cannot be mounted for all sockets in steps S13 and S16. The process may proceed to step S4 shown in FIG.

[0030]

As described above, according to the present invention,
Based on the results of the test, while recording an index related to the failure of the socket or the device under test, if there is a socket whose recorded value of this index exceeds the allowable value, set the mask data of that socket to be unmountable. are doing. As described above, the mounting of the device under test is immediately prohibited for the socket in which the occurrence of the defect is out of the allowable range, so that the non-defective device under test is erroneously determined to be defective while the defective socket is mounted. And the increase in the defective rate can be suppressed. Further, since the use of the defective socket is prohibited without human intervention, the test can be performed efficiently without the need for human intervention. According to the fourth aspect of the present invention, whether or not the cumulative value of the use time or the number of times of use of the test board exceeds the allowable value is performed in preference to the determination relating to another index. That is, since the index for determining a defect on a test board basis is prioritized over the index for which a defect needs to be determined for each device to be measured, if the usage time or the number of times of use exceeds the allowable value, all sockets are used. The use is prohibited. Therefore, compared with the case where the determination for each device to be measured is performed first, all sockets on the test board can be quickly disabled without performing useless processing.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a semiconductor test apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a schematic operation of the apparatus.

FIG. 3 is a flowchart of a first half showing a detailed operation of the apparatus.

FIG. 4 is a flowchart of a latter half showing a detailed operation of the apparatus.

FIG. 5 is an explanatory diagram showing a time-series change when the socket is put into the use prohibition state based on the cumulative number of failures in the embodiment.

FIG. 6 is an explanatory diagram showing a time-series change when the socket is set to the use prohibition state based on the number of continuous failures in the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Test board 2 Socket 3 Semiconductor test apparatus 4 Tester main unit 5 Test end processing control unit 6 Mask data storage unit 7 Usage time storage unit 8 Usage count storage unit 9 Cumulative failure count storage unit 10 Continuous failure count storage unit 11 Continuous pretest failure count Storage unit 12 Threshold storage unit

Claims (7)

[Claims] 1. A semiconductor test apparatus in which a device under test is mounted only on a socket specified to be mountable by mask data among sockets arranged on a test board and a test is performed. Recording means for recording one or more types of indices relating to the failure of the socket or the device under measurement, allowable value storage means for storing allowable values of the indices, and recording of the indices in the recording means Control means for detecting a socket whose value exceeds the allowable value and setting the mask data of the socket to be unmountable. 2. The recording means records, for each of the test boards, a cumulative value of test time required for one test as the index, and the control means determines that the cumulative value of the test time is equal to the allowable value. 2. The semiconductor test apparatus according to claim 1, wherein a test board exceeding the test board is detected and mask data of all sockets arranged on the test board is set to be unmountable. 3. The recording means records, for each of the test boards, a cumulative value of the number of times the test board has been used for the test as the index, and the control means determines that the cumulative value of the number of times the test board is allowed is used. 3. The semiconductor test apparatus according to claim 1, wherein a test board exceeding a value is detected, and mask data of all sockets arranged on the test board is set to be unmountable. 4. The control means has a higher priority in determining whether the accumulated value exceeds the allowable value than in determining whether a recorded value of another index exceeds an allowable value of the other index. 4. The semiconductor test apparatus according to claim 2, wherein the semiconductor test apparatus is processed. 5. The recording means records, for each of the devices under test, an accumulated failure frequency obtained by accumulating the number of test results indicating the failure of the socket or the device under test as the index. 5. The device according to claim 1, wherein a device under test whose cumulative number of failures exceeds the allowable value is detected, and mask data of a socket in which the device under test is mounted is set to be unmountable. A semiconductor test apparatus according to claim 1. 6. The recording unit records, for each of the devices under test, the number of consecutive failures in which a test result indicating the failure of the socket or the device under test is continuously detected in a series of tests as the index. Wherein the control means detects a device under test in which the number of continuous failures exceeds the permissible value, and sets mask data of a socket in which the device under test is mounted to be unmountable. Item 6. A semiconductor test apparatus according to any one of Items 1 to 5. 7. The recording means according to claim 1, wherein in a series of pre-tests performed prior to said test, the number of continuous pre-test failures in which a test result indicating a failure of said socket or said device under test is continuously detected is used as said index. The control unit records each of the devices under test, wherein the control unit detects a device under test in which the number of continuous pretest failures exceeds the allowable value, and cannot mount mask data of a socket in which the device under test is mounted. The semiconductor test apparatus according to any one of claims 1 to 6, wherein: