JP2000188288A - Method and device for manufacture of semiconductor substrate - Google Patents
Method and device for manufacture of semiconductor substrateInfo
- Publication number
- JP2000188288A JP2000188288A JP10365562A JP36556298A JP2000188288A JP 2000188288 A JP2000188288 A JP 2000188288A JP 10365562 A JP10365562 A JP 10365562A JP 36556298 A JP36556298 A JP 36556298A JP 2000188288 A JP2000188288 A JP 2000188288A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- gas
- charge
- reactor
- plasma discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明はTFTアレイ基板な
どの半導体基板の製造方法において、配線絶縁膜および
トランジスターを成膜する方法およびその製造装置に関
する。The present invention relates to a method for forming a wiring insulating film and a transistor in a method for manufacturing a semiconductor substrate such as a TFT array substrate, and an apparatus for manufacturing the same.
【0002】[0002]
【従来の技術】図1は、従来の半導体基板の製造装置
(成膜装置)の一例を示す正面断面図である。まず、真
空に保持されたリアクター(チャンバー)2内に基板1
が搬送される。つぎにガラス基板1がヒーター3により
温度制御されたリアクター内で水平に保持され、基板上
部より基板全体にSiH4、NH3、H2、N2等を混合し
たガスが配管5を通して供給される。ガス流量、リアク
ター内圧力が安定した状態になれば高周波電源7による
プラズマを印加することで放電により成膜される。ま
た、未反応ガスは排気装置(ポンプなど)により装置外
に配管をとおして排気される。成膜された基板1はリア
クター2内で基板押上げピン4が上昇することにより剥
離され、真空室外に搬出される。2. Description of the Related Art FIG. 1 is a front sectional view showing an example of a conventional semiconductor substrate manufacturing apparatus (film forming apparatus). First, the substrate 1 is placed in a reactor (chamber) 2 maintained in a vacuum.
Is transported. Next, the glass substrate 1 is held horizontally in a reactor whose temperature is controlled by the heater 3, and a mixed gas of SiH 4 , NH 3 , H 2 , N 2, etc. is supplied from above the substrate through the pipe 5. . When the gas flow rate and the pressure in the reactor become stable, plasma is applied by the high frequency power supply 7 to form a film by discharge. The unreacted gas is exhausted through a pipe by an exhaust device (such as a pump) outside the device. The substrate 1 on which the film is formed is peeled off by raising the substrate lifting pins 4 in the reactor 2 and is carried out of the vacuum chamber.
【0003】従来、成膜後に分解された各ガスの電荷が
膜上に帯電し、またリアクター2よりガラス基板1を剥
離する際にも基板裏面に静電気が生じる。この静電気が
帯電されるため、基板搬送中での静電気による基板ず
れ、基板落下による基板割れ、ガラス基板上に形成され
た素子の絶縁破壊、素子特性の劣化、静電気による大気
中の浮遊異物のガラス基板への吸着などの問題点があっ
た。これらを防止するためにはガラス基板の帯電を除去
する方法として通常、成膜搬出後イオナイザを用いてイ
オンをガラス基板1に照射し、帯電した電荷を中和させ
ることにより除電する方法が行なわれている。Conventionally, the charge of each gas decomposed after film formation is charged on the film, and static electricity is also generated on the back surface of the substrate when the glass substrate 1 is separated from the reactor 2. Since the static electricity is charged, the substrate is displaced by the static electricity during transport of the substrate, the substrate is broken by the substrate drop, the dielectric breakdown of the element formed on the glass substrate, the element characteristics are deteriorated, and the glass of the airborne foreign matter due to the static electricity. There were problems such as adsorption to the substrate. In order to prevent these, as a method of removing the charge of the glass substrate, a method of irradiating the glass substrate 1 with ions using an ionizer after carrying out the film formation and neutralizing the charged charge is usually performed. ing.
【0004】[0004]
【発明が解決しようとする課題】しかし、前記従来の成
膜装置においては成膜後の除電を行なうために成膜装置
とは別にイオナイザーを設置しなければならない。ま
た、イオナイザーが装置外に設置されているため、成膜
直後の除電を充分に行なうことができないという問題が
あった。However, in the above-mentioned conventional film forming apparatus, an ionizer must be provided separately from the film forming apparatus in order to remove electricity after film formation. In addition, since the ionizer is installed outside the apparatus, there is a problem that static elimination cannot be sufficiently performed immediately after film formation.
【0005】本発明は、前記の課題を解決するためにな
されたもので、基板の表裏面の除電をより効果的に行な
うことができる半導体基板の製造方法および製造装置を
提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a method and an apparatus for manufacturing a semiconductor substrate capable of more effectively removing static electricity from the front and back surfaces of the substrate. I do.
【0006】[0006]
【課題を解決するための手段】本発明にかかわる半導体
基板の製造方法は、ガラス基板に帯電した電荷を、不活
性ガスを用いたプラズマ放電により中和して除電するよ
うにしたものである。According to a method of manufacturing a semiconductor substrate according to the present invention, charges charged on a glass substrate are neutralized by plasma discharge using an inert gas to eliminate the charges.
【0007】本発明にかかわる半導体基板の製造装置
は、基板の出入れ可能な真空容器と、複数個のガスの供
給を行なうガス供給系と、真空排気系と、基板を着脱可
能に載置して温度制御を行なう基板載置ステージと、前
記真空容器内に高周波電圧を印加する高周波電源と、ガ
スの供給および排気、ガスの選択、基板の温度制御、高
周波電圧の印加等の操作の時間的制御を行なう処理時間
制御手段とを備え、基板の成膜後に不活性ガスを導入
し、高周波電圧を印加してプラズマ放電を発生させ、不
活性ガスのプラズマ放電により基板に帯電した電荷を中
和して除電するようにしたものである。An apparatus for manufacturing a semiconductor substrate according to the present invention comprises a vacuum vessel into which a substrate can be taken in and out, a gas supply system for supplying a plurality of gases, a vacuum exhaust system, and a substrate which is detachably mounted. Stage for controlling the temperature of the vacuum vessel, a high-frequency power supply for applying a high-frequency voltage to the vacuum vessel, supply and exhaust of gas, selection of gas, temperature control of the substrate, application of high-frequency voltage, Process time control means for controlling, introducing an inert gas after film formation of the substrate, applying high frequency voltage to generate plasma discharge, and neutralizing the charge on the substrate by the plasma discharge of the inert gas Then, the charge is removed.
【0008】[0008]
【発明の実施の形態】実施の形態1 以下、本発明をその実施の形態を示す図面に基づき具体
的に説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1 Hereinafter, the present invention will be specifically described with reference to the drawings showing the embodiments.
【0009】図2は、本発明の半導体基板の製造装置の
構成図であり、基板の製造工程の一連の流れを表わすも
のである。FIG. 2 is a block diagram of a semiconductor substrate manufacturing apparatus according to the present invention, and shows a series of flow of a substrate manufacturing process.
【0010】まず、図中1のガラス基板1はカセット1
1内に収められており、ここから保温真空室12へ大気
ロボット14により搬送される。その後保温および真空
に保持されたのち、真空室13へ真空ロボット15によ
り搬送され、各リアクターへ真空ロボット15により移
送される。First, a glass substrate 1 shown in FIG.
1, and is transported from here to an insulated vacuum chamber 12 by an atmospheric robot 14. Thereafter, after being kept warm and kept in a vacuum, it is transferred to the vacuum chamber 13 by the vacuum robot 15 and transferred to each reactor by the vacuum robot 15.
【0011】本製造装置は、図3に示す配管とポンプか
らなる排気装置を備えている。また、ガスの供給および
排気、ガスの選択、基板の温度制御、高周波電圧の印加
などの操作の時間的制御を行なう処理時間制御手段(図
示せず)を備えている。This manufacturing apparatus is provided with an exhaust device comprising a pipe and a pump shown in FIG. Further, a processing time control means (not shown) for performing temporal control of operations such as gas supply and exhaust, gas selection, substrate temperature control, and application of a high-frequency voltage is provided.
【0012】図1は、リアクター2の断面図を示す。リ
アクターの機器構成は、従来のものと同様である。リア
クター2内へ移送されたガラス基板1は基板載置ステー
ジ16の床面に保持され、床面下のヒーター3により3
00℃近くに加熱される。その後SiH4、NH3、
H2、N2等が混合されたガス種がガス配管5を通り基板
全体にガスが噴出される。また、リアクター内の圧力、
ガス流量が安定したら高周波電源7により高電圧が印加
されプラズマ放電によりガラス基板1上に成膜される。FIG. 1 shows a sectional view of the reactor 2. The equipment configuration of the reactor is the same as the conventional one. The glass substrate 1 transferred into the reactor 2 is held on the floor of the substrate mounting stage 16 and is heated by the heater 3 below the floor.
Heated to near 00 ° C. Then SiH 4 , NH 3 ,
A gas mixture of H 2 , N 2, etc. is ejected to the entire substrate through the gas pipe 5. Also, the pressure inside the reactor,
When the gas flow rate is stabilized, a high voltage is applied by the high frequency power supply 7 and a film is formed on the glass substrate 1 by plasma discharge.
【0013】図3において、未反応ガスは排気配管10
を通りブースターポンプ8、ドライポンプ9により装置
外に排出される。In FIG. 3, unreacted gas is exhaust gas 10
And is discharged out of the apparatus by a booster pump 8 and a dry pump 9.
【0014】ガラス基板上の成膜が終了すると、ガラス
基板1を基板の押上げピン4により上昇させ、リアクタ
ー2より剥離させる。その際剥離により静電気が生じ、
ガラス基板1の裏面に帯電される。When the film formation on the glass substrate is completed, the glass substrate 1 is lifted by the push-up pins 4 of the substrate and separated from the reactor 2. At that time, static electricity is generated by peeling,
The back surface of the glass substrate 1 is charged.
【0015】その後、He、N2、H2等の不活性ガス
を、ガス配管5を通してリアクター内全体に噴出させ
る。Thereafter, an inert gas such as He, N 2 , H 2 or the like is jetted through the gas pipe 5 to the entire inside of the reactor.
【0016】リアクター内の圧力、ガス流量が安定した
ら高周波電源7により高電圧を印加し、プラズマ放電に
よりガラス上面、裏面に帯びた電荷を電気的に中和させ
る。When the pressure and gas flow rate in the reactor are stabilized, a high voltage is applied by the high frequency power supply 7 to electrically neutralize the electric charges on the upper and lower surfaces of the glass by plasma discharge.
【0017】従来のイオナイザ方式による帯電除去では
基板裏面へのイオンの供給が困難であったが、不活性ガ
スを用いたプラズマ放電は、リアクター空間内で一様に
発生させることができるので、基板裏面の除電を容易に
確実に行なうことができる。また、除電のための別個の
装置を用いる必要がなく、成膜装置自体を用いて除電が
可能であり、工程的にも成膜工程の延長上の処理として
行なうことができるので成膜直後から除電ができる。Although it has been difficult to supply ions to the back surface of the substrate by the conventional charge removal method using an ionizer, plasma discharge using an inert gas can be uniformly generated in the reactor space. Static electricity removal on the back surface can be easily and reliably performed. In addition, there is no need to use a separate device for static elimination, the static elimination can be performed using the film forming apparatus itself, and the process can be performed as an extension of the film forming process. Static electricity can be removed.
【0018】電荷が除去されたガラス基板1は、図2に
示す真空室13保温真空室12を通り、カセットに収納
される。The glass substrate 1 from which the electric charge has been removed passes through the vacuum chamber 13 and the vacuum chamber 12 shown in FIG.
【0019】実施の形態2 プラズマ放電を行なうタイミングは、ガスが導入される
と同時に放電させてもよい。除電処理時間は除電に充分
な時間であればよく、時間制御の自由度が大きく、設定
が容易である。Embodiment 2 The plasma discharge may be performed at the same time as the gas is introduced. The charge removal processing time may be a time sufficient for charge removal, and the time control has a large degree of freedom and is easy to set.
【0020】また、ガス流量、ガス種、ガス混合比率、
リアクター内温度、圧力、高周波電源の印加パワー周波
数などのパラメーターは任意でよい。従来のイオナイザ
方式では、供給イオンの電荷による基板の帯電の相殺と
いうメカニズムを利用しているので、基板の帯電量や極
性に合わせて供給イオンの正負バランスや処理時間を狭
い範囲で設定する必要があるが、プラズマ放電による除
電は、プラズマ化ガスの導電性による帯電の放電という
メカニズムに近いので、細かな条件設定の必要性は少な
い。The gas flow rate, gas type, gas mixture ratio,
Parameters such as the temperature inside the reactor, the pressure, and the applied power frequency of the high frequency power supply may be arbitrary. In the conventional ionizer method, the mechanism of canceling the charge of the substrate by the charge of the supply ions is used.Therefore, it is necessary to set the positive / negative balance of the supply ions and the processing time in a narrow range according to the charge amount and polarity of the substrate. However, static elimination by plasma discharge is close to the mechanism of discharge of electrification due to the conductivity of plasma gas, so that it is not necessary to set detailed conditions.
【0021】実施の形態3 ガラス基板を成膜後一度除電した後に基板剥離を行な
い、再度除電を実施してもよいし、除電処理を中断せ
ず、除電処理中に基板を剥離してもよい。また、除電回
数、除電条件は任意でよい。基板の剥離の経過中は、剥
離の距離にほぼ比例して帯電電圧が上昇するが、除電処
理中に基板を剥離する方法によれば、剥離の開始直後か
ら除電が行なわれるので、帯電電圧の上昇を小さく抑え
ることができる。Embodiment 3 After the film is formed on the glass substrate, the substrate may be peeled off after the charge is removed once, and the charge may be removed again. Alternatively, the substrate may be peeled off during the charge removal without interrupting the charge removal. . Further, the number of times of static elimination and the neutralization conditions may be arbitrary. During the course of the peeling of the substrate, the charging voltage increases substantially in proportion to the distance of the peeling. However, according to the method of peeling the substrate during the neutralizing process, the neutralizing is performed immediately after the start of the peeling. The rise can be kept small.
【0022】[0022]
【発明の効果】本発明によれば基板上にプラズマ放電に
よる成膜後に帯電した電荷および基板をリアクターより
剥離する際に生じる静電気による基板裏面の帯電を、不
活性ガスによるプラズマ放電で電気的に中和させ、帯電
を除去することができる。According to the present invention, the charge on the substrate after film formation by plasma discharge and the charge on the back surface of the substrate due to static electricity generated when the substrate is separated from the reactor are electrically controlled by plasma discharge with an inert gas. It can be neutralized to remove the charge.
【図1】本発明にかかわる成膜装置の一実施例を示すリ
アクター内構成図である。FIG. 1 is a configuration diagram in a reactor showing one embodiment of a film forming apparatus according to the present invention.
【図2】本発明にかかわる成膜装置の一実施例を示す装
置構成図である。FIG. 2 is an apparatus configuration diagram showing one embodiment of a film forming apparatus according to the present invention.
【図3】本発明にかかわる成膜装置の一実施例を示す装
置概観図である。FIG. 3 is a schematic view showing an embodiment of a film forming apparatus according to the present invention.
1 ガラス基板 2 リアクター 3 ヒーター 4 基板押上げピン 5 ガス配管 6 ガス噴出状態 7 高周波電源 8 ブースターポンプ 9 ドライポンプ 10 排気配管(ポンプ配管) 11 カセット 12 保温真空室 13 真空室 14 大気ロボット 15 真空ロボット 16 基板載置ステージ DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Reactor 3 Heater 4 Substrate push-up pin 5 Gas pipe 6 Gas ejection state 7 High frequency power supply 8 Booster pump 9 Dry pump 10 Exhaust pipe (pump pipe) 11 Cassette 12 Heat-retention vacuum chamber 13 Vacuum chamber 14 Atmospheric robot 15 Vacuum robot 16 Substrate mounting stage
Claims (4)
スを用いたプラズマ放電により中和して除電することを
特徴とする半導体基板の製造方法。1. A method for manufacturing a semiconductor substrate, comprising: neutralizing charges charged on a glass substrate by plasma discharge using an inert gas to eliminate the charges.
電を行ない、その後に基板を載置ステージから剥離し、
基板裏面の除電を行なう請求項1記載の半導体基板の製
造方法。2. After the completion of the film forming process, the charge on the substrate surface is removed, and then the substrate is peeled off from the mounting stage.
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein static electricity on the back surface of the substrate is removed.
除電の継続中に基板を載置ステージから剥離して基板裏
面の除電を行なう請求項1記載の半導体基板の製造方
法。3. After the completion of the film formation, static elimination of the substrate surface is performed,
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the substrate is peeled off from the mounting stage to remove the charge on the back surface of the substrate while the charge removal is continued.
種のガスの供給を行なうガス供給系と、真空排気系と、
基板を着脱可能に載置して温度制御を行なう基板載置ス
テージと、前記真空容器内に高周波電圧を印加する高周
波電源と、ガスの供給および排気、ガスの選択、基板の
温度制御、高周波電圧の印加を含む操作の時間的制御を
行なう処理時間制御手段とを備え、基板の成膜後に不活
性ガスを導入し、高周波電圧を印加してプラズマ放電を
発生させ、不活性ガスのプラズマ放電により基板に帯電
した電荷を中和して除電する半導体基板の製造装置。4. A vacuum container capable of taking a substrate in and out, a gas supply system for supplying a plurality of types of gases, a vacuum exhaust system,
A substrate mounting stage for detachably mounting a substrate to control temperature, a high-frequency power supply for applying a high-frequency voltage in the vacuum vessel, gas supply and exhaust, gas selection, substrate temperature control, high-frequency voltage Processing time control means for performing temporal control of an operation including application of an inert gas is introduced after the formation of the substrate, a high-frequency voltage is applied to generate a plasma discharge, and the plasma discharge of the inert gas An apparatus for manufacturing a semiconductor substrate that neutralizes the charge on the substrate and removes the charge.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10365562A JP2000188288A (en) | 1998-12-22 | 1998-12-22 | Method and device for manufacture of semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10365562A JP2000188288A (en) | 1998-12-22 | 1998-12-22 | Method and device for manufacture of semiconductor substrate |
Publications (1)
Publication Number | Publication Date |
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JP2000188288A true JP2000188288A (en) | 2000-07-04 |
Family
ID=18484574
Family Applications (1)
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JP10365562A Pending JP2000188288A (en) | 1998-12-22 | 1998-12-22 | Method and device for manufacture of semiconductor substrate |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012068752A1 (en) * | 2010-11-23 | 2012-05-31 | 深圳市华星光电技术有限公司 | Methods for manufacturing passivation layer and thin film transistor array substrate |
US10312061B2 (en) * | 2014-05-14 | 2019-06-04 | Boe Technology Group Co., Ltd. | Vacuum apparatus for vacuum treating substrate |
-
1998
- 1998-12-22 JP JP10365562A patent/JP2000188288A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012068752A1 (en) * | 2010-11-23 | 2012-05-31 | 深圳市华星光电技术有限公司 | Methods for manufacturing passivation layer and thin film transistor array substrate |
US9136354B2 (en) | 2010-11-23 | 2015-09-15 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Methods for manufacturing passivation layer and thin film transistor array substrate |
US10312061B2 (en) * | 2014-05-14 | 2019-06-04 | Boe Technology Group Co., Ltd. | Vacuum apparatus for vacuum treating substrate |
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