JP2000174510A - Irreversible circuit element and mobile communication unit - Google Patents

Irreversible circuit element and mobile communication unit

Info

Publication number
JP2000174510A
JP2000174510A JP10349108A JP34910898A JP2000174510A JP 2000174510 A JP2000174510 A JP 2000174510A JP 10349108 A JP10349108 A JP 10349108A JP 34910898 A JP34910898 A JP 34910898A JP 2000174510 A JP2000174510 A JP 2000174510A
Authority
JP
Japan
Prior art keywords
ferrite disk
ferrite
ground
reciprocal circuit
isolator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10349108A
Other languages
Japanese (ja)
Inventor
Masuzo Hattori
益三 服部
Takayuki Takeuchi
孝之 竹内
Yasuhiko Horio
泰彦 堀尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10349108A priority Critical patent/JP2000174510A/en
Priority to US09/406,260 priority patent/US6396361B1/en
Priority to CN99120864.1A priority patent/CN1198358C/en
Publication of JP2000174510A publication Critical patent/JP2000174510A/en
Priority to US10/040,093 priority patent/US6535074B2/en
Priority to US10/040,189 priority patent/US20020089392A1/en
Priority to US10/040,064 priority patent/US6531930B2/en
Pending legal-status Critical Current

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  • Non-Reversible Transmitting Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance an insertion loss characteristic of an isolator that is one of major components of a mobile communication unit such as an automobile telephone set and a portable telephone set used at VHF/UHF band by improving the magnetization distribution of a ferrite disk in the isolator. SOLUTION: In the irreversible circuit element consisting of a center conductor section 4, where three strip lines are placed in contact onto an upper face of a ferrite disk at an angular distance of 120 degrees through electric insulation, one terminal of which is connected to a matching capacitor and the other terminal of which is connected to a ground face 3, the matching capacitors, a termination resistor 24 connected in parallel with one of the three matching capacitors, input output terminals 22, 23, ground terminals 25, 26, and magnetic cases 1, 14 that have shield and magnetic path effects, a dielectric layer with an excellent high frequency characteristic is placed between a lower side of the ferrite disk and the ground face 3 opposite thereto.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、VHF,UHF帯
で使用される自動車電話、携帯電話などの移動体通信機
器の主要部品の一つであるアイソレータに関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an isolator which is one of the main components of a mobile communication device such as a mobile phone and a mobile phone used in the VHF and UHF bands.

【0002】[0002]

【従来の技術】従来、携帯電話等の高周波の領域で使用
される非可逆回路素子は図6、図7に示すように構成さ
れる集中定数型アイソレータである。この従来例を図6
の構成図により説明する。このアイソレータは金属磁性
体のケースの下部28内面へ誘電体基板29の接地面3
0側を半田接続し、その誘電体基板29の中央孔31内
に中心導体部32を挿入し、円形接地板33を金属磁性
体からなるケースの下側28の内面に半田付けする。中
心導体部32は図7に示すように、円形接地板33上へ
フェライト円板34を配置し、3本のストリップライン
35、36、37を絶縁シート38、39を介して互い
に絶縁させ120度ごとに交差させ、フェライト円板3
4の上面に沿わせて折り曲げ配置したものである。フェ
ライト円板34には面に垂直な方向へ永久磁石40によ
り直流磁界が印加されている。永久磁石40はストリッ
プライン35、36、37に対しフェライト円板34と
反対側に配置され、金属磁性体のケースの上部41の内
側に接して置かれている。
2. Description of the Related Art Hitherto, a non-reciprocal circuit device used in a high-frequency region of a cellular phone or the like is a lumped-constant isolator configured as shown in FIGS. This conventional example is shown in FIG.
The configuration will be described with reference to FIG. This isolator is connected to the ground plane 3 of the dielectric substrate 29 by the inner surface of the lower part 28 of the metallic magnetic case.
The 0 side is connected by soldering, the center conductor portion 32 is inserted into the center hole 31 of the dielectric substrate 29, and the circular ground plate 33 is soldered to the inner surface of the lower side 28 of the case made of a metal magnetic material. As shown in FIG. 7, the center conductor portion 32 has a ferrite disk 34 disposed on a circular grounding plate 33, and insulates three strip lines 35, 36, 37 from each other via insulating sheets 38, 39 to form a 120 ° Cross each other, ferrite disk 3
4 is bent and arranged along the upper surface. A DC magnetic field is applied to the ferrite disk 34 by a permanent magnet 40 in a direction perpendicular to the plane. The permanent magnet 40 is disposed on the opposite side of the ferrite disk 34 with respect to the strip lines 35, 36, and 37, and is placed in contact with the inside of the upper portion 41 of the metallic magnetic case.

【0003】誘電体基板29の上面には、整合用コンデ
ンサ42、43、44の一方の端子を半田接続するため
の3個の電極面421、431、441が形成されてい
る。この電極は裏面の接地用電極面30と各々スルホー
ルで接続されている。
[0003] On the upper surface of the dielectric substrate 29, three electrode surfaces 421, 431, 441 for soldering one terminal of the matching capacitors 42, 43, 44 are formed. These electrodes are connected to the grounding electrode surface 30 on the back surface through respective through holes.

【0004】フェライト上で折り曲げられた各ストリッ
プラインの端部の接続用端子45、46、47は、各々
が3個の整合用コンデンサの他端子に半田接続されてい
る。これら整合用コンデンサの内42、43はそれぞれ
が外部接続用入力、出力端子48、49に各ストリップ
ラインの端子の延長部でもって接続される。整合用コン
デンサ44には並列に終端抵抗50が接続され他端が接
地されている。外部接続用接地端子51、52は誘電体
基板29の裏面に設けた接地電極30に接続されてい
る。ケースは金属磁性体からなるケース上側41を永久
磁石を包むようにし、ケース下側28と端部を重ねるよ
うにした後その部分を半田で接続する。
The connection terminals 45, 46, 47 at the ends of the strip lines bent on the ferrite are each soldered to the other terminals of the three matching capacitors. Of these matching capacitors 42 and 43, they are respectively connected to input and output terminals 48 and 49 for external connection with extensions of the strip line terminals. A terminating resistor 50 is connected in parallel to the matching capacitor 44, and the other end is grounded. The external connection ground terminals 51 and 52 are connected to the ground electrode 30 provided on the back surface of the dielectric substrate 29. In the case, the case upper side 41 made of a metallic magnetic material is wrapped around a permanent magnet, and the case lower side 28 is overlapped with the end, and then the part is connected by soldering.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、従来の
アイソレータの構造に於いてはフェライト円板34とケ
ース下側28との間隔が狭いため、永久磁石40からで
た磁束が金属磁性体であるケースの上側41、下側28
を介してフェライト円板34を通るとき、フェライト円
板34の中央部より外周部分の磁束密度が高くなり、フ
ェライト円板34内の磁化分布が悪くなる。
However, in the structure of the conventional isolator, since the distance between the ferrite disk 34 and the lower side 28 of the case is small, the magnetic flux generated from the permanent magnet 40 is a metal magnetic material. Upper side 41, lower side 28
When the magnetic flux passes through the ferrite disk 34 through the ferrite disk 34, the magnetic flux density in the outer peripheral portion becomes higher than the central portion of the ferrite disk 34, and the magnetization distribution in the ferrite disk 34 deteriorates.

【0006】本発明は、このような従来のアイソレータ
の課題を考慮し、フェライト円板内の磁化分布を改良し
てアイソレータ特性である挿入損失を大幅に低減し、優
れた伝送特性を有する非可逆回路素子を提供することを
目的とするものである。
In view of the above problems of the conventional isolator, the present invention improves the magnetization distribution in the ferrite disk, greatly reduces the insertion loss, which is the isolator characteristic, and provides an irreversible having excellent transmission characteristics. It is an object to provide a circuit element.

【0007】[0007]

【課題を解決しようとする手段】本発明はフェライト円
板と円形接地板との間に高周波に対し優れた特性を持つ
誘電体層を挟み金属磁性体の下ケースとフェライト円板
との距離を設けることによりフェライト円板の磁化分布
を改良し、アイソレータの挿入損失を軽減させたもので
ある。
According to the present invention, a dielectric layer having excellent characteristics against high frequencies is sandwiched between a ferrite disk and a circular grounding plate, and the distance between the lower case of the metallic magnetic material and the ferrite disk is increased. By providing them, the magnetization distribution of the ferrite disk is improved, and the insertion loss of the isolator is reduced.

【0008】[0008]

【発明の実施の形態】以下に本発明の実施の形態を図面
を参照しながら説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0009】図1、図2は本発明の一実施の形態による
非可逆回路素子であるアイソレータの構成を説明するた
めの図である。金属磁性体のケース下部1上へ誘電体基
板2の裏面の接地電極面3側を半田接続し、その誘電体
基板2の中央孔27内に、中心導体部4を挿入させて円
形接地板5を金属磁性体からなるケースの下側1の内面
に半田付けする。なお接地電極面3には、誘電体基板2
の中央孔27と同じ孔があいている。
FIGS. 1 and 2 are views for explaining the configuration of an isolator as a non-reciprocal circuit device according to an embodiment of the present invention. The lower surface of the dielectric substrate 2 is solder-connected to the lower surface 1 of the metallic magnetic material on the side of the ground electrode 3, and the center conductor 4 is inserted into the center hole 27 of the dielectric substrate 2 so that the circular ground plate 5 Is soldered to the inner surface of the lower side 1 of the case made of a metal magnetic material. The ground electrode surface 3 has a dielectric substrate 2
The same hole as the center hole 27 is provided.

【0010】中心導体部4は図2に示すように、円形接
地板5上とフェライト円板7の間に誘電体層6を配置
し、さらに3本のストリップライン8、9、10で絶縁
シート11、12を介して互いに絶縁して120度ごと
に交差させ、フェライト円板7の上面に沿わせて折り曲
げ配置されている。
As shown in FIG. 2, the center conductor portion 4 has a dielectric layer 6 disposed on a circular ground plate 5 and between a ferrite disk 7 and three strip lines 8, 9 and 10 to form an insulating sheet. They are insulated from each other via 11 and 12 and intersect every 120 degrees, and are bent and arranged along the upper surface of the ferrite disk 7.

【0011】フェライト円板7には面に垂直な方向へ永
久磁石13により直流磁界が印加されている。この時の
永久磁石13はストリップライン8、9、10に対しフ
ェライト円板7と反対側に配置され、金属磁性体のケー
スの上部14の内側に接して置かれている。
A DC magnetic field is applied to the ferrite disk 7 by a permanent magnet 13 in a direction perpendicular to the plane. At this time, the permanent magnet 13 is arranged on the opposite side of the ferrite disk 7 with respect to the strip lines 8, 9 and 10, and is placed in contact with the inside of the upper portion 14 of the metal magnetic case.

【0012】誘電体基板2の上面15に設けた3個の電
極161、171、181に、整合用コンデンサ16、
17、18を半田接続する。これらの3個の電極は裏面
の接地用電極面3へ、誘電体基板2の本体200の中の
スルホールで接続されている。
The three electrodes 161, 171 and 181 provided on the upper surface 15 of the dielectric substrate 2
17 and 18 are connected by soldering. These three electrodes are connected to the grounding electrode surface 3 on the back surface by through holes in the main body 200 of the dielectric substrate 2.

【0013】フェライト円板7上で折り曲げられた各ス
トリップライン8、9、10の端部の接続用端子19、
20、21は各々が整合用コンデンサ16、17、18
の上面端子162、172、182に半田接続されてい
る。またこれら端子の内19、20はそれぞれが外部接
続用入力、出力端子22、23に各ストリップラインの
端子の延長部でもって接続される。
The connection terminals 19 at the ends of the strip lines 8, 9, 10 bent on the ferrite disk 7,
20, 21 are matching capacitors 16, 17, 18 respectively.
Are soldered to the upper surface terminals 162, 172, 182. Of these terminals, 19 and 20, respectively, are connected to input and output terminals 22 and 23 for external connection with extensions of the terminals of each strip line.

【0014】整合用コンデンサ18には並列に終端抵抗
24が接続され他端が接地されている。外部接続用接地
端子25、26は誘電体基板2の裏面に設けた接地電極
3に接続されている。金属磁性体からなるケース上側1
4を永久磁石13にかぶせ、ケース下側1と端部を重ね
るようにした後その部分を半田で接続する。
A terminating resistor 24 is connected in parallel to the matching capacitor 18 and the other end is grounded. The external connection ground terminals 25 and 26 are connected to the ground electrode 3 provided on the back surface of the dielectric substrate 2. Upper case 1 made of magnetic metal
4 is put on the permanent magnet 13 so that the lower part 1 of the case and the end are overlapped, and the part is connected with solder.

【0015】図3は本実施の形態に於いて、誘電体層6
の厚さを変化させることにより、フェライト円板7の下
面と円形接地板3との距離を変えたときのフェライト円
板7の半径方向の磁化分布を示した。距離を50μm〜
150μmと大きくするに従ってフェライト内の磁化分
布は良くなる。しかし200μmにするとフェライト円
板7の全体の磁化強度が弱くなる。
FIG. 3 shows a dielectric layer 6 according to the present embodiment.
The magnetization distribution in the radial direction of the ferrite disk 7 when the distance between the lower surface of the ferrite disk 7 and the circular ground plate 3 was changed by changing the thickness of the ferrite disk 7 was shown. Distance from 50 μm
As the diameter increases to 150 μm, the magnetization distribution in the ferrite improves. However, when the thickness is set to 200 μm, the entire magnetization intensity of the ferrite disk 7 becomes weak.

【0016】また図4に、誘電体層6の厚さを変化させ
て上記距離を変えたときのアイソレータの挿入損失の様
子を示した。200μmになると挿入損失は悪くなる。
これは距離が大きくなりフェライト円板7の磁化強度が
弱くなったためで、永久磁石13を強くすることにより
少しは改善できるが、50μm〜150μmのような良
好な特性は得られなかった。
FIG. 4 shows the insertion loss of the isolator when the distance is changed by changing the thickness of the dielectric layer 6. When the thickness is 200 μm, the insertion loss becomes worse.
This is because the distance was increased and the magnetization intensity of the ferrite disk 7 was weakened. The strength could be slightly improved by increasing the strength of the permanent magnet 13, but good characteristics such as 50 μm to 150 μm could not be obtained.

【0017】図3、図4はフェライト円板7とケース下
側内面3との間に、ポリイミド、テフロン等の誘電体層
6の厚みを変えて検討した結果であるが、通常回路基板
に用いられるガラスエポキシを誘電体層6に用いた場合
は挿入損失が前者よりも悪くなる。これは高周波に於け
る誘電体損が大きいためである。
FIGS. 3 and 4 show the results obtained by changing the thickness of the dielectric layer 6 such as polyimide or Teflon between the ferrite disk 7 and the inner surface 3 on the lower side of the case. When the used glass epoxy is used for the dielectric layer 6, the insertion loss becomes worse than the former. This is because the dielectric loss at high frequencies is large.

【0018】図5にポリイミド、テフロン、ガラスエポ
キシの3種類を用いたときの、距離100μmに於ける
アイソレータの挿入損失を比較した。
FIG. 5 compares the insertion loss of the isolator at a distance of 100 μm when using three types of polyimide, Teflon, and glass epoxy.

【0019】なお、誘電体層6は、両面に粘着性接着剤
を有し、フェライト下面あるいはフェライト下面に対向
する接地面に予め接着されていてもかまわない。
The dielectric layer 6 may have a tacky adhesive on both sides and may be bonded in advance to the lower surface of the ferrite or the ground plane facing the lower surface of the ferrite.

【0020】[0020]

【発明の効果】以上説明したところから明らかなよう
に、本発明は小型化は勿論薄型化を損なわず安定して高
性能化を果たす非可逆回路素子を提供できる。
As is apparent from the above description, the present invention can provide a non-reciprocal circuit device which stably achieves high performance without deteriorating the size as well as the thickness.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は本発明の非可逆回路素子の構造図であ
る。
FIG. 1 is a structural diagram of a non-reciprocal circuit device of the present invention.

【図2】図2は本発明の中心導体部の構造図である。FIG. 2 is a structural diagram of a center conductor according to the present invention.

【図3】図3はフェライト円板の半径方向の磁化分布を
示したグラフである。
FIG. 3 is a graph showing a magnetization distribution in a radial direction of a ferrite disk.

【図4】図4は挿入損失の、フェライト円板の底面とケ
ース下面の距離異存性を示したグラフである。
FIG. 4 is a graph showing the insertion loss of the distance between the bottom surface of the ferrite disk and the bottom surface of the case.

【図5】図5はフェライト円板の底面とケース下面の間
に100μm厚みのポリイミド、テフロン、ガラスエポ
キシ材を挿入したときの挿入損失を示したグラフであ
る。
FIG. 5 is a graph showing insertion loss when a polyimide, Teflon, or glass epoxy material having a thickness of 100 μm is inserted between the bottom surface of the ferrite disk and the bottom surface of the case.

【図6】図6は従来例の構造図である。FIG. 6 is a structural view of a conventional example.

【図7】図7は従来例の中心導体部の構造図である。FIG. 7 is a structural diagram of a center conductor of a conventional example.

【符号の説明】[Explanation of symbols]

1 ケース下側 2 誘電体基板 3 誘電体基板2の接地電極 4 中心導体部 5 円形接地板 6 誘電体層 7 フェライト円板 8,9,10 ストリップライン 11,12 絶縁シート 13 永久磁石 14 ケース上側 15 誘電体基板2の上面 16,17,18 整合用コンデンサ 19,20,21 ストリップラインの端部接続用端子 22,23 外部接続用入力、出力端子 25 終端抵抗 25,26 外部接続用接地端子 DESCRIPTION OF SYMBOLS 1 Lower case 2 Dielectric substrate 3 Ground electrode of dielectric substrate 2 4 Center conductor 5 Circular ground plate 6 Dielectric layer 7 Ferrite disk 8, 9, 10 Strip line 11, 12 Insulating sheet 13 Permanent magnet 14 Upper case 15 Upper surface of the dielectric substrate 2 16, 17, 18 Matching capacitors 19, 20, 21 Terminals for connecting strip line ends 22, 23 Input and output terminals for external connection 25 Terminating resistors 25, 26 Ground terminals for external connection

───────────────────────────────────────────────────── フロントページの続き (72)発明者 堀尾 泰彦 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5J013 EA01 FA06  ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yasuhiko Horio 1006 Kazuma Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. F-term (reference) 5J013 EA01 FA06

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】フェライト円板上面に互いに120度の間
隔に絶縁されて接するように配置された3本のストリッ
プラインの各1方の端部が、3個の整合用コンデンサ
に、また他方の端部が接地面に接続されてなる中心導体
部ならびに整合用コンデンサと、前記3個の整合用コン
デンサの内の一個の整合用コンデンサに並列に接続され
た終端抵抗と、入出力端子と、接地用端子と、シールド
と磁路の効果を持つ磁性体ケースを備えた非可逆回路素
子に於いて、前記フェライト円板下面と、それに対向す
る前記接地面の間に、所定の高周波特性を有する誘電体
層が設けられていることを特徴とする非可逆回路素子。
1. One end of each of three strip lines arranged so as to be insulated and in contact with an upper surface of a ferrite disk at an interval of 120 degrees is connected to three matching capacitors and the other end. A center conductor having an end connected to the ground plane, a matching capacitor, a terminating resistor connected in parallel to one of the three matching capacitors, an input / output terminal, and a ground. In a non-reciprocal circuit device including a terminal for use, a shield and a magnetic case having the effect of a magnetic path, a dielectric material having a predetermined high-frequency characteristic is provided between the lower surface of the ferrite disk and the ground surface opposed thereto. A non-reciprocal circuit device comprising a body layer.
【請求項2】 前記誘電体層がポリイミド又は、テフロ
ンを材料とすることを特徴とする請求項1記載の非可逆
回路素子。
2. The non-reciprocal circuit device according to claim 1, wherein said dielectric layer is made of polyimide or Teflon.
【請求項3】 前記誘電体層の厚みtが0<t≦150
μmであることを特徴とする請求項1記載の非可逆回路
素子。
3. The thickness t of the dielectric layer is 0 <t ≦ 150.
2. The non-reciprocal circuit device according to claim 1, wherein the thickness is μm.
【請求項4】 前記誘電体層は、両面に粘着性接着剤を
有し、フェライト下面あるいはフェライト下面に対向す
る接地面に予め接着されてなることを特徴とする請求項
1記載の非可逆回路素子。
4. The non-reciprocal circuit according to claim 1, wherein the dielectric layer has an adhesive on both sides and is bonded in advance to a lower surface of the ferrite or a ground plane facing the lower surface of the ferrite. element.
【請求項5】 請求項1〜4のいずれかに記載の非可逆
回路素子をアイソレータとして利用することを特徴とす
る移動体通信機。
5. A mobile communication device using the non-reciprocal circuit device according to claim 1 as an isolator.
JP10349108A 1998-09-25 1998-12-08 Irreversible circuit element and mobile communication unit Pending JP2000174510A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP10349108A JP2000174510A (en) 1998-12-08 1998-12-08 Irreversible circuit element and mobile communication unit
US09/406,260 US6396361B1 (en) 1998-09-25 1999-09-24 Non-reciprocal circuit element with ground terminals on one side free of input/output terminals
CN99120864.1A CN1198358C (en) 1998-09-25 1999-09-27 Nonreciprocal circuit element, lumped element type isolator and mobile communication unit
US10/040,093 US6535074B2 (en) 1998-09-25 2002-01-04 Non-reciprocal circuit element, lumped element type isolator, and mobile communication unit
US10/040,189 US20020089392A1 (en) 1998-09-25 2002-01-04 Non-reciprocal circuit element, lumped element type isolator, and mobile communication unit
US10/040,064 US6531930B2 (en) 1998-09-25 2002-01-04 Non-reciprocal circuit element having a grounding land between input/output patterns

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10349108A JP2000174510A (en) 1998-12-08 1998-12-08 Irreversible circuit element and mobile communication unit

Publications (1)

Publication Number Publication Date
JP2000174510A true JP2000174510A (en) 2000-06-23

Family

ID=18401551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10349108A Pending JP2000174510A (en) 1998-09-25 1998-12-08 Irreversible circuit element and mobile communication unit

Country Status (1)

Country Link
JP (1) JP2000174510A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457061B1 (en) * 2001-11-17 2004-11-18 케이에스엠 주식회사 Isolator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457061B1 (en) * 2001-11-17 2004-11-18 케이에스엠 주식회사 Isolator

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