JP2000174151A - Hermetic seal structure of semiconductor mounting substrate and manufacture thereof - Google Patents

Hermetic seal structure of semiconductor mounting substrate and manufacture thereof

Info

Publication number
JP2000174151A
JP2000174151A JP35122098A JP35122098A JP2000174151A JP 2000174151 A JP2000174151 A JP 2000174151A JP 35122098 A JP35122098 A JP 35122098A JP 35122098 A JP35122098 A JP 35122098A JP 2000174151 A JP2000174151 A JP 2000174151A
Authority
JP
Japan
Prior art keywords
cap
sealing
metal
wiring board
mounting substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35122098A
Other languages
Japanese (ja)
Inventor
Koki Kitaoka
幸喜 北岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP35122098A priority Critical patent/JP2000174151A/en
Publication of JP2000174151A publication Critical patent/JP2000174151A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16251Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate

Abstract

PROBLEM TO BE SOLVED: To provide a required mechanical strength, without concentrating a stress due to the thermal load on a circuit board after/before mounting by forming a hermetic seal with a seal cap composed of metal parts and resin parts. SOLUTION: A seal cap 101 hermetically seals a circuit constituting component containing a semiconductor device 3, the cap 101 is mounted on a circuit board 1 mounting the semiconductor device 3, a resin member having a linear expansion coefficient of about 9×10-6/ deg.C constitutes the outer wall of the cap 101, a very thin metal of Kovar having a linear expansion coefficient of about 4.6×10-6/ deg.C constitutes the inner wall of the cap 101, and the resin member 7 having a linear expansion coefficient of about 9×10-6/ deg.C is adhered to the outer wall of the metal cap 6 having a linear expansion coefficient of about 4.6×10-6/ deg.C. On the whole, the cap approximately matches with the a wiring board having a linear expansion coefficient of about 7×10-6/ deg.C, and hence no stress concentration on the wiring board 1 occurs also after mounting the metal cap 6.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、配線基板に搭載し
た回路構成部品を気密封止する封止部材及び、封止方法
及び、封止部材の製造方法に関する。
The present invention relates to a sealing member for hermetically sealing circuit components mounted on a wiring board, a sealing method, and a method of manufacturing the sealing member.

【0002】[0002]

【従来の技術】配線基板上に実装されている半導体素子
などの回路部品を、金属キャップにより封止する気密封
止構造が従来より採用されている。こうした気密封止構
造は、搭載された回路構成部品を、例えば湿度などの環
境変化や、外界からの機械的作用から保護し、これらが
及ぼす影響を低減ないし回避して、常に所要の機能を発
揮するよう構成されている。
2. Description of the Related Art An airtight sealing structure for sealing a circuit component such as a semiconductor element mounted on a wiring board with a metal cap has been conventionally used. This hermetically sealed structure protects the mounted circuit components from environmental changes such as humidity, and mechanical effects from the outside world, and reduces or avoids the effects of these components, and always performs the required functions. It is configured to be.

【0003】図3に従来構成の概略断面図を示す。導電
性回路パターン2が形成された配線基板1の所定領域
に、半導体素子3などの所要の回路構成部品が搭載・実
装されている。例えば、この半導体素子3は、予めその
パターン面(図示せず)に形成された金属ボール電極4
を介し、配線基板1の導電性回路パターン2と電気的に
接続される。そして、半導体素子3など、所要の回路部
品は、少なくとも半導体素子3を含む回路の一部または
全体を封止する為に必要な空間5を確保するよう、予め
バスタブ形状に加工された金属キャップ6によって、配
線基板1面上に気密封止される。
FIG. 3 shows a schematic sectional view of a conventional structure. Required circuit components such as the semiconductor element 3 are mounted and mounted in a predetermined area of the wiring board 1 on which the conductive circuit pattern 2 is formed. For example, the semiconductor element 3 has a metal ball electrode 4 previously formed on its pattern surface (not shown).
Is electrically connected to the conductive circuit pattern 2 of the wiring board 1 through the wiring. The required circuit components such as the semiconductor element 3 are provided with a metal cap 6 previously processed into a bathtub shape so as to secure a space 5 necessary for sealing at least a part or the entire circuit including the semiconductor element 3. Thereby, the airtight sealing is performed on the surface of the wiring substrate 1.

【0004】金属キャップ6による封止は、配線基板1
面上に予め形成された環状の封止部8と半田付け若しく
は溶接によって実施される。
The sealing with the metal cap 6 is performed on the wiring board 1.
This is performed by soldering or welding with the annular sealing portion 8 formed in advance on the surface.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記構
成の気密封止型半導体装置の場合、次のような問題が認
められる。配線基板1はセラミック材からなり、線膨張
係数は7×10-6/℃程度である。他方、金属キャップ
6はコバール材からなり、線膨張係数は4.6×10-6
/℃程度である材質の組合せである。かつ配線基板が大
型で薄型の場合、例えば平面寸法が約20mm角以上で
厚みが約0.5mm以下の場合、配線基板3と金属キャッ
プ6との線膨張係数の相互の差異により、封止後に配線
基板1が大きく湾曲し中心部に応力が集中する。
However, in the case of the hermetically sealed semiconductor device having the above structure, the following problems are recognized. The wiring board 1 is made of a ceramic material and has a coefficient of linear expansion of about 7 × 10 −6 / ° C. On the other hand, the metal cap 6 is made of Kovar material and has a linear expansion coefficient of 4.6 × 10 −6.
/ ° C. And, when the wiring board is large and thin, for example, when the plane size is about 20 mm square or more and the thickness is about 0.5 mm or less, the difference in linear expansion coefficient between the wiring board 3 and the metal cap 6 causes The wiring substrate 1 is greatly curved, and the stress is concentrated at the center.

【0006】この応力集中により、配線基板に亀裂が生
じて気密性が著しく損なわれ、湿度などの環境変化の影
響を回避すること困難になり、最悪の場合、機器の所要
の機能を得られなくなることがある。
[0006] The stress concentration causes cracks in the wiring board to significantly impair the airtightness, making it difficult to avoid the influence of environmental changes such as humidity, and in the worst case, the required functions of the equipment cannot be obtained. Sometimes.

【0007】この対策として、前記金属キャップ6の肉
厚を薄くする試みが実施されている。しかしながら、金
属キャップ6の肉厚を薄くすると、外界からの機械的作
用に対する保護機能が不十分になる場合が生ずる。この
ため、肉厚が薄い金属キャップに対して機械的保護機能
を向上させる方法として、特開平4−259244号公
報に記載されるように、金属キャップの頂面に溝などを
形設具備し、曲げ強度の向上を図ったものがあった。
As a countermeasure, attempts have been made to reduce the thickness of the metal cap 6. However, when the thickness of the metal cap 6 is reduced, the protection function against mechanical action from the outside may become insufficient. For this reason, as a method of improving the mechanical protection function for a thin metal cap, as described in JP-A-4-259244, a groove or the like is formed on the top surface of the metal cap, There was one that improved the bending strength.

【0008】しかしながら、前記寸法程度に大型かつ薄
型のセラミック等から成る配線基板1においては、金属
キャップを装着後に配線基板に亀裂を生じさせないよう
する為に、金属キャップの板厚を極薄にしなければなら
ない。このため、十分な機械的保護機能を発揮できない
場合が生じる。
However, in the wiring board 1 made of ceramic or the like that is as large and thin as the above dimensions, the thickness of the metal cap must be made extremely thin in order to prevent the wiring board from cracking after the metal cap is mounted. Must. For this reason, there may be cases where a sufficient mechanical protection function cannot be exerted.

【0009】[0009]

【課題を解決するための手段】請求項1に記載の半導体
搭載基板の気密封止構造は、 該気密封止に用いる封止
部材が金属部分と樹脂部分とからなる封止キャップであ
ることを特徴とし、半導体素子を搭載した回路基板に装
着し、前記半導体素子を含む回路構成部品を気密封止す
る構造である。請求項2に記載の半導体搭載基板の気密
封止構造は、請求項1に記載の気密封止構造において、
前記封止キャップの金属部分が、配線基板の接地された
環状導電性回路パターンに、半田付け若しくは溶接によ
り接続され、半導体素子を含む回路の一部または全体を
気密封止するとともに電磁遮蔽することを特徴とする封
止構造である。
According to a first aspect of the present invention, there is provided a hermetically sealed structure for a semiconductor mounting substrate, wherein a sealing member used for the hermetic sealing is a sealing cap including a metal portion and a resin portion. It is characterized in that it is mounted on a circuit board on which a semiconductor element is mounted, and hermetically seals circuit components including the semiconductor element. The hermetic sealing structure of the semiconductor mounting substrate according to claim 2 is the hermetic sealing structure according to claim 1,
The metal portion of the sealing cap is connected to a grounded annular conductive circuit pattern of the wiring board by soldering or welding to hermetically seal and electromagnetically shield a part or the whole of the circuit including the semiconductor element. It is a sealing structure characterized by the following.

【0010】請求項3に記載の気密封止構造の製造方法
は、請求項1に記載の半導体搭載基板の気密封止構造の
製造方法であって、前記封止キャップの製造を、金属板
を予めバスタブ形状に加工し、該金属板と金属板を挟持
する成形金型との間隙に樹脂を充填し、封止キャップ外
壁に樹脂部を構成する方法をもって製造することを特徴
とする、半導体搭載基板の気密封止構造の製造方法であ
る。
A third aspect of the present invention is a method for manufacturing a hermetically sealed structure of a semiconductor mounting substrate according to the first aspect, wherein the manufacturing of the sealing cap is performed by using a metal plate. A semiconductor mounting, which is manufactured in advance by processing into a bathtub shape, filling a gap between the metal plate and a molding die holding the metal plate with a resin, and forming a resin portion on an outer wall of a sealing cap. This is a method for manufacturing a hermetically sealed structure for a substrate.

【0011】[0011]

【発明の実施の形態】以下、図を参照して、本発明につ
いて詳細に説明する。図1は、本発明の第1の実施例で
あり、本発明に係る気密封止型半導体装置の概略断面を
示したものである。配線基板1は、線膨張係数が7×1
-6/℃程度のセラミック材から成り、配線基板1の所
定領域面上の導電性回路パターン2上には、所要の回路
部品が搭載・実装されてある。例えば半導体素子3は、
予めそのパターン面(図示せず)に形成された金属ボー
ル電極4を介し、セラミック配線基板1の導電性回路パ
ターン2と電気的に接続されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 shows a first embodiment of the present invention, and shows a schematic cross section of a hermetically sealed semiconductor device according to the present invention. The wiring board 1 has a linear expansion coefficient of 7 × 1
Necessary circuit components are mounted and mounted on a conductive circuit pattern 2 on a predetermined area surface of the wiring board 1 made of a ceramic material of about 0 −6 / ° C. For example, the semiconductor element 3
It is electrically connected to the conductive circuit pattern 2 of the ceramic wiring board 1 via a metal ball electrode 4 formed on the pattern surface (not shown) in advance.

【0012】封止キャップ101は、半導体素子3を含
む回路部の一部または全体を覆う為に必要な空間を有す
る、予めバスタブ形状に加工されてある。さらに封止キ
ャップ101の外壁面は、線膨張係数が9×10-6/℃
程度の樹脂部材7で構成されている。封止キャップ10
1の内壁面は、線膨張係数が4.6×10-6/℃程度の
コバール材から成る極薄型の金属によって構成される。
封止キャップ101はさらに、配線基板1面上に予め形
成された環状の封止部8と、半田付け若しくは溶接によ
り固着される。
The sealing cap 101 is preliminarily processed into a bathtub shape having a space necessary to cover a part or the whole of a circuit portion including the semiconductor element 3. Further, the outer wall surface of the sealing cap 101 has a coefficient of linear expansion of 9 × 10 −6 / ° C.
It is made up of resin members 7 of a degree. Sealing cap 10
The inner wall surface of No. 1 is made of an extremely thin metal made of Kovar having a coefficient of linear expansion of about 4.6 × 10 −6 / ° C.
The sealing cap 101 is further fixed to the annular sealing portion 8 formed in advance on the surface of the wiring board 1 by soldering or welding.

【0013】ここに、線膨張係数が4.6×10-6/℃
程度の金属キャップ6の外壁面に、線膨張係数が9×1
-6/℃程度の樹脂部材7を密着することにより、全体
として、線膨張係数が7×10-6/℃程度の配線基板1
と略整合するため、金属キャップ6を装着後も、配線基
板1に応力集中が発生することが無い。
Here, the coefficient of linear expansion is 4.6 × 10 −6 / ° C.
A linear expansion coefficient of 9 × 1 on the outer wall of the metal cap 6
By adhering the resin member 7 of about 0 −6 / ° C., the wiring board 1 having a linear expansion coefficient of about 7 × 10 −6 / ° C. as a whole
Therefore, stress concentration does not occur on the wiring board 1 even after the metal cap 6 is attached.

【0014】尚、前記環状の封止部8は配線基板1面上
の導電性回路パターン2の内、接地電位と予め接続され
ていることで、半導体素子3から発する高周波及び外部
からのノイズを効果的に電磁遮蔽するものである。
The annular sealing portion 8 is connected to a ground potential in the conductive circuit pattern 2 on the surface of the wiring substrate 1 in advance, so that high-frequency noise from the semiconductor element 3 and external noise can be reduced. It effectively shields electromagnetic waves.

【0015】また図2(a)ないし(d)は、前述の金
属キャップの製造工程図である。本発明に係る金属キャ
ップの主要工程毎の概略を断面的に図示した。
2 (a) to 2 (d) are manufacturing process diagrams of the above-mentioned metal cap. The outline of each of the main steps of the metal cap according to the present invention is shown in a sectional view.

【0016】図2(a)において、必要な空間を構成す
るバスタブ形状の事前加工を施した短冊状またはフープ
形状の極薄の金属板21が、予め加熱された成型下金型
22の所定面上に配置される。
In FIG. 2 (a), a strip-shaped or hoop-shaped ultra-thin metal plate 21 which has been pre-processed in a bathtub shape and forms a required space is provided on a predetermined surface of a pre-heated lower mold 22. Placed on top.

【0017】図2(b)において、金属板21を挟み込
むように成型上金型23が下降する。成型下金型23の
所定部分には、金属板21との間に所要の空隙24を確
保するよう彫り込みが加工されている。尚、成型上金型
23も成型下金型22と同様予め加熱されている。
In FIG. 2B, the upper mold 23 is lowered so as to sandwich the metal plate 21. A predetermined portion of the lower mold 23 is engraved so as to secure a required gap 24 with the metal plate 21. The upper mold 23 is also heated in advance similarly to the lower mold 22.

【0018】図2(c)において、金属板21と成型上
金型23との間の空隙24に、流動状態の熱硬化型エポ
キシ成型樹脂25が充填され、金属板21の成型上金型
側の所定部分全面が熱硬化型エポキシ成型樹脂25によ
って被覆される。更に、樹脂硬化までの所要時間を保圧
した後、成型上金型23が上昇し、更に熱硬化型エポキ
シ成型樹脂25が被着された金属板21が離型される
(図示せず)。その後、所要時間の加熱により、熱硬化
型エポキシ成型樹脂25は完全硬化する(図示せず)。
尚、電磁遮蔽効果を高める目的及び、配線基板との半田
付け性若しくは溶接性向上を目的に、金属板21の金属
が露出した側に金メッキ等が施される場合もある(図示
せず)。
In FIG. 2 (c), a gap 24 between the metal plate 21 and the upper mold 23 is filled with a thermosetting epoxy molding resin 25 in a flowing state. Is covered with a thermosetting epoxy molding resin 25. Further, after keeping the required time until the resin is cured, the upper mold 23 is raised, and the metal plate 21 on which the thermosetting epoxy resin 25 is applied is released (not shown). Thereafter, the heating for a required time completely cures the thermosetting epoxy molding resin 25 (not shown).
In some cases, gold plating or the like may be applied to the side of the metal plate 21 where the metal is exposed for the purpose of enhancing the electromagnetic shielding effect and improving the solderability or weldability with the wiring board (not shown).

【0019】図2(d)において、金属板21は所要の
大きさに切断され、個片化されて、内側に金属面が露出
し、外壁面に樹脂部材が被覆された金属キャップ101
を得る。
In FIG. 2D, the metal plate 21 is cut into a required size, divided into individual pieces, the metal surface is exposed on the inner side, and the outer wall surface is covered with a resin member.
Get.

【0020】上記金属キャップの製造方法は、一般的な
トランスファモールドによる半導体素子の樹脂封止工程
を応用することにより製造が可能である為、量産性に富
む。また、専用金型以外に新規設備投資を必要としない
為、著しいコスト上昇を伴うことが無い。
The above-described method of manufacturing a metal cap can be manufactured by applying a resin sealing step of a semiconductor element by a general transfer mold, and therefore, is excellent in mass productivity. In addition, since no new capital investment is required except for the dedicated mold, there is no significant cost increase.

【0021】尚、上記実施例は、配線基板の材質がセラ
ミックで、金属キャップの外壁面を被覆する樹脂部材が
熱硬化型エポキシ成型樹脂の場合について記載したが、
これらの材料に限定されるものではない。配線基板とし
ては、金属板と線膨張係数との不整合がある材料にも適
応でき、また樹脂部材としては、配線基板への装着の為
の半田付け若しくは溶接時の熱に耐えられる材料であれ
ば適用可能であることは自明である。
In the above embodiment, the case where the material of the wiring board is ceramic and the resin member covering the outer wall surface of the metal cap is a thermosetting epoxy molding resin has been described.
It is not limited to these materials. As the wiring board, a material having a mismatch between the metal plate and the coefficient of linear expansion can be applied, and as the resin member, a material that can withstand heat during soldering or welding for mounting on the wiring board. It is self-evident if applicable.

【0022】[0022]

【発明の効果】上記本発明に係る気密封止型半導体装置
の構成において、気密封止に関与する金属キャップを、
極薄型の金属板から成る金属キャップの外壁面に樹脂部
材を被覆することにより、所要の機械的強度が付与され
る。
In the structure of the hermetically sealed semiconductor device according to the present invention, a metal cap involved in hermetic sealing is provided.
By coating the outer wall surface of the metal cap made of an extremely thin metal plate with a resin member, required mechanical strength is imparted.

【0023】さらに、大型でかつ薄型のセラミック等か
ら成る配線基板に実装された、少なくとも半導体素子を
含む回路部品を前記キャップで封止することにより、金
属キャップとセラミック等の配線基板との、線膨張係数
の不整合により生じる配線基板の湾曲を抑えることがで
きる。したがって、配線基板に亀裂を生じさせることな
く、高い気密性・耐環境性が確保できる。
Further, by sealing a circuit component including at least a semiconductor element, which is mounted on a large and thin wiring board made of ceramic or the like, with the cap, a wire between the metal cap and the wiring board made of ceramic or the like is formed. The curvature of the wiring board caused by the mismatch of the expansion coefficients can be suppressed. Therefore, high airtightness and environmental resistance can be secured without causing cracks in the wiring board.

【0024】また、前記の外面に樹脂部材を被覆した金
属キャップは、予めバスタブ形状に加工された短冊形状
またはフープ形状の極薄型の金属板を射出成形金型に挟
み込み、樹脂部材を充填して得られる。したがって、一
般的なトランスファモールドによる半導体素子の、樹脂
封止工程を用いた製造が可能であるため、量産性に富
み、専用金型以外には新規な設備投資を必要とせず、著
しいコスト上昇を伴わない。
The metal cap having the outer surface covered with a resin member is prepared by inserting a strip-shaped or hoop-shaped ultra-thin metal plate previously processed into a bathtub shape into an injection molding die and filling the resin member. can get. Therefore, it is possible to manufacture a semiconductor element by a general transfer mold using a resin encapsulation process, so that it is highly mass-producible and does not require new capital investment other than dedicated molds, resulting in a significant cost increase. Not accompanied.

【0025】更に、金属キャップの端部を、配線基板面
上の導電性回路パターンの内、接地された環状パターン
の封止部に半田付けやろう付けや溶接等の電気的接続を
伴う固着手段を用いて接続することにより、半導体素子
から発する高周波及び外部からのノイズを効果的に電磁
遮蔽することができる。
Further, the end of the metal cap is secured to the sealing portion of the grounded annular pattern in the conductive circuit pattern on the wiring board surface by means of electrical connection such as soldering, brazing or welding. By using this, it is possible to effectively electromagnetically shield high frequency and external noise emitted from the semiconductor element.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の形態の気密封止型半導体装
置の断面図である。
FIG. 1 is a cross-sectional view of a hermetically sealed semiconductor device according to an embodiment of the present invention.

【図2】本発明の一実施例の気密封止型半導体装置に用
いられる金属キャップの製造工程の主要工程毎の概略の
断面図である。
FIG. 2 is a schematic cross-sectional view of each of main steps of a manufacturing process of a metal cap used in the hermetically sealed semiconductor device of one embodiment of the present invention.

【図3】従来の気密封止型半導体装置の断面図である。FIG. 3 is a cross-sectional view of a conventional hermetically sealed semiconductor device.

【符号の説明】[Explanation of symbols]

1 配線基板 2 回路パターン 3 半導体素子 4 ボール電極 5 空間 6 金属キャップ 7 樹脂部材 8 封止部 21 成型下金型 22 バスタブ加工した金属板 23 成型上金型 24 空隙 25 熱硬化型エポキシ成型樹脂 101 樹脂部材を被覆した金属キャップ DESCRIPTION OF SYMBOLS 1 Wiring board 2 Circuit pattern 3 Semiconductor element 4 Ball electrode 5 Space 6 Metal cap 7 Resin member 8 Sealing part 21 Molding lower mold 22 Bath-processed metal plate 23 Molding upper mold 24 Void 25 Thermosetting epoxy molding resin 101 Metal cap coated with resin member

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子を搭載した回路基板に装着
し、前記半導体素子を含む回路構成部品を気密封止する
構造において、 該気密封止に用いる封止部材が金属部分と樹脂部分とか
らなる封止キャップであることを特徴とする、半導体搭
載基板の気密封止構造。
1. A structure which is mounted on a circuit board on which a semiconductor element is mounted and hermetically seals circuit components including the semiconductor element, wherein a sealing member used for hermetic sealing comprises a metal part and a resin part. An airtight sealing structure for a semiconductor mounting substrate, which is a sealing cap.
【請求項2】 請求項1に記載の半導体搭載基板の気密
封止構造において、 前記封止キャップの金属部分が、配線基板の接地された
環状導電性回路パターンに、半田付け若しくは溶接によ
り接続され、半導体素子を含む回路の一部または全体を
気密封止するとともに電磁遮蔽することを特徴とする、
半導体搭載基板の気密封止構造。
2. The hermetically sealed structure of a semiconductor mounting substrate according to claim 1, wherein a metal portion of the sealing cap is connected to a grounded annular conductive circuit pattern of the wiring board by soldering or welding. , Characterized in that a part or the whole of the circuit including the semiconductor element is hermetically sealed and electromagnetically shielded,
Hermetically sealed structure for semiconductor mounting substrate.
【請求項3】 請求項1に記載の半導体搭載基板の気密
封止構造の製造方法であって、 前記封止キャップの製造を、金属板を予めバスタブ形状
に加工し、該金属板と金属板を挟持する成形金型との間
隙に樹脂を充填し、封止キャップ外壁に樹脂部を構成す
ることで行うことを特徴とする半導体搭載基板の気密封
止構造の製造方法。
3. The method for manufacturing a hermetically sealed structure of a semiconductor mounting substrate according to claim 1, wherein the sealing cap is manufactured by processing a metal plate into a bathtub shape in advance. A method of manufacturing a hermetically sealed structure for a semiconductor mounting substrate, comprising: filling a gap between a mold and a molding die with resin to form a resin portion on an outer wall of a sealing cap.
JP35122098A 1998-12-10 1998-12-10 Hermetic seal structure of semiconductor mounting substrate and manufacture thereof Pending JP2000174151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35122098A JP2000174151A (en) 1998-12-10 1998-12-10 Hermetic seal structure of semiconductor mounting substrate and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35122098A JP2000174151A (en) 1998-12-10 1998-12-10 Hermetic seal structure of semiconductor mounting substrate and manufacture thereof

Publications (1)

Publication Number Publication Date
JP2000174151A true JP2000174151A (en) 2000-06-23

Family

ID=18415868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35122098A Pending JP2000174151A (en) 1998-12-10 1998-12-10 Hermetic seal structure of semiconductor mounting substrate and manufacture thereof

Country Status (1)

Country Link
JP (1) JP2000174151A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008047827A (en) * 2006-08-21 2008-02-28 Hamamatsu Photonics Kk Translucent cap member and manufacturing method thereof
WO2013047354A1 (en) * 2011-09-26 2013-04-04 日本電気株式会社 Hollow sealing structure
EP2390908A3 (en) * 2010-03-26 2014-01-01 Seiko Instruments Inc. Method of manufacturing an electronic device package
EP2552020A3 (en) * 2011-07-28 2014-01-08 Sil Crystal Technology Inc. Electronic device, oscillator, and method of manufacturing electronic device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008047827A (en) * 2006-08-21 2008-02-28 Hamamatsu Photonics Kk Translucent cap member and manufacturing method thereof
EP2390908A3 (en) * 2010-03-26 2014-01-01 Seiko Instruments Inc. Method of manufacturing an electronic device package
EP2552020A3 (en) * 2011-07-28 2014-01-08 Sil Crystal Technology Inc. Electronic device, oscillator, and method of manufacturing electronic device
WO2013047354A1 (en) * 2011-09-26 2013-04-04 日本電気株式会社 Hollow sealing structure
US9125311B2 (en) 2011-09-26 2015-09-01 Nec Corporation Hollow sealing structure

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