JP2000164114A - Field emission type cold cathode and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a field emission type cold cathode having a small electrostatic capacity between a gate and a cathode. SOLUTION: A field emission type cold cathode 1 for emitting electron into the vacuum is formed of a board 2 of Si, an insulating layer 3, a gate electrode 4, a second insulating layer 5, a negative electrode layer 6, cavities 7 formed in the insulating layer 3 and the gate electrode 4, and a conical emitter 8 formed in a bottom of the cavities 7. The negative electrode layer 6 is formed on the board 2, and plural emitters 8 are formed on the negative electrode layer 6, and the cold cathode 1, the negative electrode layer 6 and the emitters 8 are electrically connected to each other. An area formed with the emitter 8 is formed into an electron emitting area 9 for emitting the electron, and equally formed with an area formed with the negative electrode layer 6. The insulating layer 3 is formed on the board 2 and the negative electrode layer 6, and insulates between the gate electrode 4 and the board 2 and between the gate electrode 4 and the negative electrode layer 6, and decides a space between the gate electrode 4 and the board 2. The second insulating layer 5 is formed in the board in the peripheral part of the electron emitting area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission cold cathode which emits electrons in a vacuum and a method of manufacturing the same, and more particularly, to a field emission cold cathode having a small capacitance between a gate and a cathode and its manufacturing. It is about the method.

[0002]

2. Description of the Related Art A minute conical emitter and a control electrode (gate electrode) formed in the immediate vicinity of the emitter and having a function of extracting a current from the emitter and a current control function.
And a field emission cold cathode in which micro cold cathodes composed of A. Spindt et al. (CASpindt, A thin-film field-emission cat
hode, Journal of Applied Physics, Vol. 39, No. 7, p
p.3504, 1968). In this specification, a field emission cold cathode is a field emission cold cathode that emits electrons into a vacuum.

Here, the configuration of the above-mentioned field emission cold cathode will be described with reference to FIG. FIG. 7A shows the structure of the field emission cold cathode, and FIG. 7B shows a cross-sectional view of one minute cold cathode 107 constituting the field emission cold cathode. FIG.
(A) and (b), as shown in FIG.
Is an insulating layer formed on the silicon substrate 101, and the control electrode 103 is laminated on the insulating layer 102. The insulating layer 102 and a part of the control electrode 103 are removed to form a cavity 109, and the substrate 101 in the cavity 109 is formed.
An emitter 104 having a sharp tip is formed on the substrate.
Emitter 104, control electrode 103 and control electrode 103
And the cavity 109 formed in the insulating layer 102 to form the minute cold cathode 1
07 are formed, and the minute cold cathodes 107 are arranged in an array to form a cold cathode 108 having a planar electron emission region.

The substrate 101 and the emitter 104 are electrically connected, and the emitter 104 and the gate electrode 103
During this time, a voltage of about 50 V is applied. The thickness of the insulating layer 102 is about 1 μm, and the opening diameter of the gate electrode 103 is also about 1 μm.
Since the tip of the emitter 104 is very sharp, about 10 nm, a strong electric field is applied to the tip of the emitter 104. When this electric field becomes 2-5 × 10 ⁷ V / cm or more, electrons are emitted from the tip of the emitter 105.

A micro cold cathode having such a structure is mounted on a substrate 101.
A flat cathode (FEA cathode) that emits a large current is formed by arranging the cathodes in an array. Furthermore, if micro cold cathodes are arranged at a high density by utilizing the microfabrication technology, the cathode current density can be made 5 to 10 times or more of the conventional hot cathode.

The Spindt-type cold cathode has advantages that a higher cathode current density can be obtained as compared with a hot cathode and that the speed dispersion of emitted electrons is small. Also, the current noise is smaller than that of the single field emission emitter,
It operates at a low voltage of about several tens of volts, and operates even in an environment with a relatively poor vacuum degree of about 10 ⁻⁵ Pa.

As a method of mounting the FEA cathode on an electron gun of a microwave tube such as a TWT, a cold cathode 112 mounted on a cathode support 111 is attached to a spring 113 as shown in FIG.
A technique has been proposed in which a pressure electrode is fixed to the closest focusing electrode (Wehnelt electrode) 114 (JP-A-10-125242). According to this technique, since the FEA cathode can be connected to the electron gun electrode without using a bonding wire or a tab, the structure is simple, the reliability is high, and the assembly can be performed with high accuracy. Further, since the electrode component does not have asymmetry with respect to the central axis, a potential distribution excellent in axial symmetry is obtained, and a high-quality electron beam 115 can be formed.

However, when such a mounting method is adopted, it is necessary to form the gate electrode widely outside the electron emission region in order to secure contact between the gate electrode and the Wehnelt electrode. However, the gate-cathode (substrate) of the FEA cathode
Since the distance between the gates is as small as about 0.3 to 1 μm,
The capacitance between the cathodes increases. Therefore, a high-frequency signal is applied between the gate and the cathode to turn on the electron beam.
-OFF control and density modulation become difficult. In order to reduce the capacitance between the gate and the cathode, there is a method of increasing the distance between the gate and the cathode. However, in order to increase the gate-cathode distance beneath the electron emission region, it is necessary to form an emitter having a large aspect ratio, that is, a height / bottom diameter, which involves process difficulties.

For this reason, a method is disclosed in which the thickness of the insulating layer outside the electron emission region where the emitter is formed is increased. The structure shown in FIG. 9 is a structure disclosed in Japanese Unexamined Patent Publication No. 7-161286.
A cross-sectional cathode structure diagram in which a COS oxide film is formed is shown. In addition, Japanese Patent Application Laid-Open No. 9-82248 discloses a structure in which a multilayer insulating layer is deposited on the periphery in addition to a normal gate-emitter insulating layer as shown in FIG.

The structures shown in FIGS. 9 and 10 can reduce the capacitance outside the electron emission region. However, the insulating layer is formed by thermal oxidation of the surface of the Si substrate or deposition of the insulating material by sputtering or CVD. Since it is formed, it is extremely difficult to form a thick insulating layer of 5 μm or more, so that it is impossible to greatly reduce the capacitance between the gate and the cathode.

The field emission cold cathode shown in FIG.
No. -208744 discloses a field emission cold cathode in which a p-type layer is formed on an n-type substrate through a circular mask, and the p-type layer is formed by anodizing and thermal oxidation to form a porous layer and an insulating layer. The projection of the n-type layer formed when the p-type layer is formed at the same time is used as the emitter. The thickness of the insulating layer is equal to the height of the emitter, and the insulating layer is formed in the electron emission region. In addition, the anodization used in the FEA cathode process disclosed in the present invention, the insulating layer forming technology by thermal oxidation,
It is also disclosed for device isolation of integrated circuits. (JP-A-57-56942, JP-A-59-16341)

[0012]

As described above, in the configuration of the conventional field emission cold cathode, it is difficult to reduce the capacitance between the gate and the cathode. There is a problem that it is difficult to apply a signal to perform accurate on / off control and density modulation of an electron beam with high modulation sensitivity. Therefore, an object of the present invention is to provide a field emission cold cathode having a small capacitance between a gate and a cathode, and to provide a method of manufacturing such a field emission cold cathode. An object of the present invention is to provide an electron gun equipped with such a field emission cold cathode.

[0013]

To achieve the above object, a field emission cold cathode according to the present invention comprises a first insulating layer laminated on a semiconductor substrate, and a first insulating layer laminated on the first insulating layer. A conductive layer, a plurality of cavities commonly formed in the first insulating layer and the conductive layer, an electron emission electrode having a sharp portion formed in the cavity, A second insulating layer formed in the substrate so as to surround the electron emission region in which the electrode is formed.

[0014] Preferably, a conductive thin film is provided in the electron emission region between the substrate and the first insulating layer and the electron emission electrode. The thickness of the second insulating layer is 5
To 50 μm. Further, the thickness of the second insulating layer changes concentrically around the electron emission region in a plurality of steps, and the thickness increases toward the periphery.
In the present invention, preferably, the second insulating layer is formed by anodization and thermal oxidation.

The method for producing a field emission cold cathode according to the present invention comprises the steps of: forming a mask on an n-type silicon substrate; making the periphery of the mask of the substrate porous by anodizing; Thermally oxidizing the polished portion; removing the mask to planarize the substrate surface; sequentially depositing an insulating layer and a conductor layer on the planarized substrate; Forming a plurality of cavities common to the layer and the conductor layer; and forming an electrode having a sharp portion in the cavities.

In the field emission emitter array (FEA) cathode, the distance between the gate and the cathode is as narrow as 1 μm or less, and the gate electrode is formed outside the electron emission region (emitter formation region) to connect to the electrode of the electron gun. Must-have. Further, it has been difficult to form a thick oxide film by the conventional deposition method or surface oxidation method. For this reason, the capacitance between the cathode and the gate is large, and it has been difficult to modulate the electron beam at a high frequency. In the present invention, porous Si is selectively formed to a depth of 5 to 50 μm by anodization,
By thermally oxidizing this, a thick oxide film can be formed outside the electron emission region. However, since porous Si is made isotropically, after thermal oxidation and planarization (CMP), a conductive layer is coated on the electron emission region to relax the conditions of the anodization process and at the same time to provide sufficient static electricity. Enables capacity reduction.

[0017]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Embodiment 1 This embodiment is an example of the embodiment of the field emission cold cathode according to the present invention, and FIG. 1A is a plan view of the field emission cold cathode of the embodiment, and FIG. b) is AB in FIG.
FIG. As shown in FIG. 1, the field emission cold cathode 1 of the present embodiment is a field emission cold cathode that emits electrons into a vacuum, and comprises a Si substrate 2, an insulating layer 3, a gate electrode 4, a second insulating It comprises a layer 5, a cathode electrode layer 6, an insulating layer 3, a cavity 7 formed in the gate electrode 4, and a conical emitter 8 formed at the bottom of the cavity 7.

The cathode electrode layer 6 is formed on the substrate 2, on which a plurality of emitters 8 are formed.
The cathode electrode layer 6 and the emitter 8 are electrically connected to each other. The region where the emitter 8 is formed becomes an electron emission region 9 for emitting electrons, and is substantially equal to the region where the cathode electrode layer 6 is formed. The insulating layer 3 is formed on the substrate 2 and the cathode electrode layer 6, and the gate electrode 4 and the substrate 3
Insulation between the gate electrode 4 and the substrate 2 is determined. The second insulating layer 5 is formed in the substrate around the electron emission region.

The reason why the gate electrode 4 extends widely outside the electron emission region 9 is that the gate electrode 4 is brought into contact with the focusing electrode of the electron gun at this portion to transmit a voltage from the outside to the gate electrode 4, and
This is for fixing the cold cathode to the focusing electrode. This structure eliminates the need for wiring on the cold cathode or connection from the cold cathode to the electron gun electrode with wires or tabs, giving an axially asymmetric electric field to the electron beam in the electron gun, or the position visible from the electron beam. Since there is no dielectric, the problem of charge accumulation can be prevented.

A method of manufacturing the field emission cold cathode of the first embodiment will be described with reference to FIG. FIGS. 2A to 2E are cross-sectional views of respective steps when manufacturing the field emission cold cathode of the embodiment. First, as shown in FIG. 2A, a mask 11 for selectively making the substrate 2 porous is patterned near the electron emission region 9 on the low-resistance n-type substrate 2. Ohmic contact 12 on the back of 2
To form The mask 11 uses a silicon nitride thin film.

Next, as shown in FIG. 2B, a porous silicon layer 13 is formed to a depth of 5 to 50 μm by a method called anodization or anodic oxidation. In order to form a porous silicon layer in n-type silicon by anodization, in a mixed solution of hydrogen fluoride and ethanol, while irradiating light, platinum is used as a counter electrode and 10 to 100 mA / c.
It energized in m ² about current density.

Next, as shown in FIG. 2C, the porous silicon layer 13 is selectively thermally oxidized by using the mask 11 on which the porous silicon layer 13 is formed, thereby forming the porous silicon layer. 13 is changed to a silicon oxide layer to form a second insulating layer 5. At the stage where the thermal oxidation is performed and the mask 11 is removed, the surface of the substrate 2 has a difference in height between a portion where the silicon is exposed and a portion where the silicon oxide is exposed,
As shown in FIG. 2D, chemical mechanical planarization (CMP)
The surface is flattened by the process and has a thickness of about 5 to 50
A second insulating layer having a thickness of μm is formed.

Thereafter, a process of forming a cathode electrode layer 6 with a conductive material in the electron emission region 9 and then forming a normal field emission emitter array cathode (CASpindt, A thin-f
ilmfield-emission cathode, Journal of Applied Phys
ics, Vol. 39, No. 7, pp. 3504, 1968), an insulating layer 3, a gate electrode 4, a cavity 7, and an emitter 8 are formed.

Next, the operation of the field emission cold cathode 1 will be described. In FIG. 1, the emitter 8 is in electrical contact with the substrate 2 via the cathode electrode layer 6. Therefore, by the voltage of about 50 V applied between the substrate 2 and the gate electrode 4,
A strong electric field is applied to the tip of the sharpened emitter 8,
Electrons are emitted from the tip of the emitter 8. Also, by changing the voltage applied between the substrate 2 and the gate electrode 4, the amount of electron beam emitted from the cathode 1 can be modulated.

According to the manufacturing method of the present embodiment, the thickness of the second insulating layer 5 can be reduced to about 50 μm. The capacitance between the gate electrode 4 other than the emission region 9 and the substrate 2 can be reduced to 50-100 times. Therefore, the frequency characteristics can be greatly improved as compared with the cold cathode having the conventional structure. Since the process for forming the porous silicon for forming the second insulating layer 5 utilizes an isotropic phenomenon, the second insulating layer 5 on the surface of the substrate 2 is formed.
And the substrate material is located inside the outer periphery of the mask 11. The amount is expected to be on the order of 5 to 50 μm in thickness of the porous silicon formation, but this boundary may vary depending on manufacturing process conditions.

By forming the cathode electrode layer 6 of a conductive material under the emitter 8, a region where the emitter 8 can be formed regardless of the position of the boundary can be secured. For this reason, a sufficiently thick insulating layer can be formed without severely suppressing the process conditions, and since this boundary is allowed to be inside the cathode electrode layer 6, a thick insulating layer can be formed in a sufficiently wide range. . Further, the dielectric constant of the silicon oxide layer formed from porous silicon is smaller than the dielectric constant of silicon oxide obtained by thermally oxidizing silicon single crystal, which is about 4. As described above, according to the first embodiment of the present invention, the thickness of the insulating layer between the gate electrode 4 and the substrate 2, the region where the thickness is maintained, and the dielectric constant can be set to the ideal state. In addition, the capacitance between the gate electrode 6 and the substrate 2 can be reduced to near the limit. Further, since the dielectric layer formed by thermal oxidation or CVD or the like is used for the insulating layer 3 between the gate electrode 4 and the cathode electrode layer 6 in the electron emission region 9, the gate electrode 4 and the cathode electrode layer 6 And the electron emission characteristics excellent in reproducibility can be realized.

Embodiment 2 This embodiment is another example of the embodiment of the field emission cold cathode according to the present invention. FIG. 3 is a sectional structural view of the field emission cold cathode which is Embodiment 2 of the present invention. is there. The field emission cold cathode 1 of the present embodiment is different from the first embodiment shown in FIG. 1 in that the thickness of the second insulating layer 5 is two steps instead of the absence of the cathode electrode layer 6. However, it is different. 3, the same components as those in FIG. 1 are all given the same reference numerals as in FIG. In the present embodiment, the second insulating layer 5 is composed of 2
It is formed by a step process, and the peripheral portion is thicker, and the inside in contact with the electron emission region 9 is thinner than the outside. The inner peripheral portion of the second insulating layer 5 is formed so as to be larger than a region where the emitter 8 is formed, and the emitter 8 is reliably formed on a non-oxidized substrate material.

Method of Manufacturing Field Emission Cold Cathode of Second Embodiment A method of manufacturing the field emission cold cathode of the second embodiment will be described with reference to FIG. FIGS. 4A to 4F are cross-sectional views of respective steps when manufacturing the field emission cold cathode of the present embodiment. When manufacturing the field emission cold cathode according to the present embodiment, as in Embodiment 1, FIG.
As shown in FIG. 5, a mask 11 for selectively making the substrate 2 porous is patterned near the electron emission region 9 on the low-resistance n-type substrate 2 and an ohmic contact is formed on the back surface of the substrate 2. 12 is formed. Next, as shown in FIG. 4B, a porous silicon layer 13 is formed to a depth of 5 to 50 μm by a method called anodization or anodic oxidation.

In this embodiment, following the process (b) for forming the porous silicon layer 13 shown in FIG.
As shown in (c), a mask 11A having a small outer diameter is formed, and a thin portion of porous silicon is formed inside.

Assuming that the diameter of the electron emission region 9 is de, the thickness of the outer porous silicon layer is tf, and the thickness of the inner porous silicon layer is ts, the region where the porous silicon is formed is the emitter forming region. The outer diameter df of the mask 11 to be formed first and the outer diameter ds of the mask 11A to be formed next are represented by df> de + 2tf + αf ds> de + 2ts + αs. Here, αf and αs are allowances, which are values proportional to tf and ts, respectively.
% Should be expected.

To decrease the capacitance, it is necessary to increase tf. However, since αf increases in proportion to this, df
Cannot be reduced, and there is a limit to capacity reduction. 2
By forming the porous silicon layer of the step, tf is made sufficiently large, and at the same time, ds is made small by relatively small ts, so that the second insulating layer can be formed with relatively high accuracy near the electron emission region. .

Next, as in the first embodiment, FIG.
As shown in (d), (e) and (f), the field emission cold cathode 1 of Embodiment 2 is manufactured. That is, the porous silicon layer 13 is selectively thermally oxidized using the mask 11 on which the porous silicon layer 13 is formed, so that the porous silicon layer 13 is changed to a silicon oxide layer, and the second insulating layer 5 is formed. I do. Next, at the stage where the mask 11 is removed by performing thermal oxidation, the surface of the substrate 2 has a difference in height between a portion where the silicon is exposed and a portion where the silicon oxide is exposed. 2.) Flatten the surface by the process to form a second insulating layer having a thickness of about 5 to 50 μm. Thereafter, a cathode electrode layer 6 is formed of a conductive material in the electron emission region 9, and then an insulating layer 3, a gate electrode 4, a cavity 7, and an emitter 8 are formed by a process of forming a normal field emission emitter array cathode. I do.

The field emission cold cathode 1 of the second embodiment operates similarly to the field emission cold cathode 1 of the first embodiment. According to this embodiment, a sufficiently thick second insulating layer can be formed without strict process conditions, and the second insulating layer can be formed close to the electron emission region.
Since the insulating layer can be formed, the capacitance between the gate and the substrate can be significantly reduced. In the present embodiment, the thickness of the second insulating layer 5 is set to two levels. However, it is apparent that the same effect can be obtained even when the thickness is set to three or more levels.

Embodiment 3 This embodiment is still another example of the embodiment of the field emission cold cathode according to the present invention. FIG. 5 is a sectional structural view of the field emission cold cathode of Embodiment 3. is there. Of the elements shown in FIG.
All the same components as in FIG. 1 are given the same reference numerals as in FIG. The field emission cold cathode 1 has a cold cathode structure in which a gate electrode is connected to an electrode of an electron gun via a bonding pad as shown in FIG. 5, and the embodiment shown in FIG. The configuration is the same as that of the field emission cold cathodes of Example 1 and Example 2 shown in FIG. As shown in FIG. 5, the gate electrode 4 is connected to a bonding pad 15 via a wiring 14 formed on the insulating layer 3, and is connected to the electrode of the electron gun from the bonding pad 15 by a bonding wire. . The field emission cold cathode 1 of the present embodiment operates in the same manner as the field emission cold cathode of the first embodiment.

Since the area of the peripheral portion of the electron emission region 9, the bonding pad portion and the wiring portion is larger than the area of the electron emission region 9, the capacitance between this portion and the gate-substrate is reduced. Capacitance can be greatly reduced.

Embodiment 4 This embodiment is an example of an embodiment of an electron gun provided with a field emission cold cathode according to the present invention, and FIG. 6 is a principle diagram showing the configuration of an electron gun of this embodiment. FIG. As shown in FIG. 6, the cold cathode 1 is mounted on an insulating substrate 21 made of an insulating material such as ceramics, and is fixed to a focusing electrode 23 by a fixture 22 having spring properties. The focusing electrode 23 forms a vacuum envelope together with the metal component 24 and the insulating component 25, and the anode 30 is connected to the tip of the insulating component 25. The focusing electrode 23 is connected to a signal input terminal 26 and an insulated terminal component 27 which is fixed to the focusing electrode 23 and electrically separated therefrom. The connection terminal 2 is provided on the insulating substrate 21.
8 is mounted, and a signal applied to the terminal 26 is transmitted to the substrate 2 of the cold cathode 1 via the connection line 29, the connection terminal 28, and the thin film wiring formed on the insulating substrate 21. FIG.
Although not shown, the fixing bracket 22 fixes the insulating substrate 21 to the focusing electrode 23 at two places or more.

A signal for modulating an electron beam and a reference potential are applied to the substrate 2, the cathode electrode layer 6, and the emitter 8 of the cold cathode 1 via a terminal 26, a connection line 29, and a connection terminal 28. A gate voltage of about 50 V with respect to the reference potential is applied to the gate electrode 4 of the cold cathode 1 via the focusing electrode 23. A voltage of several kV to several tens of kV with respect to the reference potential is applied to the anode 30. A strong electric field is formed at the tip of the emitter 8, and an electron beam having a current amount modulated by a signal applied to the terminal 26 is formed. The electron beam passes through a hole formed in the anode 30.

The capacitance between the gate and the substrate in the cold cathode 1 is sufficiently small, and the capacitance between the cold cathode and the focusing electrode 23 along the path from the substrate 2 to the terminal 26 is small.
It can operate up to high frequencies. In addition, since the length of the path from the cold cathode substrate 2 to the terminal 26 is sufficiently short, the signal loss in this section can be suppressed to a sufficiently small value, so that the attenuation of the input signal can be kept small.

[0039]

According to the present invention, an electron emission electrode having a sharp portion formed in a plurality of cavities formed in common with the first insulating layer and the conductor layer, and a cavity and an electron emission electrode are formed. And the second insulating layer formed in the substrate so as to surround the electron emission region, the capacitance between the gate and the cathode is small, and thus the ON / OFF of the electron beam is reduced.
A field emission cold cathode that facilitates off-control and density modulation of the electron beam is realized.

[Brief description of the drawings]

FIG. 1A is a plan view of a field emission cold cathode according to an embodiment, and FIG. 1B is a cross-sectional view taken along the line AB in FIG. 1A.

FIGS. 2A to 2E are cross-sectional views of respective steps in manufacturing the field emission cold cathode according to the first embodiment.

FIG. 3 is a sectional structural view of a field emission cold cathode according to a second embodiment.

FIGS. 4A to 4F are cross-sectional views of respective steps when manufacturing the field emission cold cathode of the embodiment.

FIG. 5 is a sectional structural view of a field emission cold cathode according to a third embodiment.

FIG. 6 is a principle sectional view showing the configuration of an electron gun according to a fourth embodiment.

FIG. 7 (a) shows a structure of a conventional field emission cold cathode, and FIG. 7 (b) is a cross-sectional view of one minute cold cathode constituting the conventional field emission cold cathode.

FIG. 8 is a diagram showing a structure disclosed in Japanese Patent Application Laid-Open No. 10-125242.

FIG. 9 is a diagram showing a structure disclosed in Japanese Patent Application Laid-Open No. 7-161286.

FIG. 10 is a diagram showing a structure disclosed in Japanese Patent Application Laid-Open No. 9-82248.

FIG. 11 is a diagram showing a configuration of a field emission cold cathode disclosed in Japanese Patent Application Laid-Open No. 9-204874.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Cold cathode 2 Substrate 3 Insulating layer 4 Gate electrode 5 2nd insulating layer 6 Cathode electrode layer 7 Cavity 8 Emitter 9 Electron emission area 11 Mask 12 Ohmic contact 13 Porous silicon layer 14 Wiring 15 Bonding pad 21 Insulating substrate 22 Fixed metal fittings 23 Focusing electrode 24 Metal part 25 Insulation part 26 Terminal 27 Insulation terminal part 28 Connection terminal 29 Connection line 30 Anode

Claims (7)

[Claims] A first insulating layer laminated on the semiconductor substrate; a conductive layer laminated on the first insulating layer; a common conductive layer formed on the first insulating layer and the conductive layer. A plurality of cavities, an electron emission electrode having a sharpened portion formed in the cavity, and a second insulation formed in the substrate so as to surround the electron emission region in which the cavity and the electron emission electrode are formed. A field emission cold cathode, comprising: 2. The field emission cold cathode according to claim 1, further comprising a conductive thin film in the electron emission region between the substrate, the first insulating layer, and the electron emission electrode. 3. The thickness of the second insulating layer is 5 to 50 μm.
3. The field emission cold cathode according to claim 1, wherein m is m. 4. The method according to claim 1, wherein the thickness of the second insulating layer changes concentrically around the electron emission region in a plurality of steps, and the thickness increases toward the periphery. Or the field emission cold cathode according to 2. 5. The method according to claim 1, wherein the second insulating layer is formed by anodization and thermal oxidation.
The field emission cold cathode according to any one of the above. 6. An electron gun comprising at least one of the field emission cold cathodes according to claim 1. Description: 7. a step of forming a mask on the n-type silicon substrate; a step of making the peripheral portion of the mask of the substrate porous by anodization; and a step of thermally oxidizing the porous part; Removing a mask to planarize the substrate surface; sequentially depositing an insulating layer and a conductor layer on the planarized substrate; and a plurality of layers common to the insulator layer and the conductor layer. A method for producing a field emission cold cathode, comprising: forming a cavity; and forming an electrode having a sharp portion in the cavity.