JP2000152189A - Image decoder, its method and served medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To skip a picture by normally reproducing coded data. SOLUTION: A skip control circuit 22 allows an overwrite address storage section 21A of a write control circuit 21 to store an address of an FIFO 1 in which a B picture, e.g. is written in timing when a picture skip request is made. Then the skip control circuit 22 controls the write control circuit 21 to write data in succession to the B picture from an address stored in the overwrite address storage section 21 in the FIFO 1. Thus, when other picture having been written earlier is reproduced, the B picture not referred to is deleted from the FIFO 1 resulting in skipping the picture.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image decoding apparatus and method, and a providing medium, and more particularly to an image decoding apparatus and method capable of skipping pictures so that normal reproduction can be performed. In addition, it relates to a providing medium.

[0002]

2. Description of the Related Art FIG. 6 shows a configuration example of a conventional image decoding apparatus 10. MPEG1 is stored in the FIFO1 of the image decoding device 10.
Encoded data of an image composed of an I picture, a P picture, or a B picture, which is encoded according to the two standards, is input and stored.

The variable length decoding circuit 2 reads out coded data stored in the FIFO 1 at a constant rate, for example, and decodes it to obtain a decoded signal such as a motion vector or a quantized DCT coefficient. The variable length decoding circuit 2 outputs the obtained quantized DCT coefficient to the inverse quantization circuit 3 and outputs the obtained motion vector to the motion compensation prediction circuit 6.

[0004] The inverse quantization circuit 3 inversely quantizes the quantized DCT coefficient input from the variable length decoding circuit 2 and outputs the result to the inverse DCT transformation circuit 4. The inverse DCT transform circuit 4 performs an inverse DCT process on the data input from the inverse quantization circuit 3 and outputs the data to the addition circuit 5.

[0005] An addition circuit 5 adds the prediction image data supplied from the motion compensation prediction circuit 6 and the data supplied from the inverse DCT conversion circuit 4 to return to the original image data.
It is output to the outside and stored in the frame memory 7.

The motion compensation prediction circuit 6 includes a variable length decoding circuit 2
In accordance with the motion vector from, the image data read from the frame memory 7 is subjected to motion compensation to generate predicted image data and output to the addition circuit 5.

[0007] The read control circuit 8 is controlled by the CPU 9 to read a predetermined picture from the encoded data stored in the FIFO 1 so as not to reproduce it.
Hereinafter, this process is referred to as skipping a picture.

For example, when coded data is decoded at a frame rate lower than the frame rate at which the data is transmitted, the CPU 9 sets a picture start code (described later) at an erroneous position due to some error. When there is an extra picture that does not correspond to the picture start code, or when the picture needs to be skipped, such as when the image is fast-forwarded,
The read control circuit 8 is controlled to skip the picture.

Next, the operation of the FIFO 1 to the frame memory 7 will be described. In the case of this example, it is assumed that image data A as shown in FIG. 7 is encoded and transmitted to the image decoding device 10.

The image data A is sequence data Ai separated by a sequence header and a sequence end.
(I = 1, 2, 3,...) (Hereinafter, sequence data A
When it is not necessary to distinguish −i individually, it is simply described as sequence data A. The same applies to other cases).

The sequence data A-1 starts with a sequence header and is composed of N GOPs (Group of Pictures) A-1 to GOPA-N. The GOPA is composed of a total of six pictures, one I picture I1, two P pictures P1, P2, and three B pictures B1, B2, B3, following the GOP header, and I1, B1, B2, P1, P2 B
3, P2.

In the MPEG2 standard, a GOP starts with a GOP header, and is followed by an I-picture which is coded only with data in a frame (intra coding). Further, when each picture of the image data A is encoded by an encoding device (not shown), the I and P pictures located temporally behind are encoded prior to the corresponding B picture. From this, in the encoded data of the image data A actually transmitted to the image decoding device 10, the picture of GOPA is I1, P
1, B1, B2, P2, and B3 are rearranged in this order.

The coded data of the image data A as described above is supplied to the FIFO 1 and stored. Variable length decoding circuit 2
Reads out and decodes the I picture I1, which is the first picture of the GOPA-1 of the sequence data A-1, among the encoded data stored in the FIFO1, and decodes the Ipicture I1 corresponding to each frame, and Acquire quantized DCT coefficients and the like. The variable length decoding circuit 2 obtains the obtained quantization D
The CT coefficient is output to the inverse quantization circuit 3, and the obtained motion vector is output to the motion compensation prediction circuit 6.

The inverse quantization circuit 3 inversely quantizes the quantized DCT coefficient input from the variable length decoding circuit 2 and outputs the result to the inverse DCT transformation circuit 4. The inverse DCT transform circuit 4 performs an inverse DCT process on the data input from the inverse quantization circuit 3 and outputs the data to the addition circuit 5.

By the way, since the I picture I1 is coded only by the data in the frame, the other picture is reproduced without being referred to. That is, the I picture I1
Is reproduced by the processing in the variable length decoding circuit 2 through the inverse DCT conversion circuit 4 (because the image data is restored to the original image data), and the addition circuit 5 outputs nothing without adding.

The reproduced I output from the adding circuit 5
The picture I1 is supplied to an external device and is also supplied to and stored in the frame memory 7. The I picture I1 stored in the frame memory 7 is referred to when another picture is reproduced.

Next, in the FIFO 1, the P picture P1 stored next to the I picture I1 is stored in the I picture I1.
However, since the P picture P1 is predictively coded in the forward direction, as shown by the arrow A in FIG.
When the P picture P1 (the end point of the arrow A) is reproduced, the temporally past I picture I1 (the start point of the arrow A) is referred to. That is, the P picture P1 is stored in the variable length decoding circuit 2
Through the inverse DCT transformation circuit 4 and the addition circuit 5
Is supplied to the adder 5, the block data supplied from the motion compensation prediction circuit 6 and obtained by the motion compensation from the I picture I1 is added. Thus, the P picture P1 is reproduced.

The reproduced P output from the adding circuit 5
The picture P1 is supplied to an external device and also supplied to the frame memory 7, and is referred to when B pictures B1, B2 and P picture P2 are reproduced.

Next, the B picture B1 stored next to the P picture P1 is reproduced in the FIFO1, but since the B picture is predictively coded in the forward and backward directions, the arrow B and the arrow B in FIG. As shown in C, when a B picture B1 (end point of arrows B and C) is reproduced, a temporally past I picture I1 (start point of arrow B) and a temporally future P picture P1 (arrow C) Are both referred to. That is, the B picture B1 is stored in the variable length decoding circuit 2 through the inverse DCT.
After being processed in the conversion circuit 4 and supplied to the addition circuit 5, the addition circuit 5 supplies the block data obtained by the motion compensation from the I picture I1 and the motion data from the P picture P1 supplied from the motion compensation prediction circuit 6. The block data obtained by the compensation is added. Thus, the B picture B1 is reproduced.

The reproduced B output from the adding circuit 5
The picture B1 is supplied to an external device. Since the B picture B1 is not referred to when another frame is reproduced, there is no need to store the B picture B1.
Is not supplied.

As described above, the pictures stored in the FIFO 1 are reproduced.

Next, a procedure for executing a process of skipping a picture will be described with reference to a flowchart of FIG.

When the read control circuit 8 receives a command to skip a picture from the CPU 9, in step S 1, whether there is still a B picture not read by the variable length decoding circuit 2 in the GOP corresponding to the timing. It is determined whether there is such a B picture, and if there is such a B picture, the process proceeds to step S2, an arbitrary one of the B pictures is selected, and it is skipped immediately before it is read out by the variable length decoding circuit 2. .

For example, when the sequence data A-1 of the coded data of the image data A shown in FIG. 7 is supplied to the FIFO 1 and stored, the I-picture I1 of GOPA-3 is It is assumed that a request to skip a picture is made at the timing read by the. At this time, the read control circuit 8 receives the instruction to that effect from the CPU 9 and sends the instruction to the GOPA-3 to the variable length decoding circuit 2.
It is determined whether there is still a B picture that has not been read (step S1). If such a B picture exists, any one of the B pictures is selected, and it is subjected to variable length decoding. Skip immediately before reading by the circuit 2 (step S2).

In the case of this example, GOPA-3 includes B pictures B1, B2, and B3, and if these have not been read out by the variable length decoding circuit 2, among them, for example, , B picture B3 (shown shaded in the figure) are skipped immediately before being read out by the variable length decoding circuit 2.

As described above, the I picture and the P picture are sometimes referred to when another picture is reproduced. If an I picture or a P picture referred to by another picture is skipped and not reproduced, the reproduction of a picture referring to the I picture or P picture is not performed normally. On the other hand, since the B picture is not referred to when other pictures are reproduced, even if it is skipped, the reproduction of the other pictures is performed normally. Therefore, when a B picture exists as in the image data A, the B picture is skipped.

If it is determined in step S1 that there is no B picture, the process proceeds to step S3, where the read control circuit 8 determines whether a P picture exists in the corresponding GOP, and the P picture exists in the corresponding GOP. If so, the process proceeds to step S4.

In step S4, the read control circuit 8 refers to a GOP that is earlier than the corresponding GOP, and
The number of pictures (GOP cycle) constituting the GOP is estimated, and in step S5, the last picture of the corresponding GOP is skipped based on the estimated number of pictures.

For example, when the coded data of the image data B having no B picture as shown in FIG. 10 is supplied to the FIFO 1 and stored, the I picture I 1 of GOPB-3 is supplied to the variable length decoding circuit 2. It is assumed that a request to skip a picture is made at the timing read by the. At this time, the read control circuit 8 sets the GOPB-3 to B
It is determined that no picture exists (step S1), and it is determined that a P picture exists (step S3).

Next, the read control circuit 8 executes GOPB-3
In the past, for example, two GOs of GOPB-1 and GOPB-2
With reference to the PB, it is estimated that GOPB-3 is composed of five pictures (step S4), and based on that, GOPB-3 is
The P-picture P4 of the fifth picture of -3 is skipped immediately before it is read out by the variable length decoding circuit 2 (step S5).

[0031] The P picture P4 of the fifth picture of GOPB-3 is the last picture of GOPB-3, followed by the first picture of GOPB-4 (not shown). An I picture has been encoded. Thus, I
The P picture P4 coded immediately before the picture is shown in FIG.
As shown in FIG. 1, it is not referred to when another picture is reproduced (in FIG. 11, P4 is not the starting point of the arrow). That is, even if such a P picture P4 is skipped, the reproduction of other pictures is performed normally. Therefore, when the image data whose picture is skipped is composed of an I picture and a P picture like the image data B (when no B picture exists), the last P picture of the corresponding GOP, that is, the next GOP The P picture coded immediately before the I picture is skipped.

If it is determined in step S3 that there is no P picture, the process proceeds to step S6, and the read control circuit 8 skips the corresponding I picture.
For example, if encoded data of image data consisting of only I pictures is supplied to the FIFO 1 and stored, and if a request to skip a picture is made, it is determined that there is no B picture (step S1), and P It is determined that no picture exists (step S3), and the corresponding I picture is skipped (step S3).
6).

As described above, the encoded data of the image data composed of the image data A, the image data B, and the I picture is normally reproduced even if the picture is skipped.

[0034]

Next, for example, FIG.
Is changed, for example, as shown in FIG. 12, GOPB-3 includes seven pictures,
In the state that is supplied to IFO1 and stored, the G
It is assumed that a request to skip a picture is made at the timing when the I picture I1 of OPB-3 is read out by the variable length decoding circuit 2.

In this case, it is determined in step S1 that no B picture exists, and in step S3 it is determined that a P picture exists, and the process proceeds to step S4.

In step S4, GOPB-1, -2
Is referred, and the number of pictures of GOPB-3 is estimated. G
It is estimated from the number of OPB-1 and -2 pictures that GOPB-3 is composed of five pictures, and in step S5, the fifth P picture P4 of GOPB-3 is skipped.

However, the P picture P4 of GOPB-3
Is not the last frame of GOPB-3, that is, the P-picture coded immediately before the I-picture of the next GOPB-4, so that as shown in FIG.
It is referred to when the Pth picture P5 is reproduced. Therefore, when the P picture P4 is skipped and not reproduced, the P picture P5 is not normally reproduced.

For example, as shown in FIG.
C-1 has 4 pictures, GOPC-2 has 7 pictures, and G
In a state where the OPC-3 has five pictures and the coded data of the image data C in which the number of pictures of the GOPC is not constant is supplied to the FIFO 1 and stored, the I picture I1 of the GOPC-3 is variable-length decoded. It is assumed that a request to skip a picture is made at the timing of reading by the circuit 2. In this case, it is determined in step S1 that there is no B picture, in step S3 it is determined that there is a P picture, and the process proceeds to step S4.

In step S4, two times earlier than GOPC-3, for example, GOPC-1 and GOPC-2.
Two GOPCs are referred to, and the number of pictures of GOPC-3 is estimated. In this case, since the numbers of pictures of GOPC-1 and GOPC-2 are different, the number of pictures of GOPC-3 is eventually estimated. No pictures are skipped.

As described above, in the conventional image decoding apparatus 10, when the GOP of the input image data does not include the B picture and the number of pictures constituting the GOP is not constant,
So that the reproduction of the encoded data is performed normally,
There was a problem that a picture cannot be skipped.

The present invention has been made in view of such circumstances, and aims to enable normal reproduction and skip a picture.

[0042]

According to a first aspect of the present invention, there is provided an image decoding apparatus comprising: a coded picture; a storage unit for storing control data; and a coded picture stored in the storage unit. Detecting means for detecting a coded picture in which the reproduction of coded data is normally performed, and storing another coded picture or control data following the coded picture by overwriting the coded picture detected by the detecting means. Control means for controlling the storage means.

According to a second aspect of the present invention, there is provided the image decoding method, wherein the storage step of storing the coded picture and the control data; and the reproduction of the coded data even if the coded picture stored in the storage step is deleted. A detecting step of detecting a coded picture that is normally performed; and a storing step of overwriting the coded picture detected in the detecting step so that another coded picture or control data following the coded picture is stored. And a control step of controlling the storage in step (a).

According to a third aspect of the present invention, there is provided the recording medium, wherein the encoded picture, the storage step for storing the control data, and the encoded picture stored in the storage step are normally reproduced even if the encoded picture is deleted. A detecting step of detecting a coded picture performed in the detecting step, and a storing step of overwriting the coded picture detected in the detecting step to store another coded picture or control data following the coded picture. And a control step of controlling the storage of a computer.

An image decoding apparatus according to claim 1 and claim 2.
In the image decoding method described in the item (1) and the providing medium described in the item (3), the encoded picture and the control data are stored, and the reproduction of the encoded data is normal even if the stored encoded picture is deleted. Coded picture to be performed is detected, and the detected coded picture is overwritten,
The storage is controlled such that another coded picture or control data following the coded picture is stored.

[0046]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below. In order to clarify the correspondence between each means of the invention described in the claims and the following embodiments, each means is described. When the features of the present invention are described by adding the corresponding embodiment (however, an example) in parentheses after the parentheses, the result is as follows. However, of course, this description does not mean that each means is limited to those described.

According to the image decoding apparatus of the present invention, a storage means for storing an encoded picture and control data (for example,
The overwriting address storage unit 21A in FIG. 1 and a detection unit (for example, FIG. 1) for detecting an encoded picture from which the encoded data can be normally reproduced even if deleted from among the encoded pictures stored in the storage unit. 1 skip control circuit 22)
And control means for controlling the storage means so as to overwrite the coded picture detected by the detection means and store another coded picture or control data following the coded picture (for example, the writing means shown in FIG. 1). And a control circuit 21).

FIG. 1 shows an image decoding apparatus 1 to which the present invention is applied.
00 represents a configuration example. In the figure, portions corresponding to those in FIG. 6 are denoted by the same reference numerals, and description thereof will be omitted below as appropriate. That is,
In this example, the read control circuit 8 is deleted, and a write control circuit 21 and a skip control circuit 22 are newly provided.

The write control circuit 21 is controlled by the skip control circuit 22, has a built-in overwrite address storage section 21A, and writes supplied encoded data to the FIFO 1 from the address stored therein. ing.

The skip control circuit 22 executes a process of skipping a picture according to a command from the CPU 9.

Next, the procedure for skipping a picture will be described with reference to the flowchart of FIG.

When a request to skip a picture is made, the CPU
9 notifies the skip control circuit 22 of the fact, in step S1, the skip control circuit 22 detects an address (for example, a head address) on the FIFO 1 to which the data supplied at this time is written, and The data is stored in the overwriting address storage unit 21A incorporated in the write control circuit 21.

In step S2, the skip control circuit 22 refers to the start code of the data written to the address stored in the overwrite address storage section 21A, and the data having the start code is used to control the sequence header and the GOP header. It is determined whether it is data or a picture.

At the head of each of the sequence header, the GOP header, and the picture, there is provided a 32-bit start code arranged in byte units (byte-aligned). Note that a picture also has a picture header, and the start code of the picture is
It is set in the picture header.

If it is determined in step S2 that the picture is not control data, that is, if it is determined that the picture is a picture, the process proceeds to step S3, and the skip control circuit 22 determines whether the picture type of the picture is a B picture. Is determined. Since information indicating the picture type is stored in an area called a picture coding type in the picture header, the skip control circuit 22 refers to the picture coding type and determines whether the picture type is a B picture. Determine whether or not.

If it is determined in step S3 that the picture is a B picture, the flow advances to step S4, and the skip control circuit 22 waits until the start code of the next data supplied to the FIFO 1 is detected. That is, during this time,
The B picture recognized in step S3 is written to FIFO1.

In step S4, when the skip control circuit 22 detects the start code of the next data supplied to the FIFO 1, the process proceeds to step S5, where the skip control circuit 22 controls the write control circuit 21 to store the data having the detected start code. The data is written to the FIFO 1 from the address stored in the overwriting address storage unit 21A. That is, the B picture written in the FIFO 1 is overwritten during the processing in step S4. As a result, the B picture is deleted from the FIFO 1 and skipped.

Next, the processing in steps S1 to S4 described above will be specifically described with reference to FIG. If it is determined in step S2 that the data is control data, or if it is determined in step S3 that the data is not a B picture, the process proceeds to step S6, but the subsequent processes will be described later.

In FIG. 3A, P pictures PA and PB of GOP-i of the supplied predetermined encoded data are written to FIFO1, and then a B picture BC is about to be written to FIFO1. It shows the situation. When the skip control circuit 22 receives a command to skip a picture from the CPU 9 when the FIFO 1 is in such a state, the B picture BC
Is detected, and is stored in the overwriting address storage unit 21A of the write control circuit 21 (step S1).

Next, the skip control circuit 22 determines that the next data to be written into the FIFO 1 is not control data (step S2), and determines that it is a B picture BC (step S3). (Step S4) until the start code of the B picture BD written to the FIFO is supplied to the FIFO1. During this time, FIG.
As shown in the figure, the B picture BC is
Written to 1.

The skip control circuit 22 outputs a B picture BD
Is detected, the write control circuit 21
To control the B picture BD as shown in FIG.
From the address C stored in the overwriting address storage unit 21A into the FIFO 1 (step S5).
As a result, the B picture BC
Is overwritten by the B picture BD and deleted from the FIFO1. Data subsequent to the B picture BD (for example, the B picture BE) is written from the FIFO 1 at the address D following the B picture BD.

As described above, since the B picture which is not referred to when another picture is reproduced is deleted from the FIFO 1, the B picture is skipped.

Returning to FIG. 2, in step S2, the FIFO
If it is determined that the next data to be written to No. 1 is not control data, or if it is determined in step S3 that the next picture to be written to FIFO1 is not a B picture, the process proceeds to step S6, and the skip control circuit 22
Waits until the start code of the next data supplied to the FIFO 1 is detected. That is, during this time, the next data supplied to FIFO1 is written to FIFO1.

In step S6, when the skip control circuit 22 detects the start code of the next data supplied to the FIFO 1, the process proceeds to step S7, and refers to the detected start code, and determines whether the data is control data or It is determined whether the picture is a picture.

If it is determined in step S7 that the data is not control data, that is, if it is determined that the data is a picture, the process proceeds to step S8, where the skip control circuit 22 refers to the picture coding type of the picture, Is an I-picture.

If it is determined in step S7 that the data is control data, or if it is determined in step S8 that the data is an I-picture, the process proceeds to step S5, where the skip control circuit 22 determines the start code detected in step S6. The stored control data or I picture is written to the FIFO 1 from the address stored in the overwrite address storage unit 21A. That is, during the process in step S6, the data written to FIFO1 is overwritten and deleted from FIFO1.

Next, the processing in steps S6 to S8 will be specifically described with reference to FIG. In addition,
If it is determined in step S8 that the next picture to be written to the FIFO 1 is not an I picture, the process proceeds to step S9, but the subsequent processes will be described later.

FIG. 4A shows P pictures PA, PB, B picture BC of GOP-i of the supplied predetermined encoded data.
Is written to the FIFO1, and then the P picture D is about to be written. If the process of skipping a picture is started while the FIFO 1 is in such a state, in this case, the address K is stored in the overwrite address storage unit 21A (step S).
1). The skip control circuit 22 determines that the next data to be written to the FIFO 1 is not control data (step S2) because it is a P picture PD (step S2), and determines that it is not a B picture (step S3). The process waits until the start code of the I picture IE as the next data is detected (step S6). Meanwhile, FIG. 4 (B)
As shown in FIG.
Written to 1.

The skip control circuit 22 outputs the I picture IE
Is detected, the data supplied next to the P picture PD is determined not to be control data (step S7), and is determined to be an I picture (step S7).
8). Therefore, the skip control circuit 22 controls the write control circuit 21 to write the I picture IE into the FIFO 1 from the address K stored in the overwrite address storage unit 21A, as shown in FIG. 4C. Step S
5). As a result, the P picture PD previously written in the FIFO 1 is overwritten by the I picture IE,
Removed from. It should be noted that data subsequent to the I picture IE (for example, a P picture PF) is written from an address L of the FIFO 1 following the I picture IE.

In this example, the I picture IE is supplied to the FIFO 1 following the P picture PD, but the sequence header or the GOP
When the header control data is supplied, the P picture PD is similarly overwritten by the control data. For example, in the case of a GOP header, an I picture is always supplied, and in the case of a sequence header,
Following the GOP header, the I picture is supplied to FIFO1. That is, in any case, the P picture PD, which is coded immediately before the I picture and is not referred to when another picture is reproduced, is skipped from the FIFO1.

Returning to FIG. 2, when it is determined in step S8 that the next picture to be written to the FIFO 1 is not an I picture, the process proceeds to step S9.

In step S9, the skip control circuit 22 detects the address of the FIFO 1 where the picture having the start code detected in step S6 is written, and replaces it with the overwritten address in place of the previously stored address. It is stored in the storage unit 21A. Thereafter, the process returns to step S3.

Next, the processing in step S9 described above will be specifically described with reference to FIG.

FIG. 5A shows a state in which P pictures PA and PB of GOP-i of the supplied predetermined coded data are written, and then P picture PC is about to be written to FIFO1. Represents. If the process of skipping a picture is started while the FIFO1 is in such a state, the address R is stored in the overwrite address storage unit 21A (step S1). The skip control circuit 22
Since the next data to be written to the FIFO 1 is the P picture PC, it is determined that it is not control data (step S2), and it is also determined that it is not a B picture (step S3), and the start code of the P picture PC Is detected (step S6). In the meantime, as shown in FIG. 5B, the P picture PC has the address R
Is written to FIFO1.

The skip control circuit 22 calculates the P picture PC
When the start code of the P picture PD supplied next to is detected, it is determined that the start code is not control data (step S7), and that it is not an I picture (step S8). Therefore, the skip control circuit 22 detects the address S of the FIFO 1 where the P picture PD is written, and stores it in the overwriting address storage unit 21A instead of the previously stored address R (step S9). It returns to step S3.

Since the data stored in the overwriting address storage unit 21A is a P picture PD, the skip control circuit 22 determines that it is not a B picture (step S3), and the GOP written to the FIFO1 next. Wait until the start code of the header is detected (step S
6). During this time, the P picture PD is written from the address S to the FIFO 1 as shown in FIG.

Next, since the next data of the P picture PD written in the FIFO 1 is the GOP header, the skip control circuit 22 determines that it is the control data (step S7), and As shown in FIG. 5D, the address S stored in the overwriting address storage unit 21A is written into the FIFO 1 (step S5).
As a result, the P picture PD is overwritten by the GOF header and deleted from the FIFO1. P picture PD is I
This is a P picture immediately before the picture IE, and is not referred to when another picture is reproduced.

As described above, a picture which is not referred to when another picture is reproduced in GOP-i is skipped. For example, as shown in FIG.
Even when the number of pictures constituting P changes, the picture can be skipped so that the reproduction is performed normally. For example, even when a request to skip a picture is made at the timing when the I picture I1 of GOPB-3 is read out to the variable length decoding circuit 2, the P picture P6 is skipped.

Further, since the number of pictures of the GOP is not estimated, the picture is skipped even when the number of pictures constituting the GOP is not constant as in the example of FIG. Also in this case, since the last P picture of the GOPC is skipped, the reproduction is normally performed.

[0103] The providing medium for providing the user with the computer program for performing the above-described processing includes:
In addition to recording media such as magnetic disks, CD-ROMs, and solid-state memories, communication media such as networks and satellites can be used.

[0081]

According to the image decoding apparatus according to the first aspect, the image decoding method according to the second aspect, and the providing medium according to the third aspect, even if deleted, the encoded data can be normally reproduced. Since the coded picture to be performed is detected, and another picture is stored by overwriting the coded picture, the coded picture can be deleted so that the coded data is normally reproduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of an image decoding device 100 according to the present invention.

FIG. 2 is a flowchart illustrating a processing procedure when a picture is skipped.

FIG. 3 is a diagram illustrating how a picture is skipped.

FIG. 4 is another diagram showing how a picture is skipped.

FIG. 5 is another diagram showing how a picture is skipped.

FIG. 6 is a block diagram illustrating a configuration example of a conventional image decoding device 10.

FIG. 7 is a diagram illustrating a configuration of image data A.

FIG. 8 is a diagram illustrating an encoding process of image data A.

FIG. 9 is a flowchart illustrating a processing procedure when a picture is skipped.

FIG. 10 is a diagram illustrating a configuration of image data B.

FIG. 11 is a diagram illustrating an encoding process of image data B.

FIG. 12 is a diagram illustrating a configuration of image data B in which the number of pictures has changed.

FIG. 13 is a diagram illustrating an encoding process of image data B in FIG. 13;

FIG. 14 is a diagram illustrating a configuration of image data C.

[Explanation of symbols]

1 FIFO, 2 variable length decoding circuit, 3 inverse quantization circuit, 4 inverse DCT conversion circuit, 5 addition circuit, 6
Motion compensation prediction circuit, 7 frame memory, 8 read control circuit, 9 CPU, 10 image decoding device, 2
REFERENCE SIGNS LIST 1 write control circuit, 21A overwrite address storage unit, 22 skip control circuit, 100 image decoding device

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5C053 FA21 FA23 GB04 GB05 GB06 GB08 GB38 KA01 KA03 KA22 KA24 LA06 5C059 KK15 MA00 MA04 MA05 MA14 MC11 ME01 PP04 SS20 TA07 TB04 TC41 TC42 TC43 TD11 UA05 UA31 UA31 UA32

Claims (3)

[Claims] 1. An image decoding apparatus for decoding an encoded picture in which a plurality of pictures constituting an image are encoded with reference to each other, and an encoded data including predetermined control data, wherein: A storage unit that stores the control data, and a detection unit that detects an encoded picture in which the reproduction of the encoded data is normally performed even if deleted, among the encoded pictures stored in the storage unit. Control means for controlling the storage means so as to overwrite the coded picture detected by the detection means and store another coded picture or control data following the coded picture. An image decoding device characterized by the following. 2. An image decoding method for decoding an encoded picture in which a plurality of pictures constituting an image are encoded with reference to each other, and an encoded data including predetermined control data, wherein: A storage step of storing the control data; a detection step of detecting an encoded picture from which the encoded data stored in the storage step is normally reproduced even if deleted, Overwriting the coded picture detected in the detection step, and controlling the storage in the storage step such that another coded picture or control data following the coded picture is stored. An image decoding method, characterized in that: 3. An image decoding apparatus for decoding an encoded picture in which a plurality of pictures constituting an image are encoded with reference to each other, and an encoded data including predetermined control data, wherein: A storage step of storing the control data; and a detection step of detecting, from among the coded pictures stored in the storage step, a coded picture in which reproduction of the coded data is normally performed even if deleted. Overwriting the coded picture detected in the detection step, and controlling the storage in the storage step so that another coded picture or control data following the coded picture is stored. A providing medium for providing a computer-readable program for executing a process.