JP2000151297A - Abnormality detecting circuit of power amplifying circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a speaker from breaking or burning owing to an input short, circuit of a power amplifying circuit. SOLUTION: Two BTL amplifiers 101 and 108 are provided with detection transistors which detect currents flowing to their output-stage transistors and an output current from one of detecting transistors 115 to 118 is compared with reference voltages Vr1 and Vr2 of a wind comparator 122 to detect an output offset.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormality detection circuit for detecting an abnormality in a connection state to a load when an input terminal of a power amplification circuit is grounded.

[0002]

2. Description of the Related Art Particularly in the field of car audio equipment, during the operation of connecting the output terminal of a power amplifying circuit to a speaker, the output terminal of the power amplifying circuit may erroneously come into contact with a power supply line or a ground line (hereinafter, referred to as a power line or a ground line). Short-to-power and ground-to-ground). In such a case, an excessive current may flow to the output stage transistor of the power amplifier circuit, and the output stage transistor may be destroyed. Therefore, the car power amplifier circuit has a built-in protection circuit that protects the output-stage transistor from short-to-power and ground-fault. FIG. 2 shows a protection circuit for protecting the output transistor from such a power supply fault or a ground fault.

In FIG. 2, an output amplifier circuit includes output transistors 1 to 4 which are BTL-connected. Here, when the output terminal 5 is short-to-power, the voltage of the output terminal 5 becomes the power supply voltage Vc.
c, and an excessive current flows through the output transistor 2. When the base-emitter voltage of the output transistor 2 increases due to the excessive current, the midpoint of the connection between the resistors 6 and 7 increases, and the transistor 8 turns on. Since the output terminal 5 is at the power supply voltage Vcc, the potential difference between the cathode of the Zener diode 9 and the cathode of the diode 10a becomes substantially equal to the power supply voltage Vcc, and the diodes 9, 10a and 10b are turned on. Therefore, the voltage between the base and the emitter of the transistor 11 is equal to two ON voltages of the diode, and the detection transistor 11 is turned on. Then, a collector current is generated from the detection transistor 11, and the detection circuit 12 detects a short-to-power by the collector current, and generates a stop signal SS. By the stop signal SS, the bias current from the bias circuit 13 is stopped,
As a result, the output stage transistor 2 becomes inactive and is protected from destruction.

In addition, even when the output terminal 5 is grounded, the same operation is performed in principle as at the time of ground fault. That is, when an excessive current flows through the output stage transistor 1, the base-emitter voltage of the output stage transistor 1 increases, and as a result, the detection transistor 18 is turned on. Then, a stop signal SS is generated, the supply of bias is stopped, and the output stage transistor 1 is protected.

[0005]

By the way, in the power amplifier circuit as shown in FIG. 3, when a current leaks from the input capacitor Cin, the input level of the power amplifier circuit when there is no input signal becomes substantially zero, and A DC offset signal is generated. When a DC offset is supplied to the speaker, the speaker may be destroyed or, in the worst case, fire. In addition, when mounted on an automobile, the above problem occurs even if water droplets generated from the air conditioner are short-circuited to the input terminal of the power amplifier circuit.

When the input terminal of the power amplifier circuit is short-circuited, the current flowing through the output transistor increases,
This current could not be detected by the circuit of FIG.
In other words, even if the input terminal is short-circuited, only a maximum current during normal operation is generated from the power amplifier circuit.
Is considered normal operation. Also, if the detection level of the protection circuit in FIG. 2 is lowered, it is possible to detect a short circuit at the input end of the power amplification circuit. However, only the output current of the power amplification circuit increases during normal operation.
The protection operation of FIG. 2 was erroneously activated. Therefore, it was not possible to detect a short circuit at the input terminal by changing the detection level carelessly.

Therefore, it is necessary to take some measures to detect that the input terminal of the power amplifier circuit is short-circuited.

[0008]

SUMMARY OF THE INVENTION The present invention relates to an abnormality detection circuit for a power amplifier circuit having at least two BTL amplifiers having the same input signal, wherein an output of an output stage transistor constituting one of the BTL amplifiers is provided. Current and the other BT
A combining circuit for combining the output current of the output stage transistor constituting the L amplifier and outputting the current difference, and comparing the current difference with a first value and a second value larger than the first value. Is smaller than the first value or larger than the second value.

In particular, the combining circuit includes an output current flowing through the first and second output stage transistors of the output stage transistors of one BTL amplifier, and a third and fourth output stage among the output stage transistors of the other BTL amplifier. It is characterized by combining output currents flowing through the stage transistors.

Further, the synthesizing circuit includes a first inverting circuit for inverting a current flowing through the first output stage transistor;
A second inverting circuit for inverting the current flowing in the third output stage transistor, and an adding means for adding the currents flowing in the second and fourth output stage transistors and the output currents of the first and second inverting circuits. It is characterized by comprising.

The combining circuit includes a first comparing means for comparing output currents of a positive output stage transistor of one BTL output amplifier and a positive output stage transistor of the other BTL output amplifier; Second comparing means for comparing the output currents of the negative output stage transistor of the BTL output amplifier with the negative output stage transistor of the other BTL output amplifier; and synthesizing the output signals of the first and second comparing means. And synthesizing means.

Further, each of the first and second comparing means has an inverting means for inverting one of the two input currents.

Still further, the first to fourth output stage transistors are all output stage transistors on the power supply voltage side, or are all output stage transistors on the ground side.

Further, a transistor having a size smaller than that of the first to fourth output stage transistors is provided, and a current flowing through the first to fourth transistors is detected by the transistor.

According to the present invention, when a DC offset occurs in the output of the BTL amplifier, a difference occurs in the combined current of the currents flowing through the output transistors of the BTL amplifier, and the DC offset is detected by detecting the difference.

[0016]

FIG. 1 is a diagram showing an embodiment of the present invention. Reference numeral 101 denotes output stage transistors 102 to 105 connected to a load Rf by BTL, and drive of output stage transistors 102 to 105. Drive circuits 106 and 1
07, the output stage transistors 109-1 connected to the load Rr by BTL.
12 and drive circuits 113 and 114 for driving the output stage transistors 109 to 112, and 115 to 118 are output stage transistors 101 and
3, 109 and 110 are detection transistors for detecting the current flowing through them, and 119 and 120 are detection transistors 115.
And 117, a current mirror circuit as an inverting means for inverting the collector current, a first reference voltage generation circuit 121 comprising current mirror circuits 121a and 121b, and generating a reference voltage Vref superimposed on a composite signal of the detection transistor; Reference numeral 122 denotes a second reference voltage generation circuit that generates first and second reference voltages Vr1 and Vr2 by dividing the resistances of the three resistors r1 to r3, and the combined signal and the reference voltage Vr.
The window comparator 125 includes a differential pair 123 having an input of 1 and a differential pair 124 having an input of the composite signal and the reference voltage Vr2.
Is an output circuit that generates a detection signal in accordance with the output of
At the connection point A in FIG.
Since the output currents of 118 are combined, the connection point A has a function of a combining circuit. Further, the resistor R is a resistor for converting the combined signal of the detection transistors 115 to 118 into a resistor.

In FIG. 1, two BTL output amplifiers 10
Numerals 1 and 108 amplify the same input audio signal, and the speakers Rf and Rr in FIG. 1 are the front and rear speakers in the left or right speaker of the four-speaker stereo for vehicle use as shown in FIG. It shows a speaker.

First, in a power amplifier circuit as shown in FIG.
The operation when the input terminal of the BTL amplifier circuit 101 is short-circuited will be described. When a short circuit occurs, an offset always occurs in the output of the power amplifier circuit. As a result of the short circuit, it becomes as if a negative excessive input signal is applied to the BTL amplifier circuit 101, and the output current of the BTL amplifier 101 flows from the (-) output terminal to the (+) output terminal via the load. Therefore, in the BTL amplifier 101, the output current flows in the order of the output stage transistor 102, the load Rf, and the output stage transistor 105.

The detection transistors 115 and 116 include:
The drive signal applied to the output stage transistors 102 and 104 is branched and applied, so that a current corresponding to the current flowing through the output stage transistor is generated from the detection transistor. The transistor size of the detection transistor is smaller than the transistor size of the output transistor.
It is smaller at a predetermined rate. Therefore, a current that is smaller than the current flowing through the output stage transistor by a predetermined ratio is generated from each detection transistor.

In this state, the output stage transistor 102
Since the output current flows only through the detection transistor 1
15 generates a detection current. Detection transistor 115
Is supplied to a resistor R and converted into a voltage at a connection point A.

A first reference voltage generating circuit 1 is connected to one end of the resistor R.
Reference voltage Vref from 21 is applied. Reference voltage V
ref is a current mirror circuit 1 that generates the same output current
The reference voltage Vref (= Vcc / 2) is generated at the connection point B by cascade-connecting 21a and 121b. In the resistor R, the current-voltage conversion is performed using the reference voltage V
This is performed based on ref. Detection transistor 115
Is supplied to the resistor R, a voltage is generated due to the voltage drop. Assuming that the value of the output current is Ia, the converted voltage Va is Va = Vref + Ia × R.

The converted voltage Va is applied to one of the transistors of the differential pair 123 and the differential pair 124, and the reference voltage Vr
1 and Vr2, respectively. The reference voltages Vr1 and Vr2 are obtained by dividing the power supply voltage Vcc by the resistances r1 to r3, and have a relationship of Vr1> Vr2. When the converted voltage Va becomes higher than the reference voltage Vr1, the differential pair 123
The transistor to which the conversion voltage Va is applied turns on, and the output current of the differential pair 123 is supplied to the output circuit 125. In the output circuit 125, an H level (= Vb) detection signal is generated from the output circuit 125 when the transistors 125a and 125b are sequentially turned on. The level of at least Vr1 is set so that an output signal is accurately generated from the output circuit 125 when an excessive input signal is applied to the BTL amplifier circuit.

The operation when the input terminal of the BTL amplifier circuit 108 is short-circuited will be described. The basic operation at this time is the same operation as when the input terminal of the BTL amplifier circuit 101 is short-circuited. As a result, a negative excessive input signal is applied to the power amplifier circuit due to the short circuit, and the BTL
The output current of the amplifier 108 is
11, the load Rr, and the output stage transistor 110 flow in this order.

The detection transistors 117 and 118 include:
The drive signal applied to the output stage transistors 109 and 111 is branched and applied, so that a current corresponding to the current flowing through the output stage transistor is generated from the detection transistor. In the BTL amplifier circuit 108, similarly to the BTL amplifier circuit 101, the transistor size of the detection transistor is smaller by a predetermined ratio than the transistor size of the output stage transistor. Therefore, each detection transistor generates a current in which the current flowing through the output stage transistor is reduced by a predetermined ratio.

In this state, the output stage transistor 111
Output current flows through the detection transistor 118
Generates a detection current. The output current of the detection transistor 118 is converted to a voltage by the resistor R. Specifically, when the output current Ia of the detection transistor 118 is supplied to the resistor R, a voltage is generated due to the voltage drop, and the voltage Va (= V
ref + Ia × R).

The converted voltage Va is applied to one of the transistors of the differential pair 123 and the differential pair 124, and the reference voltage Vr
1 and Vr2, respectively. Since the converted voltage Va becomes higher than the reference voltage Vr1, the transistor to which the converted voltage Va is applied turns on, and the output current of the differential pair 123 is supplied to the output circuit 125. In the output circuit 125, an H level (= Vb) detection signal is generated from the output circuit 125 when the transistors 125a and 125b are sequentially turned on.

When the detection signal is generated, the driving circuits 106, 107, and 11 are driven so as not to damage or burn out the speaker.
3 and 114 need to be stopped. As a circuit configuration for this, when a detection signal is generated, the protection circuit configured inside the power amplifier circuit is operated, the supply of bias applied to each drive circuit is stopped, and as a result, the operation of the output transistor is stopped. To apply the detection signal to the external microcomputer once, and to stop the bias supply to the drive circuit by the instruction of the microcomputer, or to display it on the voice or car stereo display screen by the instruction of the microcomputer. A configuration that informs the user of the request is possible.

Next, the detection operation during normal operation will be described. Since the same input signal is applied to the BTL amplifiers 101 and 108, the output stage transistors 102 and 111
Output current flows through the output stage transistor 104
And 109 also have the same amount of output current. Therefore, at the time of normal operation, the output current of the detection transistor is canceled at the connection point A, and the addition current is not supplied to the resistor R. Therefore, the reference voltage Vref is directly applied to the differential pairs 123 and 1
24. The reference voltage Vref is Vr1> Vr
Since ef> Vr2, the differential pairs 123 and 12
No output current is supplied from 4 to the output circuit 125. Therefore, the transistors 125a and 125b do not turn on, and the detection signal is not output from the output circuit 125.

By the way, generally in a car stereo,
A fader volume is provided to balance the volume of the front and rear speakers. During normal operation, if the volume of the front and rear speakers is unbalanced by turning the fader volume, the magnitudes of the outputs of the BTL amplifiers 101 and 108 will be different. Therefore, a difference current is generated at the connection point A, and the differential pair 123 and 124
Is applied with a voltage of Vref ± α. Here, since the reference voltage is set as Vr1> (Vref ± α)> Vr2, no output signal is generated from the differential pairs 123 and 124, and no detection signal is generated. That is, by providing the window comparator 112, the detection signal is not generated even if a difference current occurs due to the adjustment of the fader volume, and the abnormality detection circuit of FIG. 1 reliably detects the DC offset to the load. be able to. still,
The reference voltages Vr1 and Vr2 make it possible to both reliably detect the application of an excessive input due to a short circuit to the BTL amplifier circuit and prevent malfunctions when the volume is unbalanced by the fader as described above. It is set as follows.

[0030]

According to the present invention, it is possible to reliably detect only when a DC offset has occurred in the output of the BTL amplifier circuit, so that the speaker may be damaged due to a current leak in the input capacitor or a short circuit caused by water droplets. Burnout can be prevented.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a short-to-power and ground-fault protection circuit of a conventional amplifier.

FIG. 3 is a block diagram showing an overall configuration of an audio power amplifier circuit.

FIG. 4 is a block diagram showing an overall configuration of an audio power amplifier circuit corresponding to FIG. 1;

FIG. 5 is an arrangement diagram showing an arrangement of speakers in an automobile.

[Explanation of symbols]

 101, 108 BTL amplifying circuit 121 first reference voltage generating circuit 122 window comparator 123, 124 differential pair 125 output circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takayuki Taira 2-5-5-2 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. F-term (reference) 5J069 AA01 AA23 AA41 CA55 FA18 HA08 HA19 HA20 HA25 HA29 KA00 KA02 KA04 KA09 KA11 KA12 KA17 KA18 KA26 KA28 KA62 MA21 QA04 SA05 SA07 TA01 5J091 AA01 AA23 AA41 CA55 FA18 FP02 FP05 HA08 HA19 HA20 HA25 HA29 KA00 KA02 KA04 KA09 KA11 KA12 KA12 KA17 KA12 KA17

Claims (7)

[Claims] An abnormality detection circuit for a power amplifier circuit including at least two BTL amplifiers having at least the same input signal, wherein an output current of an output stage transistor constituting one BTL amplifier and another BTL amplifier are connected to each other. A combining circuit that combines the output current of the output stage transistor to be configured and outputs the current difference; and compares the current difference with a first value and a second value that is larger than the first value. And a comparison circuit for generating an abnormality detection signal when the value is smaller than the second value or larger than the second value. 2. The output circuit according to claim 1, wherein the combining circuit includes an output current flowing through the first and second output stage transistors among the output stage transistors of the one BTL amplifier, and a third and fourth output stage among the output stage transistors of the other BTL amplifier. 2. An output current flowing through a stage transistor is synthesized.
An abnormality detection circuit of the power amplifier circuit described in the above. 3. The combining circuit includes: a first inverting circuit for inverting a current flowing in the first output stage transistor; a second inverting circuit for inverting a current flowing in the third output stage transistor; A current flowing through the fourth output stage transistor;
3. An abnormality detection circuit for a power amplification circuit according to claim 2, further comprising an adding means for adding the output currents of said first and second inversion circuits. 4. A first comparing means for comparing output currents of a positive output stage transistor of one BTL output amplifier and a positive output stage transistor of the other BTL output amplifier, Second comparing means for comparing the output currents of the negative output stage transistor of the BTL output amplifier with the negative output stage transistor of the other BTL output amplifier; and synthesizing the output signals of the first and second comparing means. 2. The abnormality detection circuit for a power amplification circuit according to claim 1, further comprising a combining unit. 5. Each of said first and second comparing means includes:
5. The abnormality detecting circuit for a power amplifier circuit according to claim 4, further comprising an inverting means for inverting one of the two input currents. 6. The first to fourth output stage transistors are all output stage transistors on the power supply voltage side,
3. The abnormality detection circuit for a power amplification circuit according to claim 2, wherein all the output stage transistors are on the ground side. 7. A transistor having a size smaller than that of the first to fourth output stage transistors is provided.
5. The transistor according to claim 2, wherein a current flowing through the first to fourth transistors is detected by the transistor.
An abnormality detection circuit of the power amplifier circuit described in the above.