JP2000151153A - Electronic circuit device having bus line structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce decline in characteristic impedance of a bus line due to the increase in loads by branching the bus line into a plurality of lines along branch lines, arranging in parallel, providing respective drivers to the bus lines, and distributing a plurality of loads on each bus line. SOLUTION: A bus line is branched into a plurality of, for example, two parallel lines. Half of a plurality of loads 3 are connected to the first bus line 11a and are driven by a first driver 12a, and another half of loads are connected to the second bus line 11b and are driven by a second driver 11b. Due to this structure, the number of loads connected to each bus line is reduced to half and the distance between each two loads is extended twice. As a result, a quantity of distributed loads per unit length of each bus line is reduced to half and the impedance is increased by the square root of 2. Accordingly, smaller drive current is required for each bus line and, for the drivers 12a, 12b, ones having small drive force can be used.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit device for connecting each signal on a plurality of printed circuit boards by a bus line, and in particular, to minimize the characteristic impedance of the bus line when a load is mounted. By doing
The present invention relates to an electronic circuit device having a bus line configuration in which a bus line can be easily driven.

[0002]

2. Description of the Related Art In recent years, in an electronic circuit device, such as a communication device, which stores thousands of subscriber information and performs connection switching or line consolidation, as shown in FIG. By mounting dozens of printed circuit boards 3 in a so-called bookshelf-type rack 1, thousands of the subscriber information are accommodated. FIG. 3 shows a connection model in the unit 1 shown in FIG.
The bus buffers 7 of the boards 3 are connected to the bus lines 5 arranged on the backplane 9 by inserting the plurality of printed boards 3 into the board-shaped backplane 9 provided therein. It has become. That is,
In the unit 1 described above, dozens of printed circuit boards 3 are mounted, and the bus buffers 7 on the plurality of printed circuit boards 3 are connected to the bus lines 5 to collect information on all the printed circuit boards 3. I have. The backplane 9 is a substrate on which the bus lines 5 and the like are provided, and is shown in FIG.
In FIG. 1, only one is shown, but usually, a large number of bus lines are provided. In addition, similarly, the unit 1
By mounting dozens of printed circuit boards 3 on the board and connecting information on the plurality of printed circuit boards 3 to the bus line 5,
Information on one printed circuit board 3 can be transmitted to all other printed circuit boards 3 (see FIG. 4).
In FIGS. 3 and 4, the bus buffer 7 of each printed circuit board 3 functions as an input / output unit.

[0003] In addition, the bus line 5 for high-speed signals.
Operates the transmission line such that the characteristic impedance Z ₀ when no load is mounted (when no load is applied) is obtained by the following equation (1). Where L ₀ is the distributed inductance per unit length,
C ₀ is the distribution capacity per unit length. This value is for the bus line 5 when there is no load. When a uniform load is applied to the bus line 5 due to the capacity of a connector for connecting the printed circuit board 3 to the bus line 5 on the back plane 9 or the input / output capacity of the bus buffer 7, etc. , Load impedance Z
_L is obtained by the following equation (2). Here, C _L is the distribution load capacitance per unit length of time that affects uniform loading to the bus line 5, the plurality being connected to one bus line 5 on the backplane 9 The shorter the distance between the printed circuit boards 3 is, the larger the load capacity C _L per unit length becomes, and
Impedance Z _L decreases. FIG. 5 is an equivalent model diagram of the conventional bus line 5, showing the input / output capacity of the bus buffer 7 on each printed circuit board 3 shown in FIG. Then, in FIG.
Driver 1 for driving the bus line 5
0 is connected. The distributed load capacitance C _L per unit length in FIG. 5 is the input capacitance C _P , and when substituted into the above equation (2), the impedance value Z _L at the time of load can be expressed by the following equation (3). Where X = C _P / C ₀

[0004]

However, due to the recent trend toward smaller and thinner electronic devices, units for accommodating a plurality of printed circuit boards have also been required to be smaller. In order to accommodate a large number of printed boards in a small unit, the distance between the plurality of printed boards 3 connected to one bus line 5 on the back plane 9 is reduced, and , The load capacity C _L becomes larger. According to the equation (2), when C _L increases, the impedance Z _L of the bus line 5 decreases. That is, in the configuration of the conventional bus line 5 described above, the impedance Z _L of the bus line 5 decreases as the number of loads per unit length (the number of printed circuit boards) increases, so that the bus line 5 is appropriately driven. The current required for the bus buffer 7 increases, and the bus line 5
However, there is a drawback that it is difficult to drive the motor. Here, in order to satisfy the required increase in driving force with the increase in the number of loads per unit length (the number of printed circuit boards), the driver 10 may have a high driving force and a large driving force. Since all the loads (printed circuit boards 3) are connected to one bus buffer 7 as shown in FIG. 5, the influence of the reflected waves increases as the number increases, and the waveform is significantly disturbed. There were also disadvantages. That is, since the change in the waveform due to the reflection occurs at the connection point 5a (see FIG. 5) between the load 3 and the bus line 5, which is the change point of the impedance, as shown in FIG.
Is connected to the bus line 5, the connection point 5a
The number of (points where reflected waves occur) was increased and the waveform was significantly disturbed. SUMMARY OF THE INVENTION The present invention has been made to solve the above two problems, and makes it easy to drive a bus line by reducing a decrease in bus line characteristic impedance due to an increase in the number of loads, and to reduce the influence of a reflected wave. It is an object of the present invention to provide an electronic circuit device having a bus line configuration that can be used.

[0005]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention relates to an electronic circuit device having a bus line configuration for connecting a plurality of loads to a bus line. And a driver disposed on each of the plurality of bus lines to drive each of the bus lines, wherein the plurality of loads are distributed and connected to each of the bus lines. It is characterized by the following. Another feature of the present invention is that the distance between the loads connected to each of the bus lines is increased.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on illustrated embodiments. FIG. 1 is a model diagram of an embodiment of an electronic circuit device having a bus line configuration according to the present invention. As shown in FIG. 1, the electronic circuit device includes first and second bus lines 11a and 11b branched from one to two by a branch path 11, and each of the two bus lines 11a and 11b. And a first and a second load 3 near the branch 11.
And first and second drivers 12a and 12b respectively arranged on the bus lines 11a and 11b. That is, the bus line configuration of the electronic circuit device is as follows:
The bus line is parallelized into two lines, and the parallelized first
A load 3 such as a plurality of printed circuit boards is connected to each of the first and second bus lines 11a and 11b approximately in half and driven by the first and second drivers 12a and 12b. Thereby, the number of loads connected to each of the first and second bus lines 11a and 11b is reduced by half, the distance between the loads is doubled, and the distribution per unit length of each of the bus lines 11a and 11b is increased. The load capacity C _L becomes C _P / 2, which is half that of the conventional system. For this reason,
By substituting C _L = C _P / 2 into the above equation (2), the impedance value Z _{L under} load can be expressed by the following equation (4). Here, X = C _P / C _0, where X≫1, Expression (3) showing the impedance value of the conventional method and Expression (4) showing the impedance value according to the embodiment of the present invention are as follows. Equation (5),
It can be expressed as equation (6). Conventional impedance value Impedance values according to embodiments of the present invention As described above, the impedance Z ′ _L according to the embodiment of the present invention is approximately √2 times the impedance Z _L of the conventional method. That is, an appropriate current for driving each of the bus lines 11a and 11b according to the embodiment of the present invention is 1 / √2 of the conventional method. Therefore, each of the bus lines 11a, 1
Each of the drivers 12a and 12b for driving 1b may have a small driving force and a small driving force, and does not greatly affect peripheral circuits unlike the conventional large driver 10 having a high driving force (see FIG. 5).

In the first and second bus lines 11a and 11b according to the embodiment of the present invention, the number of bus buffers connected to one bus line is 1/2 that of the conventional system. Therefore, as shown in FIG. 1, the number of impedance change points 11c in one bus line is １ ／.
It has become. Since the number of impedance change points is small, the influence of the reflected wave is significantly reduced as compared with the conventional method, so that the disturbance of the waveform is reduced and information can be transmitted with higher quality. In the above-described embodiment, a description has been given of a case where information on one printed circuit board is transmitted to all other printed circuit boards as shown in FIG. 4, but information on all printed circuit boards is transmitted as shown in FIG. It is needless to say that the same can be said for the line converging. Although the above embodiment has been described in the case of two parallels, the present invention is not limited to this, and two or more bus lines such as three parallels or four parallels may be parallelized. . Further, in the above-described embodiment, a case has been described in which the loads are equally connected to each of the bus lines arranged in parallel, but the loads need not always be equal. Furthermore, the bus line of the electronic circuit device of the bookshelf type rack has been described here, but the present invention is not limited to this, and the present invention may be applied to a bus line on a single printed circuit board.

[0008]

As described above, according to the present invention, the number of loads connected to each bus line is reduced by dividing the bus lines into a plurality of parallel paths by branching paths, the distance between the loads is increased, A driver is provided for each line to drive, reducing the decrease in bus line characteristic impedance due to an increase in the number of loads, facilitating bus line driving, and reducing the number of loads connected to one bus line. Accordingly, the present invention exerts a remarkable effect in providing an electronic circuit device capable of transmitting information with higher quality by reducing the influence of reflected waves.

[Brief description of the drawings]

FIG. 1 is a connection model diagram showing a bus line configuration of an electronic circuit device according to the present invention.

FIG. 2 shows a conventional bookshelf type rack (unit).
FIG.

FIG. 3 is a connection model diagram of a conventional bus line.

FIG. 4 is a connection model diagram of a conventional bus line.

FIG. 5 is a distributed load equivalent model diagram of the configuration of FIG. 4;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Rack, 3 ... Printed circuit board, 5, 11, 12 ... Bus line, 7
... bus buffer, 9 ... backplane,
10, 12 ... driver,

Claims (2)

[Claims] 1. An electronic circuit device having a bus line configuration for connecting a plurality of loads to a bus line, wherein the bus line is divided into a plurality of parallel lines by a branch path, and the bus lines are driven to drive each of the bus lines. An electronic circuit device, comprising: a driver provided for each of a plurality of bus lines; and wherein the plurality of loads are dispersedly connected to the respective bus lines. 2. The electronic circuit device according to claim 1, wherein the distance between the loads connected to each of the bus lines is made substantially uniform and long.