JP2000138683A - Atm repeater and its atm switch unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain high speed and high efficiency for hop by hop transfer by enhancing a throughput of the hop by hop transfer between an asynchronous transmission mode ATM switch unit and an IP processing unit. SOLUTION: An ATM switch unit 20 is provided with an ATM disassembly/ assembly circuit 13a, which reconfigures an ATM cell requiring hop by hop transfer into an IP packet. The IP packet is transferred to an IP processing unit 10, which retrieves a transfer destination. Furthermore, the IP packet whose transfer destination is retrieved by the IP processing unit 10 is transferred to the ATM switch unit 20 in only a form that Tag information is added to the IP packet, this IP packet is given to the ATM disassembly/assembly circuit 13a, where the IP packet is disassembled into an ATM cell, a virtual channel VC value is acquired based on the Tag information and the disassembled ATM cell is transmitted to a downstream channel from an output port corresponding to the VC value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a computer network such as the Internet or a LAN (Loca).
l IP (Internet Protocol) in Area Network
) It relates to a relay device provided for performing packet routing processing, and particularly relates to an ATM (Asynchronous Transformer).
The present invention relates to an ATM relay device using an asynchronous transfer mode (fer mode) technology and an ATM switch unit thereof.

[0002]

2. Description of the Related Art With the spread of the Internet in recent years, the Internet infrastructure has been steadily expanding. An important technology here is a device that connects a plurality of logical networks. In a packet relay device such as a bridge or a router, routing processing for each packet destination is performed in the data link layer for communication on the same subnet (logical network) and in the network layer for communication between different subnets (logical networks). To transfer.
The transfer of a packet by such a routing process in the network layer is called hop-by-hop transfer.

[0003] In this hop-by-hop transfer method, IP
Extraction of the header information of the next, then the destination to send the IP and (next
HOP) is determined by software processing (CPU). Therefore, the processing speed in this part becomes slow,
In recent years, with the speeding up and increase of communication traffic, in a network via a plurality of devices, this point has become a bottleneck, and the throughput cannot be increased.

Therefore, a label switch switch type router (cell switch router: CSR) has been proposed which omits the data link layer processing of IP packets and realizes high-speed IP forwarding processing by ATM switch exchange called cut-through transfer. ing.

In this label switch system, communication such as ftp or http having a relatively long session time, or cutoff transfer of IP packet data to a network belonging to the same network using a network address as an information base (Layer 1 level (ATM)) This is effective in improving the throughput, and the processing speed can be remarkably increased as compared with the conventional method.

FIG. 7 shows an example of the configuration of a cell switch router, which comprises an ATM switch unit 2 and an IP processing unit 1. In the figure, when a plurality of ATM cells arrive from an upstream line, these ATM cells
The cell is sent from the ATM switch unit 2 to the IP processing unit 1.

The IP processing unit 1 includes a processor 11 composed of a microcomputer or a dedicated LSI, a transfer destination search circuit 12, a cell disassembly / assembly unit (SAR: Segmenta).
and a frame memory 15, and the plurality of ATM cells are stored in the SAR1 first.
In step 3, the packet is reconstructed into an IP packet. Then, IP header information is extracted from the reconstructed IP packet data,
Break down the destination IP address and the like. Next analyzed destination IP
The forwarding table of the transfer destination search circuit 12 is searched using the address as key information. In this forwarding table, output line information is registered in advance in association with the destination IP address, and the output line to which the IP sub-network or host as the transfer destination is connected is determined by the above search. When this determination is completed, the received IP packet is decomposed into ATM cells by the SAR 13, and these ATM cells are added with an output VC (Virtual Channel) value for switching to a target output line. It is returned to the ATM switch unit 2.

The ATM switch unit 2 has an ATM switch 14, and each ATM switch 14
Switching the TM cell according to its output VC value,
Send to the corresponding output line.

[0009]

However, such a conventional ATM relay device transfers a received ATM cell from the ATM switch unit 2 to the IP processing unit 1 as it is, while transferring the received ATM cell from the IP processing unit 1 to the ATM switch unit 2. Transfer the ATM cell reconstructed by the SAR13. Here, an ATM header is added to each of the ATM cells, and additional information such as a SAR header, a SAR trailer, and a pad generated when the IP packet is decomposed into the ATM cells is added to the payload.

Therefore, the ATM switch units 2 and I
Between the P processing unit 1 and the IP packet is transferred in the form of an ATM cell to which a lot of additional information is added, which causes a decrease in throughput. Generally, the ATM switch unit 2 and the IP processing unit 1 are connected by a general-purpose optical signal line, and their transmission capacity (for example, 15
5.52 Mbps) is limited. For this reason, the transfer of ATM cells between the ATM switch unit 2 and the IP processing unit 1 as described above is a major bottleneck in increasing the speed of hop-by-hop transfer in the relay device.

The present invention has been made in view of the above circumstances, and has as its object to increase the throughput of hop-by-hop transfer between an ATM switch unit and an IP processing unit, thereby increasing hop-by-hop transfer. And to provide a high-performance ATM relay device and its ATM switch unit by realizing high speed and high efficiency.

[0012]

To achieve the above object, an ATM repeater according to the present invention is connected to an IP processing unit via a signal line having a predetermined transmission capacity to the IP processing unit. When an IP packet is transferred from the ATM switch unit to the IP processing unit via the signal line, a destination address is extracted from the IP packet and corresponds to the destination address. Transfer destination searching means for searching for the first transfer destination information, and transferring the IP packet added with the first transfer destination information searched by the transfer destination detecting means to the ATM switch unit via the signal line. Means, and the ATM switch unit is provided with an ATM input through a first input port.
Among the cells, an ATM cell requiring a transfer destination search is output to the second output port, and the ATM cell input via the second input port is added to the second transfer destination information added to the ATM cell. The ATM switch sending out from the corresponding first output port and the first transfer destination information added to the IP packet transferred from the IP processing unit via the signal line are required for the switching process of the ATM switch. Conversion means for converting the information into second transfer destination information;
Reconstructing an IP packet based on the ATM cell output from the second output port of the ATM switch, transferring the reconstructed IP packet to the IP processing unit via the signal line, and performing the IP processing The IP packet transferred from the unit is decomposed into ATM cells, the second transfer destination information obtained by the conversion means is added to the decomposed ATM cells, and the ATM cells are transmitted to the second input of the ATM switch. Cell disassembly means for inputting to a port is provided.

Further, the ATM switch unit according to the present invention extracts a destination address from the input IP packet, searches for first transfer destination information corresponding to the destination address, and searches for the first transfer destination information. An ATM switch unit connected via a signal line having a predetermined transmission capacity to an IP processing unit having a function of outputting the IP packet to which information has been added, the ATM switch unit being input via a first input port. The ATM cell which needs to be searched for the transfer destination is output to the second output port, and the ATM cell input through the second input port is output to the second transfer destination added to the ATM cell. An ATM switch for transmitting from the first output port corresponding to the information; and an IP packet transferred from the IP processing unit via the signal line. Converting means for converting the first transfer destination information into second transfer destination information necessary for switching processing of the ATM switch, and ATM cells output from a second output port of the ATM switch. The IP packet is reconstructed, the reconstructed IP packet is transferred to the IP processing unit via the signal line, and the IP packet transferred from the IP processing unit is decomposed into ATM cells. Adding the second transfer destination information obtained by the conversion means to the cell,
Cell disassembling means for inputting the ATM cell to the second input port of the ATM switch.

Therefore, according to these inventions, data transfer for hop-by-hop transfer is performed in the form of an IP packet between the ATM switch unit and the IP processing unit. For this reason, it is possible to perform high-throughput transfer with a small amount of additional information as compared with the case of transferring ATM cells, thereby realizing high-speed hop-by-hop transfer.

In the transfer destination search means, Tag information is added to the IP packet as first transfer destination information, and in the conversion means, the Tag information added to the IP packet as the first transfer destination information is added. It is characterized in that it is configured to convert to VC (Virtual Channel) value as second transfer destination information.

With this configuration, for example, the SAR header and the ATM header including the VC and the SAR trailer are removed, and the tag information in place of the VC value is transferred, so that the amount of additional information can be reduced. This makes it possible to further increase the throughput.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an ATM according to the present invention.
It is a circuit block diagram showing one embodiment of a relay device. 7, the same parts as those in FIG. 7 are denoted by the same reference numerals and described.

The ATM relay device of this embodiment comprises an IP processing unit 10 and an ATM switch unit 20. Between the IP processing unit 10 and the ATM switch unit 20, for example, a transmission speed of 15
They are connected via a general-purpose optical signal line of 5.52 MHz.

The IP processing unit 10 includes a processor 11
, A transfer destination search circuit 12a, and a frame memory 15. The frame memory 15 temporarily stores the IP packet transferred from the ATM switch unit 20.

The transfer destination search circuit 12a is composed of a hardware circuit having a search control circuit 121 and a forwarding table 122, as shown in FIG. 2, for example. In the forwarding table 122, forwarding information is stored in advance in association with a destination address (Destination IP Address), a source address (Source Address), and the like. FIG. 3 shows an example of the storage information, and Tag information is stored as the forwarding information. The search control circuit 121 extracts the destination address from the IP packet transferred from the ATM switch unit 20 and refers to the forwarding table 122 using this destination address as key information, so that the forwarding information of the corresponding transfer destination, that is, T
ag information. The processor 11 performs management and control relating to hop-by-hop transfer by software processing.

On the other hand, the ATM switch unit 20
TM switch 14 and ATM disassembly / assembly circuit (SAR) 1
3a and a Tag / VC conversion table 16. The ATM switch 14 transmits the destination information of the ATM cell input to the first input port, that is, the VPI (Virtual Pa
th Identifier: a virtual path identifier) and a transfer path of an ATM cell according to a virtual channel identifier (VCI) for identifying which VC in the VP should be used to send data to the other party. Switch. For example, if the destination information is a VPI / VCI previously allocated for IP packet transfer requiring a transfer destination search, the ATM cell is output from the second output port to the ATM cell disassembly / assembly unit 13a. On the other hand, if the destination information is other VPI / VCI, the ATM cell is output from the corresponding output port among the plurality of first output ports to the line.

The Tag / VC conversion table 16 stores each Tag stored in the forwarding table 122.
The VC value is stored in advance in association with the information. FIG. 4 shows an example of the stored information.

The ATM disassembly and assembly circuit (SAR) 13a
The ATM cell input from the ATM switch 14 is reconstructed as an IP packet, and the IP packet is transferred to the IP processing unit 10 via an optical signal line. The IP packet transferred from the IP processing unit 10 via the optical signal line is decomposed into ATM cells, and the Tag / VC conversion table 16 is accessed using the Tag information added to the IP packet as a key. , VC
Get the value. Then, this VC value is decomposed into the above AT
Write to ATM header of M cell, ATM switch 14
To the second input port.

Next, the operation of the apparatus configured as described above will be described. When an ATM cell is input to the first input port of the ATM switch 14, the ATM switch 14 outputs destination information (V) from the ATM header of the received ATM cell.
PI / VCI) is extracted and its contents are determined. Then, destination information (VPI / VCI) is assigned to a VPI / VC previously allocated for IP packet transfer requiring a transfer destination search.
If I, the ATM cell is output from the second output port to the ATM cell disassembly / assembly unit (SAR) 13a for hop-by-hop transfer.

In the ATM cell disassembly / assembly unit (SAR) 13a, the ATM cell output from the ATM switch
Processing for reconstructing as a P packet is performed, and this IP packet is transmitted to the IP processing unit 10 via an optical signal line.
Transferred to That is, the ATM switch unit 10
To the IP processing unit 10 in the form of an IP packet.

On the other hand, in the IP processing unit 10, when the IP packet is transferred from the ATM switch unit 10, the IP packet is stored in the frame memory 15. Then, in the transfer destination search circuit 12a, the destination address is extracted from the header of the IP packet,
Using the destination address as key information, the forwarding table 122 is accessed, and the corresponding Ta
g information is read. This Tag information is added to the IP packet as shown in FIG.
The P packet is transferred to the ATM switch unit 20 via the optical signal line.

In the ATM switch unit 20, the above I
The P packet is disassembled into ATM cells in an ATM disassembly and assembly circuit (SAR) 13a. FIG. 5 is a data format diagram showing the state of this decomposition. Also at this time AT
In the M disassembly / assembly circuit (SAR) 13a, the IP
Tag information is used as a key for Tag information.
g / VC conversion table 16 is accessed and the corresponding V
The C value is obtained. The VC value is written in the ATM header of each of the decomposed ATM cells, and the ATM cell in which the VC value is written is stored in the ATM switch 1.
4 is input to the second input port.

In the ATM switch 14, every time an ATM cell is input to the second input port, switching of the data transfer path is performed in accordance with the VC value written in the ATM header. V
The output port corresponding to the C value is transmitted to each line.

Note that once the forwarding information is obtained as described above, the corresponding destination information (VPI
/ VCI), a cut-through path is set in the ATM switch 14 so that the ATM cells arriving from the upstream line and addressed to the same IP address are not transferred to the IP processing unit 10 hop-by-hop, and are not changed. Cut-through transfer to downstream line. That is,
Thereafter, high-speed transfer of ATM cells becomes possible.

As described above, in this embodiment, the AT
An ATM disassembly / assembly circuit (SA
R) 13a, AT requiring hop-by-hop transfer
After reconstructing the M cells into IP packets in this ATM disassembly / assembly circuit (SAR) 13a, the IP processing unit 1
0 to search for the transfer destination. In addition, IP
The IP packet whose transfer destination has been searched in the processing unit 10 is transferred to the ATM switch unit 20 in a form in which Tag information is only added, and the IP packet is transferred to the ATM switch unit 20.
Disassembled into ATM cells by disassembly and assembly circuit (SAR) 13a,
Further, a VC value is acquired based on the Tag information, and the decomposed ATM cell is transmitted from an output port corresponding to the VC value to a downstream line.

Therefore, according to this embodiment, between the ATM switch unit 20 and the IP processing unit 10,
Data transfer for hop-by-hop transfer is performed in the form of an IP packet. For this reason, ATM headers and SARs
Data transfer can be performed without additional information such as headers, SAR trailers, and Pads.
Transfer with higher throughput can be performed as compared with the case where transfer is performed in the form of M cells. Therefore, the speed of the hop-by-hop transfer can be increased.

When the IP packet is transferred from the IP processing unit 10 to the ATM switch unit 20, the transfer destination is represented by Tag information, and the Tag information is added to the IP packet and notified to the ATM switch unit 20. I have to. For this reason, the information amount of the transfer destination information can be reduced as compared with the case where the VC value is notified, whereby the data transfer efficiency between the IP processing unit 10 and the ATM switch unit 20 can be further increased. .

The present invention is not limited to the above embodiment. For example, in the above embodiment, the VC processing is performed from the IP processing unit 10 to the ATM switch unit 20.
SAR header and ATM header with value, and SAR
Remove trailer and use T instead of VC value as destination information
Ag information is added to an IP packet and transferred. However, the transfer may be performed by adding information indicating the VC instead of the Tag information. With this configuration, it is not necessary to provide a Tag / VC conversion table in the ATM switch unit 20, and the circuit configuration of the device can be simplified and reduced in size accordingly.

In addition, the configuration of the IP processing unit and the ATM switch unit, the transfer destination information notifying means, and the like can be variously modified without departing from the gist of the present invention.

[0035]

As described in detail above, the present invention provides an ATM
The switch unit includes, in addition to the ATM switch, cell disassembly / assembly means and transfer destination information conversion means. Then, the conversion means converts the first transfer destination information added to the IP packet transferred from the IP processing unit into the second transfer destination information necessary for the switching process of the ATM switch. The AT output from the second output port of the ATM switch by the cell disassembly / assembly means.
The IP packet is reconstructed based on the M cell, and the reconstructed IP packet is transferred to the IP processing unit.
The IP packet transferred from the P processing unit is decomposed into ATM cells, and the second transfer destination information obtained by the conversion means is added to the decomposed ATM cells.
The cell is inputted to the second input port of the ATM switch and is transmitted by switching.

Therefore, according to the present invention, it is possible to increase the throughput of the hop-by-hop transfer between the ATM switch unit and the IP processing unit, thereby realizing high-speed and efficient hop-by-hop transfer. It is possible to provide a high-performance ATM relay device and its ATM switch unit.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing an embodiment of an ATM relay device according to the present invention.

FIG. 2 is a functional block diagram of a transfer destination search circuit provided in the ATM relay device shown in FIG.

FIG. 3 is a diagram showing an example of the configuration of a forwarding table provided in the transfer destination search circuit shown in FIG. 2;

FIG. 4 is a diagram illustrating Tag / VC of the ATM repeater shown in FIG. 1;
The figure which shows an example of a structure of a conversion table.

FIG. 5 is a data format diagram for explaining an IP packet disassembly operation by the ATM cell disassembly / assembly circuit.

FIG. 6 is a diagram showing a format of an IP packet transferred from an IP processing unit to an ATM switch unit.

FIG. 7 is a circuit block diagram showing a configuration example of a conventional ATM relay device.

[Explanation of symbols]

 1, 10: IP processing unit 2, 20: ATM switch unit 11: Processor 12, 12a: Transfer destination search circuit 13, 13a: ATM disassembly / assembly circuit 14: ATM switch 15: Frame memory 16: Tag / VC conversion table 121 Search control unit 122: forwarding table

Claims (3)

[Claims] 1. An IP processing unit comprising: an IP processing unit; and an ATM switch unit connected to the IP processing unit via a signal line having a predetermined transmission capacity. I through the signal line
When the P packet has been transferred, a destination address is extracted from the IP packet, and a first destination information corresponding to the destination address is searched. Means for transferring the IP packet to which the transfer destination information of 1 has been added to the ATM switch unit via the signal line, wherein the ATM switch unit has a function of transmitting the ATM cell input via the first input port. Among them, the ATM cell requiring the transfer destination search is output to the second output port, and the ATM cell input via the second input port corresponds to the second transfer destination information added to the ATM cell. An ATM switch transmitted from a first output port; and a first switch added to an IP packet transferred from the IP processing unit via the signal line. Converting means for converting the transfer destination information into second transfer destination information required for the switching process of the ATM switch; and reconstructing an IP packet based on the ATM cell output from the second output port of the ATM switch. The reconstructed IP packet is transferred to the IP processing unit via the signal line, and the IP packet transferred from the IP processing unit is decomposed into ATM cells. An ATM repeater, comprising: cell disassembly and assembly means for adding the obtained second transfer destination information and inputting the ATM cell to a second input port of the ATM switch. 2. The transfer destination search means adds Tag information as first transfer destination information to an IP packet, and the conversion means adds the Tag information added as first transfer destination information to the IP packet. 2. The ATM relay device according to claim 1, wherein the data is converted into VC (Virtual Channel) as the second transfer destination information. 3. A destination address is extracted from the input IP packet to search for first transfer destination information corresponding to the destination address, and the IP packet to which the searched first transfer destination information is added is output. An ATM switch unit connected via a signal line having a predetermined transmission capacity to an IP processing unit having a function of performing a transfer destination search among ATM cells input through a first input port. A required ATM cell is output to a second output port, and an ATM cell input via a second input port is converted to a first output port corresponding to second transfer destination information added to the ATM cell. And an ATM switch for transmitting the first transfer destination information added to the IP packet transferred from the IP processing unit via the signal line to the ATM switch. Converting means for converting to second transfer destination information necessary for the switching processing of the above, and reconstructing the IP packet based on the ATM cell output from the second output port of the ATM switch, and reconstructing the IP packet To the IP processing unit via the signal line, decomposes the IP packet transferred from the IP processing unit into ATM cells, and converts the decomposed ATM cells into the second transfer obtained by the conversion means. An ATM switch unit, comprising: cell disassembly / assembly means for inputting the ATM cell to a second input port of the ATM switch with the preceding information added.