JP2000134163A - Level detection circuit, communication device and communication method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a level detection circuit with small errors when a level is detected and to obtain the communication device that uses the detection circuit with high detection level accuracy. SOLUTION: A level detector 1 detects the level of a signal, and a peak-hold circuit 2 bolds a peak level of the level detector 1. A time constant circuit 4 uses a prescribed time constant for a charging time constant of the peak hold circuit 2, a time constant circuit 5 uses a prescribed time constant for the discharge time constant of the peak hold circuit 2, and an integration device 3 integrates an output of the peak hold circuit 2. With this the configuration, the peak hold circuit 2 whose charge/discharge time constant is set to an optimum value holds an output of the level detector 1, and the integration circuit integrates the held output and provides an output. Thus, even when there is a fluctuation in an envelope in an input signal, a level detection errors can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a level detection circuit for detecting a communication signal level, a communication apparatus using the same, and a communication method.

[0002]

2. Description of the Related Art Conventionally, in a communication apparatus, a method of detecting an output level using a level detection circuit and performing feedback control to obtain a predetermined output level has been used in order to improve the accuracy of the transmission output level. I have. Note that this communication device includes a transmitting and receiving device, and the level of the received signal is detected using a level detection circuit also in the received signal to obtain an RSSI signal.

FIG. 31 showing a conventional example 1 is a circuit block diagram of a configuration example of a diode detection circuit. The diode detection circuit of the first conventional example includes a detection diode 102 and an integration circuit 103, detects an input signal 100, and outputs a detection output 101 smoothed by the integration circuit 103. This diode detection circuit has input / output characteristics as shown in FIG. The input / output characteristics of the first conventional example are shown in FIG.
As shown in (1), the voltage value of the detection output Vdet [V] changes according to the power [W] of the input signal 100. FIG. 33 showing Conventional Example 2 is a circuit block diagram of a configuration example of a detection circuit using a logarithmic amplifier. The level detection circuit of the conventional example includes a logarithmic amplifier 104 and an integration circuit 103, and performs logarithmic detection of an input signal 100 and outputs a detection output 101 smoothed by the integration circuit 103. Such a signal level detection circuit using a logarithmic amplifier is used to increase the dynamic range of detection and a diode detection circuit, and is disclosed in Japanese Patent Application Laid-Open No. 8-84037.

This detection circuit has an input / output characteristic as shown in FIG. 34, and has a detection output V proportional to the logarithm of the input.
The voltage value of det [V] is obtained. The above logarithmic amplifier 104
The dynamic range of the detection circuit of the second prior art using the conventional technique can be larger than that of the diode detection circuit of the first conventional example. As for the characteristic, as shown in FIG. 34, a voltage is output in proportion to the logarithmic value of the input.

FIG. 35 showing a conventional example 3 is a circuit block diagram of a code division multiplexed signal generator using spread spectrum. In the third conventional example, an input signal 105 having n systems is provided.
An n-system primary spread signal generator 106 for generating a different spread signal for each input signal;
05 is spread by a spread signal generated by a spread signal generator 106, an n-system primary spreading unit 107, a multiplexing unit 108 for multiplexing the n-system primary-spread signals, and a generator 2 for generating a secondary spread signal A second spreading signal generator 109; a second spreading unit 110 for spreading the signal multiplexed by the multiplexing unit with a second spreading signal;
Band limiting filter 11 for band limiting the next spread signal
1 and 1. The level detection circuit of the third conventional example is disclosed in, for example, Japanese Patent Application Laid-Open No. 7-183845, and corresponds to a burst reception signal of digital wireless communication.

[0006] FIG. 36 shows that Q is obtained by using orthogonal codes for primary spreading.
Number of multiplexing n = 1, 2, 1 when multiplexing PSK (Quadrature Phase Shift Keying / Quadrature Phase Modulation) modulated waves
5 is a characteristic diagram showing envelope fluctuation in FIG.

[0007]

However, each of the above-mentioned prior arts has the following problems in each example.

The diode detection circuit of the prior art 1 has a problem that the dynamic range is small. FIG.
The ideal squared detection characteristic range as shown by the dotted line in Fig. 2 is
Even smaller, beyond that level, they exhibit logarithmic characteristics. Therefore, when a modulated wave signal having an envelope fluctuation such as QPSK is input, there is a problem that a detection error occurs for the same input power as the sine wave signal. Further, in the case of a code division multiplexed signal, the manner of fluctuation of the envelope greatly changes depending on the number of multiplexed codes. When a diode is used for peak hold, the forward voltage of the diode changes with temperature. Therefore, there is a problem that the level detection output fluctuates depending on the temperature.

In the detection circuit using the logarithmic amplifier 104 of the second conventional example, as described above, the dynamic range can be made larger than that of the diode detection circuit of the first conventional example. However, as shown in FIG. 34, for example, the input power is 0.5, 4, 0.5, 1 [m
W], the average power of the input signal is (0.5
+ 4 + 0.5 + 1) /4=1.5 [mW] = 1.8 [d
Bm]. On the other hand, the input conversion value of the output voltage is -3, 6, -3, 0 [dBm], and the input conversion value of the integration circuit output is (-3 + 6-3 + 0) / 4 = 0 [d
Bm], and an error of 1.8 [dBm] occurs. For example, there is a problem that a power detection error occurs in a modulated wave having an envelope fluctuation. Also, when detecting the level of a code division multiplexed signal, there is a problem that an error in level detection varies depending on the number of multiplexed codes. FIG. 36 showing a characteristic example of the third conventional example shows a characteristic expressing envelope fluctuation at the number of multiplexing n = 1, 2, 15 when a QPSK modulated wave is multiplexed using orthogonal codes for primary spreading. As shown in these figures, when n = 2, a case where the level of the envelope is greatly reduced as compared with n = 1 occurs. When such dynamic envelope fluctuation occurs, the detection error increases due to the non-linearity of the detection circuit. In other words, there is a problem that the level detection error varies depending on the number of multiplexed codes. When the number of multiplexed code division multiplexed signals increases, a peak occurs in the envelope at a time corresponding to one chip length of spreading. When such dynamic envelope fluctuation occurs, the detection error increases due to the non-linearity of the detection circuit. In other words, there is a problem that the level detection error varies depending on the number of multiplexed codes.

Further, as shown in FIG. 36, when the number of multiplexed code division multiplexed signals increases, the envelope of the
A peak occurs at a time corresponding to the chip length. For this reason, a detection circuit using a peak hold means as disclosed in Japanese Patent Application Laid-Open No. 7-183845 holds a peak value. For this reason, there is a problem that a level detection error increases. Further, the peak value generated by the noise of the circuit is also held. For this reason, there is a problem that a level detection error increases.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and has as its object to provide a level detection circuit having a small level detection error and a communication device having a high detection level accuracy using the detection circuit. I do.

[0012]

The present invention adopts the following constitution in order to solve the above problems.

According to the first aspect of the present invention, there is provided a level detecting circuit comprising:
The signal level is detected, and the spire value of the detected signal is held. In this holding, the charge and discharge time constants are integrated as a predetermined time constant.

According to the above configuration, by setting the charge / discharge time constant to an optimum value and integrating, the level detection error can be reduced even when the input signal has an envelope fluctuation. .

[0015]

According to the present invention, there is provided a level detecting circuit for detecting a level of a signal, a peak hold output generating means for holding a spike of the level detecting means, and a peak hold output generating circuit. A charging time constant circuit for setting a charging time constant of the means to a predetermined time constant, a discharging time constant circuit for setting a discharging time constant of the peak hold output generating means to a predetermined time constant, and an output of the peak hold output generating means. And integrating means for integrating.

In each of the above components, for example, the level detecting means corresponds to a level detector that outputs a DC voltage or a current with respect to the power of an input signal. The peak hold generation means corresponds to, for example, a peak hold circuit that holds the input spire value. The charging time constant circuit that sets the charging time constant to a predetermined time constant corresponds to a CR circuit that sets the time constant of the voltage output by the peak hold circuit according to an increase in input to a predetermined value. The discharge time constant circuit that sets the discharge time constant to a predetermined time constant corresponds to a CR circuit that sets the time constant for discharging the voltage held by the peak hold circuit to a predetermined value. The integrating means corresponds to, for example, a low-pass filter that integrates and outputs an input value.

Therefore, according to the level detection circuit of the present invention, the output of the level detection means is integrated after the output of the level detection means is held by the peak hold output generation means in which the time constant of charging and discharging is set to an optimum value. Therefore, the level detection error can be reduced even when the input signal has an envelope fluctuation.

According to a second aspect of the present invention, the level detecting means of the level detecting circuit according to the first aspect includes a diode.

Therefore, according to the level detecting circuit of the second aspect of the present invention, the level detecting means can be simply configured, and the detection error by the diode can be reduced even when the envelope of the input signal fluctuates. be able to.

According to a third aspect of the present invention, the level detecting means of the first level detecting circuit is a logarithmic amplifier.

The logarithmic amplifier corresponds to, for example, a logarithmic detection amplifier that outputs an output DC voltage in proportion to the logarithmic value of the power of the input signal.

Therefore, according to the level detection circuit of the third aspect, the dynamic range of level detection can be expanded, and the level detection error can be reduced even when the input signal has an envelope fluctuation.

According to the fourth aspect of the present invention, the first to third aspects are provided.
The described level detection circuit is configured to further include a temperature-sensitive element whose characteristics change with temperature.

The temperature-sensitive element corresponds to, for example, a thermistor whose resistance changes with temperature.

Therefore, according to the level detection circuit of the present invention, the temperature characteristic can be compensated by the temperature sensing element, so that the level detection error can be reduced regardless of the ambient temperature.

According to a fifth aspect of the present invention, the level detecting circuit according to the fourth aspect further includes an attenuating means for attenuating an input signal at a stage preceding the level detecting means, and a sense that the resistance value changes depending on temperature to the attenuating means. A configuration using a temperature element is adopted.

The attenuating means provided at the preceding stage of the level detecting means for attenuating an input signal corresponds to, for example, an attenuator constituted by a resistor. Further, a temperature-sensitive element whose resistance value changes with temperature corresponds to, for example, a thermistor.

Therefore, according to the level detecting circuit of the present invention, the attenuator for attenuating the input signal is provided, and the attenuating amount is changed according to the temperature to compensate for the temperature characteristic. Regardless, the level detection error can be reduced.

According to a sixth aspect of the present invention, the level detecting circuit according to the fourth aspect further includes an attenuating means for attenuating the output of the peak hold output generating means. It is configured by applying elements.

Therefore, according to the level detection circuit of the present invention, an attenuator for attenuating the output of the peak hold generation means is provided, and the amount of attenuation is changed depending on the temperature to compensate for the temperature characteristic. Therefore, the level detection error can be reduced regardless of the ambient temperature.

According to a seventh aspect of the present invention, in the level detection circuit according to the fourth aspect, the integration means is constituted by an operational amplifier for amplifying an output signal, and the resistance value changes depending on temperature to a bias circuit for determining an offset voltage of the operational amplifier. It is configured by applying a temperature-sensitive element.

Therefore, according to the level detection circuit of the present invention, the offset voltage of the operational amplifier is changed according to the temperature to compensate for the temperature characteristic, so that the level detection error is reduced regardless of the ambient temperature. be able to.

According to the present invention, in the level detection circuit according to the fourth aspect, the integrating means is constituted by using an operational amplifier, and a temperature-sensitive element whose resistance value changes with temperature is supplied to a bias circuit for determining an offset voltage of the operational amplifier. A structure to which an element is applied is adopted.

Therefore, according to the level detecting circuit of the present invention, the offset voltage of the operational amplifier used for the integrating means is changed depending on the temperature to compensate for the temperature characteristic. Regardless, the level detection error can be reduced.

According to the ninth aspect of the present invention, the level detection circuit according to the fourth aspect provides the peak hold output generating means with the first level.
, An operational amplifier for amplifying an output signal to the integrating means, and a second diode having substantially the same temperature characteristics as the first diode for a bias circuit for determining an offset voltage of the operational amplifier.

Therefore, according to the level detecting circuit of the ninth aspect, the first circuit constituting the peak hold output generating means is provided.
Is compensated by the second diode provided in the bias circuit that determines the offset voltage of the operational amplifier, so that the level detection error can be reduced regardless of the ambient temperature.

According to a tenth aspect of the present invention, in the level detecting circuit according to the fourth aspect, the first diode constituting the peak hold output generating means, the operational amplifier constituting the integrating means, and the offset voltage of the operational amplifier are determined. The bias circuit includes a second diode having substantially the same temperature characteristics as the diode.

Therefore, according to the level detecting circuit of the present invention, the temperature characteristic of the first diode constituting the peak hold output generating means is provided to the bias circuit for determining the offset voltage of the operational amplifier used for the integrating means. Since the compensation is performed by the second diode, the number of components can be reduced, and the level detection error can be reduced regardless of the ambient temperature.

According to an eleventh aspect of the present invention, the level detection circuit according to the first to ninth aspects has a switch means for opening the discharge time constant circuit of the peak hold output generation means.

The switch means corresponds to, for example, an analog switch.

Therefore, according to the level detection circuit of the present invention, the level detection error can be reduced even when there is no input signal in order to maintain the spire value at the time of opening.

According to a twelfth aspect of the present invention, the level detection circuit according to the first to ninth aspects has a configuration including reset means for short-circuiting the discharge time constant circuit of the peak hold output generation means.

Therefore, according to the level detection circuit of the twelfth aspect, the detection voltage can be reset at the time of short-circuit, and the level can be detected without being affected by the signal level before the short-circuit.

According to a thirteenth aspect of the present invention, the level detection circuit according to the first to eleventh aspects has a switch means for switching a time constant of a discharge time constant circuit of the peak hold output generation means.

Therefore, according to the level detection circuit of the thirteenth aspect, the discharge time constant can be switched according to the envelope fluctuation, and the level detection error can be reduced.

According to a fourteenth aspect of the present invention, the level detection circuit according to the first to eleventh aspects has a configuration including switch means for switching a time constant of a charging time constant circuit of the peak hold output generation means.

Therefore, according to the level detection circuit of the present invention, it is possible to reduce the level detection error by switching the charging time constant in accordance with the envelope fluctuation.

According to a fifteenth aspect of the present invention, the level detection circuit according to the first to eleventh aspects has a time constant variable means for setting the time constant of the discharge time constant circuit of the peak hold output generation means to an arbitrary value. And

The time constant variable means corresponds to, for example, a time constant variable circuit composed of a capacity and a constant current circuit whose discharge current value can be controlled by a control signal.

Therefore, according to the level detection circuit of the present invention, the time constant of the discharge can be set to an arbitrary value in accordance with the envelope fluctuation, and the level detection error can be reduced.

According to a sixteenth aspect of the present invention, there is provided a communication circuit for transmitting or receiving a modulated wave signal, detecting the level of the modulated wave signal, and peak-holding the detected spire value with a predetermined charge / discharge time constant. , And a level detection circuit for detecting the level of the integrated modulated wave signal.

Therefore, according to the communication device of the sixteenth aspect, even when a modulated wave having an envelope fluctuation is transmitted, it is possible to accurately detect the transmission level and execute high-quality communication.

According to a seventeenth aspect of the present invention, in the communication device according to the sixteenth aspect, the level detecting circuit includes a level detecting means for detecting a signal level, and a peak hold output generating means for holding a spire value of the level detecting means. A charge time constant circuit for setting a time constant of charging of the peak hold output generation means to a predetermined time constant; a discharge time constant circuit for setting a time constant of discharge of the peak hold output generation means to a predetermined time constant; And integrating means for integrating the output of the output generating means.

Therefore, according to the communication device of the present invention, the output of the level detecting means is held by the peak hold output generating means in which the charging / discharging time constant is set to an optimum value, and then integrated and output. Also, the level detection error can be reduced even when the input signal has an envelope fluctuation.

According to the eighteenth aspect of the present invention, the communication device according to the sixteenth or seventeenth aspect is configured to communicate a code division multiplex signal.

The code division multiplex signal corresponds to, for example, a direct spread CDMA signal.

Therefore, according to the communication apparatus of the eighteenth aspect, the transmission level can be detected with high accuracy even when an envelope fluctuation due to code division multiplexing occurs.

According to a nineteenth aspect of the present invention, in the communication device according to the seventeenth or eighteenth aspect, a switch means for switching a time constant of discharge or charge of the peak hold output generation means in accordance with the number of multiplexed code division multiplexed signals. Or a variable time constant means for setting the discharge time constant to an arbitrary value.

Therefore, according to the communication apparatus of the nineteenth aspect, even when the envelope changes due to the change in the number of multiplexed code division multiplexed signals, the transmission level can be accurately detected.

According to a twentieth aspect of the present invention, there is provided a communication device according to the seventeenth aspect, comprising: a communication circuit for communicating a direct spreading code division multiplex signal capable of setting a spreading rate or a transmission rate to an arbitrary value; Switch means for switching the discharge or charge time constant of the peak hold output generation means or variable time constant means for setting the discharge time constant to an arbitrary value according to the rate or the transmission rate.

The above spreading rate corresponds to, for example, a chip rate of a spreading code of direct spreading CDMA. Also,
The transmission rate corresponds to, for example, the transmission rate of data before spreading in direct spread CDMA.

Therefore, according to the communication apparatus of the twentieth aspect, the transmission level can be accurately detected even when the envelope changes due to the spread rate or the transmission rate of the code division multiplexed signal.

According to a twenty-first aspect of the present invention, there is provided a communication apparatus according to any one of the sixteenth to twentieth aspects, wherein a communication circuit for communicating a plurality of different modulation modes and a level detection circuit for detecting a communication level of a different modulation mode. It has composition which has.

The modulation mode is, for example, AM or F
Analog modulation of M, FSK (Frequency Shift Keying)
/ Frequency shift keying) or QPSK digital modulation mode.

Therefore, according to the communication apparatus of the twentieth aspect, the communication level can be detected with high accuracy even when the difference in the envelope changes due to the difference in the modulation.

According to a twenty-second aspect of the present invention, there is provided a communication device according to any one of the sixteenth to twentieth aspects, wherein a communication circuit for communicating a plurality of different modulation modes and a level detection circuit for detecting a communication level of a different modulation mode. And an attenuator corresponding to the difference between the maximum communication outputs between the modulation modes having different attenuation amounts at the input of the level detection circuit.

The difference between the maximum transmission outputs between the different modulation modes is, for example, that the maximum transmission output of the first modulation mode is +30 dBm and the maximum transmission output of the second modulation mode is +1.
The time of 0 dBm corresponds to the difference of 20 dBm.
The attenuator corresponds to, for example, a high-frequency attenuator.

Therefore, according to the communication device of the present invention, the transmission level can be accurately detected even when the envelope fluctuation of the transmission signal is different and the maximum transmission output is different.

According to a twenty-third aspect of the present invention, in the communication apparatus according to any one of the sixteenth to twenty-second aspects, the switch means for opening the discharge time constant circuit when the communication output is stopped operates to open the discharge time constant circuit. Configuration.

Therefore, according to the communication device of the twenty-third aspect, the level detection error can be reduced even when a time period during which there is no transmission signal occurs because the spire value is held when the communication device is opened.

According to a twenty-fourth aspect of the present invention, in the communication device according to any one of the sixteenth to twenty-second aspects, the resetting means for short-circuiting the discharge time constant circuit when the communication output is stopped operates to short-circuit the discharge time constant circuit. Configuration.

Therefore, according to the communication device of the twenty-fourth aspect, since the detection voltage can be reset when a short circuit occurs, the level can be detected without being affected by the transmission signal level before the short circuit.

According to a twenty-fifth aspect of the present invention, the communication device according to the sixteenth aspect has a configuration including a receiving circuit for receiving a modulated wave signal and a level detecting circuit for detecting a level of the modulated wave signal.

Therefore, according to the communication device of the twenty-fifth aspect, even when a modulated wave having an envelope fluctuation is received, the reception level can be accurately detected.

According to a twenty-sixth aspect of the present invention, in the communication device according to the twenty-fifth aspect, the receiving circuit receives the code division multiplexed signal.

Therefore, according to the communication device of the twenty-sixth aspect, even when an envelope fluctuation due to code division multiplexing occurs, the reception level can be detected with high accuracy.

According to a twenty-seventh aspect of the present invention, a communication apparatus according to the twenty-sixth aspect includes a receiving circuit for receiving a direct spreading code division multiplex signal capable of setting a spreading rate or a transmission rate to an arbitrary value, and a spreading circuit of an arbitrary value. A switch means for switching the discharge or charge time constant of the peak hold output generation means in accordance with the rate or the transmission rate, or a variable resistance means for setting the discharge or charge time constant to an arbitrary value.

Therefore, according to the communication apparatus of the twenty-seventh aspect, even when the envelope changes due to the spread rate or the transmission rate of the code division multiplexed signal, the reception level can be accurately detected.

Therefore, according to the communication device of the twenty-seventh aspect, the reception level can be detected with high accuracy even when a difference in envelope variation occurs due to a difference in modulation.

According to a twenty-eighth aspect of the present invention, in the communication apparatus according to any one of the sixteenth to twentieth aspects, a receiving circuit for receiving a plurality of different modulation modes and a level detecting circuit for detecting a reception level of a different modulation mode are provided. It has composition which has.

Therefore, according to the communication apparatus of the twenty-eighth aspect, the reception level can be detected with high accuracy even when a difference in envelope variation occurs due to a difference in modulation.

According to a twenty-ninth aspect of the present invention, in the communication apparatus according to any one of the twenty-fifth to twenty-fourth aspects, the switch means for opening the discharge time constant circuit when there is no input of a received signal operates the discharge time constant circuit. Open configuration.

Therefore, according to the communication device of the present invention, the level detection error can be reduced even if a time period during which there is no reception signal occurs because the spire value is held when the communication device is opened.

According to a thirtieth aspect of the present invention, in the communication device according to any one of the twenty-fifth to twenty-eighth aspects, the reset means for short-circuiting the discharge time constant circuit when there is no input of a received signal operates the discharge time constant circuit. Short-circuited.

Therefore, according to the communication device of the thirtieth aspect, since the detection voltage can be reset at the time of short-circuit, the level can be detected without being affected by the reception signal level before the short-circuit.

A communication method according to claim 31 is characterized in that a level detection step for detecting a signal level, a peak hold output generation step for holding a spire value of the level detection means, and a charging operation for the peak hold output generation step. A charging time constant setting process in which the constant is a predetermined time constant; a discharging time constant setting process in which the discharge time constant in the peak hold output generating process is a predetermined time constant; and an integration for integrating the output of the peak hold output generating process. A configuration having a process and a level detection process for detecting a level of a communication signal using each process is employed.

Therefore, according to the communication method of the present invention, even when a modulated wave having an envelope fluctuation is transmitted, the communication level can be accurately detected and high quality communication can be executed.

According to a thirty-second aspect of the present invention, the level detection step of the communication method according to the thirty-first aspect is performed at a stage before transmitting a communication signal or at a stage after receiving a communication signal.

Therefore, according to the communication method described in claim 32, it is possible to accurately detect the communication level in any of the transmitting device and the receiving device and execute high-quality communication.

Next, a level detection circuit, a communication device and a communication method according to an embodiment of the present invention will be described in detail with reference to the drawings. FIGS. 1 to 30 are diagrams for explaining the configurations of a level detection circuit, a communication device, and a communication method according to an embodiment of the present invention. In the following embodiments, a communication device includes a transmission device, a reception device, a wireless terminal device, and the like.

(First Embodiment) FIGS. 1 to 5 show a first embodiment of the present invention. This figure 1
Is a block diagram of a level detection circuit, FIG. 2 is a configuration diagram showing a peak hold circuit having a charge and discharge time constant circuit,
3 to 5 are characteristic diagrams.

The level detection circuit shown in FIG. 1 includes, for example, a level detector 1 that outputs a DC voltage according to the level of an input signal 100, and a peak that holds a spike of the voltage output from the level detector 1. A hold circuit 2, a charge time constant circuit 4 for setting a time constant of charging of the peak hold circuit to a predetermined time constant, a discharge time constant circuit 5 for setting a time constant of discharge of the peak hold circuit to a predetermined time constant, And an integrator 3 for integrating the output of the hold circuit and outputting the level detection signal 101. Note that the level detector 1 is constituted by, for example, a detection diode.

FIG. 2 is a block diagram more specifically showing the peak hold circuit 2 and the charge and discharge time constant circuits 4 and 5. The peak hold circuit 2 includes, for example, a first operational amplifier 7 of an input buffer and a first operational amplifier 7.
And a diode 6 connected to the anode side
And a second operational amplifier 8 serving as an output buffer connected to the cathode side of the diode. The charge and discharge time constant circuits 4 and 5 are connected to the cathode side of the diode 6.

An operation example of the level detection circuit having the above configuration will be described below with reference to the drawings. FIGS. 3 to 5 are diagrams showing the output of each block with respect to the input signal 100 of the level detection circuit shown in FIG.

When the input signal 100 has an envelope fluctuation as shown in FIG. 3, the output of the level detector 1 is as shown in FIG.
As shown in (1), an error occurs from the ideal square detection characteristic.
Therefore, as shown in FIG. 4, an error occurs in the input converted power value of the average voltage of the detection output. However, by performing the waveform shaping shown in FIG. 5 by the peak hold circuit 2, the error of the input converted power value of the output of the integrator 3, that is, the level detection error can be reduced.

The output waveform of the peak hold circuit 2 can be shaped by the charging / discharging time constant, and is charged to minimize the level detection error according to the envelope fluctuation of the input signal and the characteristics of the level detector. Set the discharge time constant. In addition, even when an instantaneous and spike-like peak due to noise occurs in the level detection output as shown in FIG. 4, the influence can be eliminated by the charging time constant circuit 4.

That is, according to the level detection circuit shown in the first embodiment, the detection error of the level detection circuit can be reduced.

(Second Embodiment) FIG. 6 is a block diagram of a level detection circuit according to a second embodiment of the present invention. The level detection circuit shown in FIG.
In this embodiment, the level detector 1 shown in FIG. The operation of the level detection circuit according to the second embodiment of the present configuration will be described below with reference to the drawings.

FIGS. 7 to 9 show the output of each block with respect to the input signal of the level detection circuit shown in FIG. As shown in FIGS. 7 and 8, the logarithmic amplifier 9 outputs a voltage proportional to the logarithmic value of the input signal 100.
A difference occurs between the average converted power of the average power of the input signal 100 and the average value of the output voltage of the logarithmic amplifier. However, waveform shaping is performed by the peak hold circuit 2 as shown in FIG. Thus, the error of the input converted power value of the output of the integrator 3, that is, the level detection error can be reduced. At the same time, the dynamic range of detection can be increased.

That is, according to the level detection circuit shown in the second embodiment, it is possible to reduce the detection error while widening the dynamic range of detection by the level detection circuit.

(Third Embodiment) The third embodiment of the present invention
The level detection circuit according to the second embodiment adopts a configuration in which, for example, a high-frequency attenuator 10 having a temperature sensing element shown in FIG. 10 is arranged at the input of the level detector 1 in FIG. 1 according to the first embodiment. .

High-frequency attenuator 1 having temperature sensing element shown in FIG.
0 is, for example, a thermistor 11 and three fixed resistors 1
2, 12, and 12. The attenuator 10 forms a π-type attenuator by the thermistor 11 and the three resistors 12, and the resistance value of the thermistor 11 changes according to the temperature, and accordingly, the attenuation also changes. The change in the amount of attenuation due to the temperature is set so as to cancel the temperature characteristic of the peak hold circuit, the temperature characteristic of the output of the level detector, or the temperature characteristic of the integrator. As a result, deterioration of the level detection error due to the temperature of the level detection circuit can be reduced.

That is, according to the level detection circuit shown in the third embodiment, the detection error of the level detection circuit can be reduced even when the ambient temperature changes.

(Fourth Embodiment) The fourth embodiment of the present invention
In this embodiment, for example, the attenuator 13 having the temperature sensing element shown in FIG. 11 is arranged at the output of the peak hold circuit 2 in FIG. 1 showing the first embodiment.

The attenuator 13 having the temperature sensing element shown in FIG.
For example, a thermistor 11 and two fixed resistors 12, 12
have. The attenuator 13 divides the voltage of the output of the peak hold circuit by the thermistor 11 and the fixed resistor 12 and outputs the divided voltage. The resistance value of the thermistor 11 changes according to the temperature, and the attenuation due to the voltage division also changes. The change in the amount of attenuation due to the temperature is set so as to cancel the temperature characteristic of the peak hold circuit, the temperature characteristic of the output of the level detector, or the temperature characteristic of the integrator. Thus, it is possible to reduce the deterioration of the level detection error due to the temperature of the level detection circuit. At the same time, since the thermistor is used from the DC after detection to the low frequency region, it can be expected that no error due to the frequency characteristics of the thermistor occurs even when the input signal is a high frequency signal.

That is, according to the level detection circuit shown in the fourth embodiment, even if the ambient temperature changes, the detection error of the level detection circuit can be reduced without deteriorating the frequency characteristics of the level detection. Can be.

(Fifth Embodiment) The fifth embodiment of the present invention
In this embodiment, for example, an amplifier circuit using the operational amplifier shown in FIG. 12 is arranged at the output of the integrator 3 in FIG. The amplifier circuit shown in FIG.
, A thermistor 11 and an operational amplifier 14.

The resistor 12 and the thermistor 11 are used to set the offset voltage of the operational amplifier 14, and the offset voltage changes depending on the temperature. The change in the offset voltage of the amplifier due to the temperature is set so that the temperature characteristic of the peak hold circuit, the temperature characteristic of the output of the logarithmic amplifier, or the temperature characteristic of the integrator are offset in the output of the level detection circuit. Thus, it is possible to reduce the deterioration of the level detection error due to the temperature of the level detection circuit.
At the same time, since the offset voltage is changed with temperature, the slope of the input / output characteristics of the level detection circuit can be made constant as shown in FIG. For this reason,
A wide dynamic range can be maintained.

That is, according to the level detection circuit shown in the fifth embodiment, the detection error of the level detection circuit can be reduced even when the ambient temperature changes, while expanding the dynamic range of detection by the level detection circuit. can do.

(Sixth Embodiment) The sixth embodiment of the present invention
In the embodiment, for example, the integrator 3 in FIG. 6 is configured as an integration circuit using the operational amplifier shown in FIG.

The integrating circuit shown in FIG. 13 has, for example, a resistor 12, a thermistor 11, and an operational amplifier 14. The offset voltage of the operational amplifier in FIG. 13 shows the same operation as in the fifth embodiment. As a result, the offset voltage of the operational amplifier of the integration circuit is changed with the temperature, so that the integration and the temperature compensation can be performed at once by one operational amplifier.

That is, according to the level detection circuit shown in the sixth embodiment, it is possible to reduce the detection error of the level detection circuit even when there is a change in the ambient temperature while realizing miniaturization of the circuit scale. Can be.

(Seventh Embodiment) The seventh embodiment of the present invention
In the embodiment, for example, an amplifier circuit using the operational amplifier shown in FIG. 14 is arranged at the output of the integrator 3 in FIG.

The amplifier circuit shown in FIG. 14 has, for example, a resistor 12, a second diode 15, and an operational amplifier 14. The forward voltage Vf of the diode 15 changes depending on the temperature. The second diode 15 in FIG. 14 is the same as the diode 6 used in the peak hold circuit in FIG.
That is, the temperature characteristics of the forward voltage Vf are substantially the same. In FIG. 14, since the second diode 15 is provided in the circuit for setting the offset voltage of the operational amplifier, the temperature characteristic of the level detection circuit based on the temperature characteristic of the forward voltage Vf of the diode 6 in the peak hold circuit is shown in FIG. The circuit can accurately cancel each other out.

That is, according to the level detection circuit shown in the seventh embodiment, even when the ambient temperature changes, the detection error of the level detection circuit can be reduced.

(Eighth Embodiment) The eighth embodiment of the present invention
In this embodiment, for example, an amplifying circuit using an operational amplifier shown in FIG. 14 is used as an integrating circuit, and the integrator 3 shown in FIG.
The configuration shown in FIG.

That is, according to the level detection circuit shown in the eighth embodiment, the detection error of the level detection circuit can be reduced even when there is a change in the ambient temperature, while realizing the miniaturization of the circuit scale. Can be.

(Ninth Embodiment) FIG. 15 is a block diagram of a level detection circuit according to a ninth embodiment of the present invention. The level detection circuit shown in FIG. 15 includes, for example, an input signal 100, a level detector 1, a peak hold circuit 2, an integrator 3, a charge time constant circuit 4 for peak hold, and a discharge time constant circuit 5 for peak hold. And a changeover switch 16 connected in series with the discharge time constant circuit 5. The changeover switch 16 corresponds to, for example, an analog switch. Thereby, the time constant of the discharge can be released by selecting the switching of the energization / opening of the changeover switch 16 according to the switching signal from the outside.

According to the level detection circuit shown in FIG. 15, the level detection error due to the envelope fluctuation of the input signal 100 can be reduced as shown in the first to eighth embodiments. Further, when the changeover switch 16 is opened during a time period when the input signal 100 is not present, the output value of the peak hold circuit 2 during a time period when the input signal 100 is present can be held. Therefore, the input signal 100 occurs in a burst, and the input signal 100
.., Tn, Tn
Even when +1 is repeated, the switch 16 is turned on / off in accordance with the presence or absence of the input signal 100,
The output is integrated by an integrator. As a result, as if the level detection output was integrated for the times T1, T3,.
An output 101 of the level detection circuit can be obtained.

That is, according to the level detection circuit shown in the ninth embodiment, the input signal 100
Also, the detection error of the level detection circuit can be reduced.

(Tenth Embodiment) In a tenth embodiment of the present invention, for example, the discharge time constant circuit of FIG. 1 is configured as a circuit shown in FIG.

The discharge time constant circuit shown in FIG.
It has a peak hold discharge time constant circuit 5 and a changeover switch 16 connected in parallel with the discharge time constant circuit 5.
Thus, the changeover switch 1 is activated by an external changeover signal.
By selecting the switching of energization / opening of 6, the discharge time constant can be short-circuited and the peak hold circuit can be reset.

According to the level detection circuit having the above configuration, the level detection error due to the envelope fluctuation of the input signal 100 can be reduced as shown in the first to eighth embodiments. Further, when the input signal is TDMA (Time
In the case of a time division signal such as Division Multiple Access (time division multiple access system), the changeover switch 16 is short-circuited in accordance with the time slot. Thus, the signal level in each time slot can be accurately detected.

That is, according to the level detection circuit shown in the tenth embodiment, even in the time-division input signal,
The detection error of the level detection circuit can be reduced.

(Eleventh Embodiment) In an eleventh embodiment of the present invention, for example, the discharge time constant circuit of FIG. 1 is configured as a circuit shown in FIG.

The discharge time constant circuit shown in FIG.
It has a discharging resistor R1, a changeover switch 16 connected in parallel with the resistor R1, and a resistor R2 connected in series with the changeover switch 16. Thus, by selecting the energization / opening of the changeover switch by the changeover signal from the outside, the resistance value of the discharge time constant circuit is set to R1 and R1 × R
2 / (R1 + R2), that is, the time constant of discharge can be switched.

According to the level detection circuit having the above configuration, the discharge time constant can be switched according to the envelope fluctuation of the input signal 100. For this reason, for example, even for input signals of different types of envelopes, the detection error can be reduced.

That is, according to the level detection circuit shown in the eleventh embodiment, the detection error of the level detection circuit can be reduced even for input signals of different types of envelope.

(Twelfth Embodiment) In a twelfth embodiment of the present invention, for example, the charging time constant circuit of FIG. 1 is configured as a circuit shown in FIG.

The charge time constant circuit shown in FIG.
It has a charging resistor R3, a changeover switch 16 connected in parallel with the resistor R3, and a resistor R4 connected in series with the changeover switch 16. Thus, the resistance value of the charging time constant circuit is set to R3 and R3 by selecting the energization / opening of the changeover switch 16 according to an external changeover signal.
× R4 / (R3 + R4), that is, the charging time constant can be switched.

According to the level detection circuit having the above configuration, the charging time constant can be switched in accordance with the envelope fluctuation of the input signal 100. For this reason, for example, even for input signals of different types of envelopes, the detection error can be reduced.

That is, according to the level detection circuit shown in the twelfth embodiment, the detection error of the level detection circuit can be reduced even for a plurality of types of input signals having different envelopes.

(Thirteenth Embodiment) In a thirteenth embodiment of the present invention, for example, the discharge time constant circuit of FIG. 1 is configured as a circuit shown in FIG.

The discharge time constant circuit shown in FIG.
It has a variable current source 17. The variable current source 17
The current value can be varied by an external control signal. This makes it possible to change the discharge time constant by changing the current value of the constant current source in response to an external control signal.

According to the level detection circuit having the above configuration, the discharge time constant can be switched in accordance with the envelope fluctuation of the input signal 100. With this configuration, for example, detection errors can be reduced even for a plurality of types of input signals having different envelopes.

That is, according to the level detection circuit shown in the thirteenth embodiment, the detection error of the level detection circuit can be reduced even for a plurality of types of input signals having different envelopes.

(Fourteenth Embodiment) FIG. 20 is a block diagram of a transmitting apparatus according to a fourteenth embodiment of the present invention.

The transmission apparatus shown in FIG. 20 comprises, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, a transmission circuit 18 and a variable gain amplifier 19
, An amplifier 20, and a control unit 21. The transmission circuit 18 corresponds to, for example, a transmission circuit that modulates transmission data with a carrier wave and outputs a modulated transmission signal.

The variable gain amplifier 19 corresponds to, for example, a variable gain amplifier whose gain amount can be changed by the gain control signal 22. The amplifier 20 corresponds to, for example, a power amplifier that amplifies a transmission signal up to a required transmission output. The control unit 21 controls, for example, the entire transmission device, and has a function of reading the level detection output 101 and a function of outputting the gain control signal 22.

The transmission signal output from the transmission circuit 18 is
The signal is amplified by the variable gain amplifier 19 and the amplifier 20 and output from the transmission device. The transmission signal obtained by power-dividing the output of the amplifier 20 at a fixed ratio is a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, and a peak hold discharge time constant circuit 5. And the level detection output 1
01 is input to the control unit 21.

The control section 21 stores in advance the voltage value of the level detection output 101 at the desired transmission output level. The control unit 21 controls the gain control signal 22 so that the voltage value of the level detection output 101 becomes a value corresponding to the desired transmission output level. Thus, the level of the transmission signal is detected using the level detection circuit, and the transmission power is controlled using the result. For this reason, even if the transmission signal has an envelope fluctuation, it is possible to realize a transmission device with high output level accuracy.

That is, according to the transmitting apparatus shown in the fourteenth embodiment, the accuracy of the output level can be increased even when the transmission signal has an envelope fluctuation.

(Fifteenth Embodiment) In a fifteenth embodiment of the present invention, for example, the transmitting circuit 18 of the transmitting apparatus shown in FIG. 20 transmits a code division multiplexed signal.

A transmitting circuit for transmitting a code division multiplex signal is
For example, it has a code division multiplexed signal generator using spread spectrum shown in FIG. The envelope of the transmission signal greatly differs depending on the multiplex number as shown in FIG.

FIG. 21 shows a case where n = 2 and n = 15.
The output form of the 0 level detection circuit is shown. The envelope fluctuation as shown in FIG. 36 is logarithmically detected by a logarithmic amplifier 9, shaped by a peak hold circuit 2 having charge and discharge time constants 4 and 5, and then smoothed by an integrator 3 and output. You. Thereby, the time constants of the discharge and the charge are optimized and set so that the error after integration becomes small. This allows the envelope to be unaffected by dips and peaks,
A level detection output 101 corresponding to the average power of the transmission signal can be obtained.

The control section 21 stores in advance the voltage value of the level detection output 101 at the desired transmission output level. The control unit 21 controls the gain control signal 22 so that the voltage value of the level detection output 101 becomes a value corresponding to the desired transmission output level. Thus, the level of the transmission signal is detected using the level detection circuit, and the transmission power is controlled using the result. Because we did this,
Even when the transmission signal is a code division multiplexed signal, it is possible to realize a transmission device with high output level accuracy.

That is, according to the transmitting apparatus shown in the fifteenth embodiment, even when the transmission signal is a code division multiplexed signal, the accuracy of the output level can be increased.

(Sixteenth Embodiment) FIG. 22 is a block diagram of a transmitting apparatus according to a sixteenth embodiment of the present invention. 22 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, a changeover switch 16, A transmission circuit 18,
It has a variable gain amplifier 19, an amplifier 20, and a control unit 21.

The changeover switch 16 switches the time constant of the charging time constant circuit 4, for example. The changeover switch 16 performs a changeover operation according to, for example, a time constant changeover signal 24 output from the control unit 21. The transmission circuit 18 transmits a code division multiplex signal. The transmission circuit 18 outputs a multiplex number information signal 23 indicating the multiplex number of codes to the control unit 21. The peak value of the code division multiplexed signal with respect to the average power of the envelope tends to increase as the number of multiplexed signals increases. Therefore, even if the time for maintaining the peak value is relatively short, the level detection error component due to the peak hold may be large.

However, in the above configuration, the control unit 21
When the multiplex number of the code of the transmission signal obtained from the multiplex number information signal 23 exceeds a predetermined threshold value, the time constant of the charging is switched by the time constant switching signal 24 to be increased. Therefore, as shown in FIG. 23, even if the number of multiplexes changes, the level detection error can be reduced.

That is, according to the transmission apparatus shown in the sixteenth embodiment, even when the transmission signal is a code division multiplexed signal, the accuracy of the output level can be increased.

(Seventeenth Embodiment) In a seventeenth embodiment of the present invention, for example, in the transmitting apparatus shown in FIG. 22, the changeover switch 16 switches the time constant of charging. At the same time, the transmission circuit 18 is configured to output the spread rate information signal of the transmission signal to the control unit 21.

In FIG. 24, the diffusion rate is changed from c to c /
If it changes to 2, the envelope will be different as shown in FIG. However, in the above configuration, the discharge time constant is switched according to the diffusion rate. For this reason, even when the time during which the envelope falls due to the diffusion rate changes, the level detection output 101 can be kept constant.

That is, according to the transmission apparatus shown in the seventeenth embodiment, even when the transmission signal is a code division multiplexed signal, the accuracy of the output level can be increased.

(Eighteenth Embodiment) FIG. 25 is a block diagram of a transmitting apparatus according to an eighteenth embodiment of the present invention.

The transmitting apparatus shown in FIG. 25 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, 1 transmission circuit 25, second transmission circuit 26, first variable gain amplifier 27, second variable gain amplifier 28, first directional coupler 29, second directional coupler 30, transmission circuit selection Switch 31 and amplifier 2
0 and a control unit 21.

The first transmission circuit 25 and the second transmission circuit 26
For example, it outputs transmission signals of different modulation modes. The first variable gain amplifier 27 and the second variable gain amplifier 28 include a first transmission circuit 25 and a second transmission circuit 26, respectively.
Corresponds to a variable gain amplifier for amplifying the output of Amplifier 2
0 corresponds to a power amplifier for amplifying a transmission signal from the output of the first variable gain amplifier 27 to a required transmission output. The first directional coupler 29 and the second directional coupler 30 each correspond to a directional coupler that branches transmission signals of different modulation modes into a transmission output and a level detection circuit.

The transmission circuit selection changeover switch 31 is connected to the first
This corresponds to a high-frequency switch that selects the outputs of the directional coupler 29 and the second directional coupler 30 and outputs a transmission signal. The control unit 21 has, for example, a function of reading the level detection output 101, and a function of outputting the first gain control signal 32 and the second gain control signal 33. The transmission signal output from the first transmission circuit 25 or the second transmission circuit 26 is
A modulation mode system that is amplified by the first variable gain amplifier 27 and the amplifier 20 or the second variable gain amplifier 28 and performs a transmission operation is selected by the transmission circuit selection switch 31 and output from the transmission device.

The transmission signal branched by the first directional coupler 29 or the second directional coupler 30 is supplied to a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, and a peak hold charge time constant circuit 4. And discharge time constant circuit 5 for peak hold
, And the level detection output 101 is input to the control unit 21.

The control section 21 stores in advance the voltage value of the level detection output 101 at the desired transmission output level. The control unit 21 controls the first gain control signal 32 or the second gain control signal 33 so that the voltage value of the level detection output 101 becomes a value corresponding to the desired transmission output level.
Control.

According to the above configuration, in a transmitting apparatus that transmits different modulation modes, the transmission output is detected by using the level detection circuit, and the transmission power is controlled using the result. Thereby, even in a plurality of modulation modes in which the envelope fluctuation of the transmission signal is different, it is possible to realize a transmission device with high accuracy of each output level.

That is, according to the transmitting apparatus shown in the eighteenth embodiment, even when transmitting a plurality of different modulation modes, the accuracy of the output level can be increased.

(Nineteenth Embodiment) The nineteenth embodiment of the present invention relates to, for example, the first embodiment of the transmitting apparatus shown in FIG.
It is assumed that the difference in the degree of coupling between the directional coupler 29 and the second directional coupler 30 corresponds to the difference between the maximum transmission outputs of the transmission devices in the respective modulation modes.

For example, when the transmission signal of the first transmission circuit is amplified and output at a maximum of +30 [dBm], and the transmission signal of the second transmission circuit is amplified and output at a maximum of +10 [dBm], the difference is 20. [DBm]. Here, the degree of coupling of the first directional coupler 29 to the level detection circuit is -30 [d
B], the degree of coupling of the second directional coupler 30 is -10 [dB].
Then, in any of the transmission signals, the input power to the level detection circuit at the time of the maximum transmission output is 0 [dBm]. As a result, even when there is a difference in the maximum transmission output between different modulation modes, the same level detection circuit input can be obtained. Therefore, the dynamic range of the level detection circuit can be minimized.

That is, according to the transmitting apparatus shown in the nineteenth embodiment, when transmitting a plurality of different modulation modes, it is possible to increase the accuracy of the output level even when there is a difference in the maximum transmission power. it can.

(Twentieth Embodiment) In a twentieth embodiment of the present invention, for example, the level detection circuit of the transmitting apparatus shown in FIG. 20 has the configuration shown in FIG. The changeover switch 16 is opened when there is no transmission signal, and the value of the peak hold is held.

According to this, for example, when a transmission signal is output in a burst, the changeover switch 16 is energized while the transmission signal is present, and the changeover switch 1 is turned on when there is no transmission output.
By releasing 6, the level of the burst transmission signal immediately before it can be held in a time zone when there is no transmission signal. For this reason, if the time constant of the integration of the integrator 3 is made sufficiently large as compared with the burst interval, the level detection output 1 obtained by averaging the levels of the burst transmission signals at the integrator 3 output
01 can be obtained, and even when the control section 21 samples the level detection output with the AD converter, the level detection can be accurately performed with small sampling.

That is, according to the transmitting apparatus shown in the twentieth embodiment, the accuracy of the output level can be increased even for a burst transmission signal.

(Twenty-First Embodiment) In a twenty-first embodiment of the present invention, for example, the level detection circuit of the transmitting apparatus of FIG. 20 has a configuration shown in FIG. The switch 16 is energized during a time when there is no transmission signal to reset the peak hold value.

According to this, for example, when a burst and a transmission signal and a guard time without a transmission signal are repeatedly output, the changeover switch 16 is opened for a time when the transmission signal is present, and the guard time when there is no transmission output is output. By turning on the changeover switch 16, it is possible to reset the peak hold voltage at which the immediately preceding burst transmission signal was detected during the guard time. Therefore, if the time constant of the integration of the integrator 3 is set to be equal to or less than the burst interval, the integrator 3
As the output, a level detection output 101 obtained by averaging the levels of the burst transmission signals can be obtained, and the level can be detected accurately without being affected by the immediately preceding burst transmission signal.

That is, according to the transmitting apparatus shown in the twenty-first embodiment, the accuracy of the output level can be increased even in a burst transmission signal.

(Twenty-second Embodiment) FIG. 26 is a block diagram of a receiving apparatus according to a twenty-second embodiment of the present invention. 26 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, and a reception circuit 40. have.

The receiving circuit 40 corresponds to, for example, a receiving circuit for demodulating a modulated received signal, and includes a low noise amplifier 41, a mixer 42, and a band limiting filter 43. The received signal input to the receiving device is amplified by the low noise amplifier 41 and then frequency-converted by the mixer 42.
An unnecessary reception component is suppressed by the band limiting filter 43.

The reception signal obtained by branching the output of the band limiting filter 43 is supplied to the logarithmic amplifier 9, the peak hold circuit 2,
A level detection circuit composed of an integrator 3, a peak-hold charge time constant circuit 4 and a peak-hold discharge time constant circuit 5 is input to obtain a level detection output 101.

Thus, the level of the received signal is detected by using the level detection circuit, so that a receiving apparatus capable of accurately detecting the level of the received signal even when the received signal has an envelope fluctuation is realized. be able to.

That is, according to the receiving apparatus shown in the twenty-second embodiment, the level of a received signal can be accurately detected even when the received signal has an envelope fluctuation.

(Twenty-third Embodiment) In the twenty-third embodiment of the present invention, for example, the receiving circuit 40 of the receiving apparatus shown in FIG. 26 receives a code division multiplexed signal.

Receiving circuit 40 for receiving a code division multiplexed signal
Receives, for example, a code division multiplexed signal using spread spectrum, despreads, and demodulates. The envelope of the received signal greatly differs depending on the multiplex number as shown in FIG.

FIG. 21 shows a case where n = 2 and n = 15.
The state of the output of the 0 level detection circuit is shown. The envelope fluctuation as shown in FIG. 36 is logarithmically detected by a logarithmic amplifier 9, shaped by a peak hold circuit 2 having charge and discharge time constants 4 and 5, and then smoothed and output by an integrator 3. You. As a result, by setting the time constant of discharge and charge so as to optimize the error after integration, the level detection output according to the average power of the received signal is not affected by the drop or peak of the envelope. 101 can be obtained.

As a result, the level of the received signal is detected by using the level detection circuit. Therefore, even when the received signal is a code division multiplexed signal, a receiving apparatus capable of accurately detecting the level of the received signal is realized. can do.

That is, according to the receiving apparatus shown in the twenty-third embodiment, even when the received signal is a code division multiplexed signal, the level of the received signal can be accurately detected.

(Twenty-fourth Embodiment) FIG. 27 is a block diagram of a receiving apparatus showing a twenty-fourth embodiment of the present invention.

The receiving apparatus shown in FIG. 27 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, and a switch. Switch 16 and receiving circuit 40
And a control unit 21.

The receiving circuit 40 corresponds to, for example, a receiving circuit which receives a code division multiplexed signal using spread spectrum, performs despreading according to different spreading rates, and demodulates the signal. 41, a mixer 42,
And a band limiting filter 43.

The changeover switch 16 switches the time constant of the discharge time constant circuit 5, for example. The changeover switch 16 performs a changeover operation according to, for example, a time constant changeover signal 24 output from the control unit 21. The control unit 21 knows the spread rate of the received signal and outputs a time constant switching signal 24 according to the rate.

When the diffusion rate changes from c to c / 2, the envelope is different as shown in FIG. 24. However, in the above configuration, the discharge time constant is switched according to the diffusion rate. Even when the time during which the envelope falls depends on the rate, the level detection output 101
Can be kept constant.

That is, according to the receiving apparatus shown in the twenty-fourth embodiment, even when the received signal is a code division multiplexed signal, the level of the received signal can be accurately detected.

(Twenty-Fifth Embodiment) FIG. 28 is a block diagram of a receiving apparatus showing a twenty-fifth embodiment of the present invention.

The receiver shown in FIG. 28 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, It has a first receiving circuit 44 and a second receiving circuit 45.

The first receiving circuit 44 and the second receiving circuit 45
For example, received signals in different modulation modes are received and demodulated respectively. The first receiving circuit 44 has a first low noise amplifier 46, a first mixer 48, and a first band limiting filter 50. The second receiving circuit 45 has a second low noise amplifier 47, a second mixer 49, and a second band limiting filter 51.

According to the above configuration, in the receiving apparatus that receives different modulation modes, the level of the received signal is detected by the level detection circuit. It is possible to realize a receiving device that can accurately detect a signal level.

That is, according to the receiving apparatus shown in the twenty-fifth embodiment, even when receiving a plurality of different modulation modes, the level of the received signal can be accurately detected.

(Twenty-Sixth Embodiment) In a twenty-sixth embodiment of the present invention, for example, the level detection circuit of the receiving apparatus shown in FIG. 27 is configured as shown in FIG.

The changeover switch 16 is opened when there is no received signal, and the value of the peak hold is held. According to this, for example, when a burst received signal is input, the changeover switch 16 is energized during a time when there is a received signal, and the changeover switch 16 is opened during a time when there is no received output, so that a time period when there is no received signal is obtained. Can hold the level of the burst reception signal immediately before. Therefore, if the time constant of the integration of the integrator 3 is made sufficiently large as compared with the burst interval, the level detection output 101 obtained by averaging the levels of the respective burst reception signals can be obtained from the output of the integrator 3. Further, even when the level detection output is sampled by the AD converter in the control unit 21, the level detection can be accurately performed with a small number of samplings.

That is, according to the receiving apparatus shown in the twenty-sixth embodiment, the level of a received signal can be detected accurately even in a burst received signal.

(Twenty-Seventh Embodiment) In a twenty-seventh embodiment of the present invention, for example, the discharge time constant circuit 5 of the receiving apparatus shown in FIG. 27 is configured as shown in FIG.

The change-over switch 16 is energized during a time when there is no reception signal, and the value of the peak hold is reset. According to this, for example, when a burst received signal and a guard time without a received signal are repeatedly input, the changeover switch 16 is opened for a certain time of the received signal,
The time of the guard time when there is no reception input is changed by the changeover switch 16
, The peak hold voltage at which the burst received signal immediately before the guard time is detected in the guard time can be reset. Therefore, if the time constant of the integration of the integrator 3 is set to be equal to or less than the burst interval, the output of the integrator 3 can obtain the level detection output 101 obtained by averaging the levels of the respective burst reception signals. Level detection can be accurately performed without being affected by the above.

That is, according to the receiving apparatus shown in the twenty-seventh embodiment, the level of a received signal can be accurately detected even in a burst received signal.

(Twenty-eighth Embodiment) FIG. 29 is a block diagram of a wireless terminal apparatus according to a twenty-eighth embodiment of the present invention. 29 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a charge time constant circuit 4 for peak hold, a discharge time constant circuit 5 for peak hold, a changeover switch 16, , Antenna 5
2, a duplexer 53, a transmitting circuit 54, and a receiving circuit 55.

The receiving circuit 55 includes a low-noise amplifier 41, a mixer 42, a high-frequency switch 59, a first band limiting filter 50, a first demodulating unit 56, a second band limiting filter 51, and a second demodulating unit 57. And a function of demodulating a plurality of received signals of different modulation modes.

After the received signal received by the antenna 52 is amplified and frequency-converted, the high-frequency switch 59 selects a demodulator in a mode corresponding to the received signal, and the first band-limiting filter 50 or the second band-limiting filter. The band is limited at 51 and demodulated. The output of the band limiting filter is branched and input to the logarithmic amplifier 9 where the level is detected.

According to the above configuration, the level of the received signal is detected by the level detection circuit in the radio terminal device transmitting and receiving different modulation modes. By doing so, even when there is a difference in the envelope fluctuation in the modulation mode,
A wireless terminal device that can accurately detect the level of a received signal can be realized. It is needless to say that the transmission output can be accurately detected if the output of the transmission circuit is detected by the level detection circuit.

That is, according to the radio terminal apparatus shown in the twenty-eighth embodiment, the level of a transmission or reception signal can be detected with high accuracy. (29th embodiment) FIG. 30 shows a second embodiment of the present invention.
It is a block diagram of the wireless base station apparatus which shows Embodiment 9 of this invention. The radio base station apparatus shown in FIG. 30 includes, for example, a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, a peak hold discharge time constant circuit 5, and a variable gain. Amplifier 19 and Amplifier 20
, The control unit 21, the antenna 52, and the antenna duplexer 5.
3 and a receiving circuit 58.

The transmitting circuit 18 corresponds to, for example, a transmitting circuit for transmitting a code division multiplexed signal. The receiving circuit 58 corresponds to, for example, a receiving circuit that receives a code division multiplexed signal. The transmission signal output from the transmission circuit 18 is amplified by the variable gain amplifier 19 and the amplifier 20 and output from the antenna 52 via the antenna sharing device 53. Amplifier 2
A transmission signal obtained by power-dividing the output of 0 at a constant ratio is supplied to a logarithmic amplifier 9, a peak hold circuit 2, an integrator 3, a peak hold charge time constant circuit 4, and a peak hold discharge time constant circuit 5. The signal is input to the configured level detection circuit, and the level detection output 101 is input to the control unit 21.

The control section 21 stores in advance the voltage value of the level detection output 101 at the desired transmission output level. The control unit 21 controls the gain control signal 22 so that the voltage value of the level detection output 101 becomes a value corresponding to the desired transmission output level.

Thus, the level of the transmission signal is detected by using the level detection circuit, and the transmission power is controlled using the result. Therefore, even when the transmission signal is a code division multiplexed signal, the output level That is, a radio base station apparatus with high antenna power accuracy can be realized. Needless to say, if a level detection circuit is provided in the receiving circuit to detect the level of the received signal, the received signal level can be accurately detected.

That is, according to the radio base station apparatus shown in the twenty-ninth embodiment, it is possible to accurately detect the level of a transmission or reception signal.

The above embodiment is a preferred example of the present invention. However, the present invention is not limited to this, and various modifications can be made without departing from the scope of the present invention.

[0209]

As apparent from the above description, according to the present invention, the level of a signal is detected, and the spire value of the detected signal is held. In this holding, the charge and discharge time constants are integrated as a predetermined time constant.

Thus, the detection error of the level detection circuit can be reduced. Furthermore, by applying, the detection error is reduced while widening the dynamic range of the detection of the level detection circuit, and the detection error of the level detection circuit is reduced even when there is a change in the ambient temperature, so that the frequency characteristic of the level detection is not deteriorated. The detection error of the level detection circuit can be reduced as it is, the circuit size can be reduced, and it can be applied to an input signal generated in a burst manner, and various applications can be expanded.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a level detection circuit according to a first embodiment of the present invention;

FIG. 2 is a configuration diagram showing a peak hold circuit including a time constant circuit;

FIG. 3 is an input signal envelope variation diagram showing the operation of the first embodiment;

FIG. 4 is a diode output fluctuation diagram showing the operation of the first embodiment.

FIG. 5 is a peak hold output fluctuation diagram showing the operation of the first embodiment.

FIG. 6 is a configuration diagram illustrating a level detection circuit according to a second embodiment;

FIG. 7 is an input signal envelope variation diagram showing the operation of the second embodiment.

FIG. 8 is a logarithmic amplifier output fluctuation diagram showing the operation of the second embodiment.

FIG. 9 is a peak hold output fluctuation diagram showing the operation of the second embodiment.

FIG. 10 is a configuration diagram illustrating a high-frequency attenuator used in a third embodiment.

FIG. 11 is a configuration diagram showing an attenuator used in a fourth embodiment.

FIG. 12 is a configuration diagram showing an amplifier used in a fifth embodiment.

FIG. 13 is a configuration diagram showing an integrator used in a sixth embodiment.

FIG. 14 is a configuration diagram showing an amplifier used in a seventh embodiment.

FIG. 15 is a configuration diagram illustrating a level detection circuit according to a ninth embodiment;

FIG. 16 is a configuration diagram showing a discharge time constant circuit according to a tenth embodiment.

FIG. 17 is a configuration diagram showing a discharge time constant circuit according to an eleventh embodiment.

FIG. 18 is a configuration diagram showing a charging time constant circuit according to a twelfth embodiment.

FIG. 19 is a configuration diagram showing a discharge time constant circuit according to a thirteenth embodiment.

FIG. 20 is a configuration diagram illustrating a transmission device according to a fourteenth embodiment.

FIG. 21 is a time response diagram of the output voltage of the peak hold circuit showing the operation of the fifteenth embodiment.

FIG. 22 is a configuration diagram illustrating a transmission device according to a sixteenth embodiment.

FIG. 23 is a diagram illustrating a detection error according to the sixteenth embodiment;

FIG. 24 is a time response diagram of the output voltage of the peak hold circuit showing the operation of the seventeenth embodiment.

FIG. 25 is a configuration diagram illustrating a transmission device according to an eighteenth embodiment.

FIG. 26 is a configuration diagram showing a receiving device according to a twenty-second embodiment.

FIG. 27 is a configuration diagram showing a receiving device according to a twenty-fourth embodiment.

FIG. 28 is a diagram illustrating a configuration of a reception device according to a twenty-fifth embodiment.

FIG. 29 is a configuration diagram illustrating a wireless terminal device according to a twenty-eighth embodiment.

FIG. 30 is a configuration diagram illustrating a wireless terminal device according to a twenty-ninth embodiment.

FIG. 31 is a configuration diagram showing a conventional diode detection circuit.

FIG. 32 is an input / output characteristic diagram of a conventional general diode detection circuit.

FIG. 33 is a configuration diagram showing a conventional level detection circuit using a logarithmic amplifier.

FIG. 34 is an input / output characteristic diagram of a conventional general logarithmic amplifier.

FIG. 35 is a configuration diagram showing a conventional code division multiplexed signal generation unit using spread spectrum.

FIG. 36 is a diagram illustrating an example of envelope fluctuation of a code division multiplexed signal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Level detector 2 Peak hold circuit 3 Integrator 4 Charge time constant circuit 5 Discharge time constant circuit 6 Diode 7 1st operational amplifier 8 2nd operational amplifier 9 Logarithmic amplifier 10 High frequency attenuator having a temperature sensitive element 11 Thermistor 12 Resistor 13 Attenuator having a temperature-sensitive element (voltage division) 14 Operational amplifier 15 Second diode 16 Changeover switch 17 Variable constant current source 18 Transmission circuit 19 Variable gain amplifier 20 Amplifier 21 Control unit 22 Gain control signal 23 Multiplex information signal 24:00 Constant switching signal 25 First transmission circuit 26 Second transmission circuit 27 First variable gain amplifier 28 Second variable gain amplifier 29 First directional coupler 30 Second directional coupler 31 Transmission circuit selection switch 32 First gain Control signal 33 second gain control signal 40 receiving circuit 41 low noise amplifier 42 mixer 43 band Band limiting filter 44 First receiving circuit 45 Second receiving circuit 46 First low noise amplifier 47 Second low noise amplifier 48 First mixer 49 Second mixer 50 First band limiting filter 51 Second band limiting filter 52 Antenna 53 Common antenna Unit 54 transmission circuit 55 reception circuit 56 first demodulation unit 57 second demodulation unit 58 code division multiplexed signal reception circuit 59 high frequency switch 100 input signal 101 level detection signal 102 diode 103 integrator 104 logarithmic amplifier 105 input signals 1 to n 106 1 Secondary spread signal generators 1 to n 107 Primary spreaders 1 to n 108 Multiplexer 109 Secondary spread signal generator 110 Secondary spreader 111 Band limiting filter

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Naoki Matsubara 4-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. No.3-1, Matsushita Communication Industrial Co., Ltd. F-term (Reference) 5K022 EE03 5K042 AA06 BA10 CA02 CA11 CA12 CA13 DA16 DA19 EA01 FA01 FA11 GA01 GA13 JA01 LA06 5K060 CC04 CC12 HH06 HH31 HH39 JJ02 JJ04 JJ06 LL01 BB12 CCB DD04 JJ09 JJ11 JJ24

Claims (32)

[Claims] 1. A level detecting means for detecting a level of a signal, a peak hold output generating means for holding a peak value of the level detecting means, and a charging time constant of the peak hold output generating means is a predetermined time constant. A charge time constant circuit, a discharge time constant circuit that sets a time constant of discharge of the peak hold output generation means to a predetermined time constant, and an integration means for integrating an output of the peak hold output generation means. Characteristic level detection circuit. 2. The level detection circuit according to claim 1, wherein said level detection means includes a diode. 3. The level detecting circuit according to claim 1, wherein said level detecting means is a logarithmic amplifier. 4. The level detection circuit according to claim 1, wherein said level detection circuit further includes a temperature-sensitive element whose characteristics change with temperature. 5. The apparatus according to claim 1, further comprising an attenuating means for attenuating an input signal at a stage preceding said level detecting means, wherein said attenuating means is constituted by applying a temperature-sensitive element whose resistance value changes with temperature. Item 5. The level detection circuit according to Item 4. 6. The apparatus according to claim 1, further comprising an attenuating means for attenuating an output of said peak hold output generating means, wherein said attenuating means is constituted by applying a temperature-sensitive element whose resistance value changes with temperature. 4. The level detection circuit according to 4. 7. The integrator is configured by an operational amplifier that amplifies an output signal, and a bias circuit that determines an offset voltage of the operational amplifier is configured by applying a temperature-sensitive element whose resistance value changes with temperature to a bias circuit. The level detection circuit according to claim 4, wherein 8. The apparatus according to claim 4, wherein said integrating means is constituted by using an operational amplifier, and a temperature-sensitive element whose resistance value changes with temperature is applied to a bias circuit for determining an offset voltage of said operational amplifier. Level detection circuit. 9. A method according to claim 1, wherein said peak hold output generating means includes
, An operational amplifier for amplifying an output signal to the integrating means, and a second diode having a temperature characteristic substantially the same as that of the first diode for a bias circuit for determining an offset voltage of the operational amplifier. The level detection circuit according to claim 4, wherein 10. A temperature characteristic of the first diode constituting the peak hold output generating means, an operational amplifier constituting the integrating means, and a bias circuit for determining an offset voltage of the operational amplifier are substantially the same as those of the diode. The level detection circuit according to claim 4, further comprising a second diode. 11. The level detection circuit according to claim 1, further comprising switch means for opening a discharge time constant circuit of said peak hold output generation means. 12. The level detection circuit according to claim 1, further comprising reset means for short-circuiting a discharge time constant circuit of said peak hold output generation means. 13. The level detection circuit according to claim 1, further comprising switch means for switching a time constant of a discharge time constant circuit of said peak hold output generation means. 14. The level detection circuit according to claim 1, further comprising switch means for switching a time constant of a charging time constant circuit of said peak hold output generation means. 15. The level detecting circuit according to claim 1, further comprising a time constant varying means for setting a time constant of a discharge time constant circuit of said peak hold output generating means to an arbitrary value. 16. A communication circuit for transmitting or receiving a modulated wave signal, detecting a level of the modulated wave signal, peak-holding the detected spire value with a predetermined charge / discharge time constant, integrating,
A level detection circuit for detecting a level of the integrated modulated wave signal; 17. The level detection circuit, comprising: a level detection means for detecting a signal level; a peak hold output generation means for holding a spike value of the level detection means; and a time constant for charging the peak hold output generation means. , A discharge time constant circuit for setting the discharge time constant of the peak hold output generation means to a predetermined time constant, and an integration means for integrating the output of the peak hold output generation means. 17. The communication device according to claim 16, comprising: 18. The communication device according to claim 16, wherein the communication circuit communicates a code division multiplex signal. 19. According to the number of multiplexed code division multiplexed signals,
19. The communication according to claim 17, further comprising switch means for switching a time constant of discharging or charging of the peak hold output generating means, or variable time constant means for setting a discharging time constant to an arbitrary value. apparatus. 20. A communication circuit for communicating a direct spreading code division multiplex signal capable of setting a spreading rate or a transmission rate to an arbitrary value, and said peak hold output generating means according to the spreading value or the transmission rate of the arbitrary value. 18. The communication apparatus according to claim 17, further comprising switch means for switching a time constant of discharging or charging, or variable time constant means for setting a time constant of discharging to an arbitrary value. 21. A communication circuit for communicating a plurality of modulation modes different from each other, and a level detection circuit for detecting a communication level of the different modulation mode.
21. The communication device according to any one of claims to 20. 22. A communication circuit for communicating a plurality of different modulation modes, a level detection circuit for detecting a communication level of the different modulation mode, and a maximum communication between the different modulation modes having an attenuation at an input of the level detection circuit. 21. The communication device according to claim 16, further comprising an attenuator corresponding to a difference between outputs. 23. The communication device according to claim 16, wherein a switch means for opening the discharge time constant circuit when the communication output is stopped is operated to open the discharge time constant circuit. . 24. The communication device according to claim 16, wherein reset means for short-circuiting the discharge time constant circuit when the communication output is stopped operates to short-circuit the discharge time constant circuit. . 25. The communication apparatus according to claim 16, further comprising a receiving circuit for receiving the modulated wave signal, and a level detecting circuit for detecting a level of the modulated wave signal. 26. The communication device according to claim 25, wherein said receiving circuit receives a code division multiplexed signal. 27. A receiving circuit for receiving a direct spreading code division multiplex signal capable of setting a spreading rate or a transmission rate to an arbitrary value, and said peak hold output generating means according to said arbitrary value of the spreading rate or the transmission rate. 27. The communication apparatus according to claim 26, further comprising switch means for switching a time constant of discharging or charging, or variable resistance means for setting a time constant of discharging or charging to an arbitrary value. 28. A receiver according to claim 16, further comprising a receiving circuit for receiving a plurality of different modulation modes, and a level detecting circuit for detecting a reception level of the different modulation mode.
21. The communication device according to any one of claims to 20. 29. The communication according to claim 25, wherein a switch means for opening the discharge time constant circuit when no reception signal is input is operated to open the discharge time constant circuit. apparatus. 30. The communication according to claim 25, wherein reset means for short-circuiting the discharge time constant circuit when a reception signal is not input is operated to short-circuit the discharge time constant circuit. apparatus. 31. A level detection step for detecting a signal level, a peak hold output generation step for holding a spire value of the level detection means, and a time constant of charging in the peak hold output generation step as a predetermined time constant. A charging time constant setting step, a discharge time constant setting step in which the discharge time constant of the peak hold output generation step is a predetermined time constant, an integration step of integrating the output of the peak hold output generation step, A level detection step of detecting a level of a communication signal using the step. 32. The communication method according to claim 31, wherein the level detection step is performed before transmitting the communication signal or after receiving the communication signal.