JP2000123509A - Reference clock writing device in magnetic disk - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently write an accurate reference clock in a reference clock writing track after the reference clock is received by generating a reference clock subjected to PLL control according to the control signal of a frequency corresponding to a calculated value corresponding to a clock signal. SOLUTION: An MPU 20 writes the clock signal of a crystal oscillation circuit 7a in the track of a disk 1. Then, by calling a reference clock frequency control program 21b, the number NI of reference clocks is calculated based on a count value Nc and a gap time T. The MPU:20 reads the clock signal written in the disk 1, and writes a reference clock from a programmable clock frequency conversion circuit 11 in the servo surface 2a of a disk 2 together with an index signal from a writing clock generation circuit 13. Verification is made as to whether a count value T is within a permissible range when a count value NC is correct, and a magnetic head 5 is moved to a next reference clock writing track and positioned.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for writing a reference clock to a magnetic disk, and more particularly, to writing a reference clock, reading and verifying the reference clock, and writing an accurate reference clock in a reference clock writing track. The present invention relates to a reference clock writing device for a disk pack or an HDA (hard disk assembly) having a servo surface servo or data surface servo disk capable of efficiently performing the operation.

[0002]

2. Description of the Related Art In a magnetic disk device, for example, a disk pack, a plurality of (n) magnetic disks (hereinafter referred to as disks) are required to increase a data recording capacity.
Are stacked and mounted on one spindle, and n disks are simultaneously rotated by a spindle motor.
Then, a plurality of magnetic heads are arranged on the front surface and the back surface of each disk, and are moved to the positions of the tracks on each disk by the carriage mechanism and are simultaneously accessed. The setting of the servo information (reference clock) for such a disk pack includes a servo surface servo method and a data surface method. In the servo surface servo method, for example, the lowest disk is dedicated to servo information (servo disk), and a reference clock is recorded as servo information on the entire circumference of each track. This clock is commonly applied to all disk accesses, and has been used in large computer systems. Separately, in a recent small disk device, a simpler data surface method is adopted. In this method, all disks are used for a data surface, and servo information is written at the head of each sector of each track. Servo information is
The reference clock is once read from a predetermined track on which the reference clock is written, and is generated as a sine wave signal of a predetermined frequency based on the reference clock, and is recorded at the head of each sector.

[0003]

In both the servo surface servo system and the data surface servo system, a predetermined reference clock track is set by a servo track writer, and the servo clock or the reference clock written there is used as a reference. A servo signal is generated and written on a predetermined track. At this time, when the servo writer writes the reference clock, a predetermined position on a predetermined surface of the magnetic disk is set as a reference clock track, and the reference clock is written into this. The reference clock set there is written for one round of the track with reference to the index signal. In this case, the joint between the clock at the start of writing and the clock at the end of writing needs to be within a predetermined allowable range. It is. Normally, the generation of the write clock
Since the operation is performed at a constant frequency under the control of the PLL using the (voltage controlled oscillation circuit), this joint portion is related to the clock cycle variation of one round. Since the rotation of the disk fluctuates, even if the clock is written at a constant cycle, the length of the joint changes according to the rotation fluctuation at the time of writing. The index signal is usually generated from the pattern signal by replacing the reference clock signal with specific pattern data (index pattern) and recording.

[0004] The joint is usually performed by detecting the time from the clock at the end of writing to the clock at the beginning of writing. If this is not within the allowable range even in a plurality of measurements, the reference clock to the track is used. Needs to be written again. In the clock rewriting in this case, the time of the joint portion is measured, and the phase correction to be added to each clock is calculated from the time of the joint, the number of clocks for one round of the first written clock and the initial clock width, and the delay is calculated. A clock is generated by adding or subtracting a phase component by a circuit to generate a clock, and this is written again. Assuming that the delay time to be corrected at this time is ND, ND = (NI / NC). Here, NI is the count number of one round of the actual reference clock written on a certain track and the number of reference clocks including the time of the seam portion. For example, NI = 10
It becomes 0.000.5625128. NC is the count number for one round of the reference clock generated for the track, for example, NC = 100,000.

[0005] Even if a correction value is calculated by the processor under the PLL control by the VCO and a reference clock for the PLL control is generated in accordance with the correction value, it takes time between when the correction value is collected and when it is written. Due to the deviation, the reference clock written under the influence of the fluctuation of the rotation of the disk at that time also has a joint portion. Therefore, it is necessary to retry writing the reference clock many times until it reaches the allowable value. This also applies to each sector in the servo signal in the case of data surface servo, but the same problem arises in the relationship between the servo signal at the beginning of writing and the servo signal at the end of writing. In addition, in recent high-density recording magnetic disk drives, the number of tracks increases, so that it takes time to write servo tracks, the clock frequency and the frequency of servo signals increase, and the The tolerance is also getting smaller. Therefore, there is a problem that clock rewriting is required many times, and it takes time to set the reference clock accurately. SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem of the prior art, and to provide a reference clock writing device for a disk capable of efficiently writing an accurate reference clock to the disk. .

[0006]

SUMMARY OF THE INVENTION In order to achieve the above object, a reference clock writing apparatus for writing data to a disk according to the present invention is characterized by a clock writing circuit for writing a clock signal to a predetermined track, and a clock writing circuit. A read circuit for reading a clock signal from a track, a counting means for counting clock signals for one round of the track obtained from the read circuit with reference to the index signal, and a clock signal for starting writing from a clock signal at the end of writing on a predetermined track Time detecting means for detecting a time until the clock signal reaches, a calculating means for calculating a value corresponding to one clock cycle of the reference clock signal to be written from the time detecting means and the count value of the clock signal for one round of the track; A control signal having a frequency corresponding to the value calculated by the calculating means in response to the clock signal from the circuit; And a reference clock generation circuit for generating a reference clock which is PLL-controlled in accordance with the control signal. The reference clock generation circuit receives the reference clock from the reference clock generation circuit and sets a reference clock to a reference clock writing track. The clock is written.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As described above, in the present invention,
A control for receiving a clock signal corresponding to the current rotational state of the disk obtained from the disk via the magnetic head from the reading circuit and generating a control signal having a frequency corresponding to the numerical value calculated by the calculating means in accordance with the clock signal. A signal generation circuit, and a reference clock generation circuit that generates a reference clock that is PLL-controlled in accordance with the control signal,
Since the reference clock is generated by a control signal corresponding to the clock signal from the read circuit, the reference clock in the PLL control can be generated in a manner following the fluctuation of the current disk read in real time. Thus, a reference clock can be generated so as to follow the rotation fluctuation of the disk at the time of writing the reference clock, so that the change in the joint time can be suppressed and the number of retries for writing the reference clock can be reduced.

[0008]

FIG. 1 is a block diagram of an embodiment in which a reference clock writing apparatus for a disk according to the present invention is applied to a disk pack of a servo surface servo system, and FIG. 2 is a flowchart of a reference clock setting process. . 100 is a reference clock writing device as a servo track writer,
1 is a disc having data surfaces on the front and back, 2 is
This is a servo disk having a servo surface 2a. These disks are fixed to a common spindle 3 and driven to rotate. Reference numeral 4 denotes a magnetic head that reads and writes data on the surface 1a of the disk 1 provided in the disk pack. Reference numeral 5 denotes a reference clock writing device (servo writer side) 1
00 is a magnetic head that writes a reference clock to a reference clock track set on the disk 2 provided in the disk pack. Here, a reference clock track is set for the back surface 2a (servo surface) of the disk 2. Therefore, a magnetic head for reading and writing data is provided. In the drawings, the back side is drawn as the front side for the sake of illustration. This embodiment also exemplifies a servo surface servo. 6 is a read / write circuit, 7 is a write clock generation circuit, 8 is a PLL clock generation circuit, 9 is an initial clock count circuit, and 10 is a data processing device. 11 is a programmable clock cycle conversion circuit, 12 is a read / write circuit, 13 is a write clock generation circuit, and 14 is a reference clock count circuit.

The read / write circuit 6 includes a read / write amplifier 6
a, an AGC amplifier 6b, and a peak detection / clock generation circuit 6c.
A clock signal is written to the track of the disk 1, the written clock signal is read, and a clock signal is generated and generated at the timing of the peak value of the read signal. The read / write amplifier 6a is connected to the write clock generation circuit 7, and writes the clock signal received from the write clock generation circuit 7 to the disk 1. This write clock generation circuit 7 is constituted by an initial clock generation logic circuit,
A clock signal is generated by receiving an oscillation signal from the crystal oscillation circuit 7a, a pattern signal for generating an index signal is generated under the control of the data processing device 10, and a clock signal is generated over one track. As described above, the index signal is, for example, “110011001111001” in the clock signal.
It is generated by detecting a specific index pattern signal composed of 16 bits of "1".

[0010] The PLL clock generation circuit 8 includes a phase detection circuit 8a, a loop filter 8b, and a VCO 8c.
Then, a clock signal having a phase controlled by PLL corresponding to the initial clock signal read from the disk 1 is generated and output to the counter 9 a of the initial clock count circuit 9. Initial clock count circuit 9
Is a counter 9a, an index signal detection circuit 9b,
It comprises a gap count circuit 9c and a switching circuit 9d. The index signal detection circuit 9b receives the initial clock signal from the read / write circuit 6, detects the preceding data pattern, and generates an index signal. The rise timing of the index detection signal at this time occurs according to the last one bit of the index pattern signal. The switching circuit 9d switches between an initial clock reading side (clock signal of the VCO 8c) and a later-described reference clock reading side (clock signal output of the read / write circuit 12) and connects to the counter 9a.
Initially, it is set on the initial clock reading side.

The gap count circuit 9c is time detecting means for detecting the time from the clock signal at the end of writing to the clock signal at the start of writing on the track. This circuit includes a clock signal of VCO 8c and read / write circuit 6
And receives the initial clock signal from the VCO 8c
The time from the clock signal to the next clock signal is counted according to a high-speed clock provided internally in synchronization with the clock signal. Further, this circuit receives the index detection signal from the index signal detection circuit 9b, holds the last count value, and stores the last count value.
Output to 0. The last count value of this indicates the seam time from the end of writing to the start of writing. The counter 9a receives the index detection signal from the index signal detection circuit 9b, starts counting the clock signal of the VCO 8c of the phase controlled by the PLL according to the signal slightly delayed from the index detection signal, and receives the next index detection signal. The count value is output to the data processing device 10 and the count value is reset, and the counting is started again. That is, this is a counter that counts the clock for one round of the track. The reference clock counting circuit 14 is a circuit for sending a reference clock to the counter 9a via the switching circuit 9d and counting when the switching circuit 9d is switched to the reference clock reading side, and shares the counter 9a. . The reference clock count circuit 14 has an index signal detection circuit 14b corresponding to the index signal detection circuit 9b and a gap count circuit 14c corresponding to the gap count circuit 9c.

The data processing device 10 includes an MPU 20, a memory 21, a display 22, an interface 23,
The memory 21 includes an initial clock writing program 21.
a, a reference clock cycle control program 21b, a reference clock determination program 21c, and the like. Also,
The interface 23 includes a counter 9a, a gap count circuit 9c, a read / write circuit 6, a write clock generation circuit 7, an index signal detection circuit 9b (connected via a switching circuit 9d), and a programmable clock cycle conversion circuit 1.
1, a read / write circuit 12, a write clock generation circuit 13,
It is connected to the index signal detection circuit 14b (connected via the switching circuit 9d) and the gap count circuit 14c.

The read / write circuit 12 includes a read / write circuit 6
And the read / write amplifier 12a and the AG
C amplifier 12b and peak detection / clock generation circuit 12c
Consists of Then, a reference clock is written to a track on the servo surface 2a of the disk 2 together with pattern data for generating an index signal by receiving a reference clock signal from the write clock generation circuit 13 in accordance with the control of the data processing device 10. Read the reference clock signal. The write clock generation circuit 13 is similar to the write clock generation circuit 7, except that the received clock is simply a reference clock.

Programmable clock cycle conversion circuit 11
Is composed of a direct digital synthesizer 11a, a programmable low-pass filter 11b composed of an active filter, and a PLL clock generation circuit 11c. Direct digital synthesizer 11a
Is a so-called set frequency signal generating circuit, which receives a clock signal from the outside, reads out the amplitude data of the sine wave signal according to this clock signal, and adds the digital value to generate a sine wave of a predetermined frequency. This is the circuit that occurs. Note that the internal configuration of the PLL clock generation circuit 11c is the same as that of the PLL clock generation circuit 8 described above, so the internal configuration is omitted in the figure. The generated sine wave signal is input to the phase comparison circuit of the PLL clock generation circuit 11c via the programmable low-pass filter 11b. As a result, the PLL clock generation circuit 11c
A clock having a phase (period) set in synchronization with an input clock signal and externally set is generated as a reference clock. Note that the PLL clock generation circuit 11c
It has a circuit configuration similar to that of the LL clock generation circuit 8, but additionally has a frequency divider circuit before the phase comparison circuit. The frequency divider divides the frequency of the output of the low-frequency sine wave supplied through the low-pass filter 11b so that phase lock is applied. Further, the frequency dividing circuit has a programmable configuration in which the frequency dividing ratio can be changed from outside.

The direct digital synthesizer 11a has a phase accumulator, a sine wave data memory, and a D / A conversion circuit. The direct digital synthesizer 11a outputs a clock signal from the PLL clock generation circuit 8 (VCO 8a) to a read signal of the sine wave data memory. The amplitude data of the sine wave of the digital value is read out from the sine wave data memory according to this, and is converted by the D / A converter to generate a sine wave corresponding to the clock signal. At this time, the amplitude data read from the sine wave data memory becomes an amplitude value corresponding to the set phase externally set in the phase accumulator. As a result, a sine wave having a cycle (frequency) according to an externally set value is generated. This type of circuit is already known, for example, as disclosed in Japanese Patent Application Laid-Open No. 5-212412. Such a direct digital synthesizer 11a generates a sine wave having a phase corresponding to the calculated numerical value in real time in response to a clock signal read out according to the current rotation fluctuation of the disk, thereby generating a reference clock generated at that time. Provides a reference clock that follows the rotation fluctuation of the disk.

Next, the reference clock setting operation will be described with reference to FIG. 2. The MPU 20 first executes an initial clock writing program 21a. Thus, the read / write circuit 6 and the write clock generation circuit 7 are controlled via the interface 23 to write the clock signal of the frequency of the crystal oscillation circuit 7a on the track of the disk 1 (step 101). Next, the written clock is read from this track (step 102), and the count value Nc of the counter 9a for one round of the track and the gap count circuit 9c sent out in response to the signal from the index signal detection circuit 9b. (Step 103). Next, the MPU 20 calls and executes the reference clock cycle control program 21b. Thus, the number NI of reference clocks is calculated from the value Nc and the time T (step 104). Note that NI
Is the number of counts for one round of the actual reference clock written on the track and includes the time of the seam portion, as described above. Further, a numerical value ND = (NI / NC) corresponding to the delay time is calculated (step 105).

Next, a control signal corresponding to the numerical value ND is generated to generate and set a phase value of a sine wave generated in the direct digital synthesizer 11a (step 10).
6). The generation of the sine wave phase value from the numerical value ND may be mathematically obtained because the numerical value ND corresponds to the clock generation period, or may be determined in accordance with the rotation fluctuation of the disk. The conversion value may be obtained by experimentally obtaining the conversion value and tabulating it. Its value is determined by the relationship between the frequency and the phase of the signal generated by the sine wave data memory. Next, the MPU 20
Is the read / write circuit 1 via the interface 23
2. The write clock generation circuit 13 is controlled to read the clock written on the disk 1 from the track (step 10).
7). In this state, the reference clock generated from the programmable clock period conversion circuit 11 is sent from the write clock generation circuit 13, and the reference clock is written into the track on the servo surface 2a of the disk 2 together with the index signal (step 108). .

Next, the MPU 20 switches the switching circuit 9d to the reference clock side to read the written reference clock (step 109), and reads the data of the count value NC of the counter 9a and the count value T of the gap count circuit 14c.
Is read (step 110), and it is first determined whether or not the count value NC is a correct value (step 1).
11). If this is YES (OK), it is next determined whether or not the count value T is within an allowable range (step 112).
If it is within the allowable range, the magnetic head 5 for accessing the servo surface 2a of the disk 2 is moved to the next reference clock writing track for positioning as a pass (step 113). Then, a reference clock is generated and written to the next track in the same processing as described above, and the above determination is repeated. On the other hand, when the count value NC is not correct or the count value T is not within the allowable value, the process returns to step 101, and the process is started again from the writing of the initial clock. After step 113, it is determined whether or not the writing of the reference clock to all the tracks has been completed (step 114). When the writing has not been completed, the process returns to step 101 similarly.

The embodiment shown in FIG. 1 is an example of a servo surface servo system in which a reference clock is sequentially written on each track on a servo surface of a disk. In this example, the reference clock generated from the PLL clock generation circuit 11c is sequentially recorded on each track on the servo disk surface in the servo surface servo. In this regard, the data surface servo has a servo signal generation / write circuit 15 as shown by a dotted line in FIG. 1, and this servo signal generation / write circuit 15 receives a reference clock from the PLL clock generation circuit 11c. A servo signal is generated at a head position (predetermined position) of each sector of a predetermined track where a servo signal is generated and data is written. The only difference is that the servo signal written when the reference clock read from the reference clock track is determined to be in the allowable range by the determination in step 112 is valid.

As described above, in the embodiment, the overall description has been made assuming that the frequency of the initial clock corresponds to the frequency of the reference clock, but the frequency division ratio of the PLL clock generation circuit 11c is changed. And another frequency different from the frequency of the initial clock, for example, 1 /
Needless to say, a reference clock of 2, 1/4 or the like can be generated. Conversely, the frequency of the initial clock can be set to twice or four times higher than the frequency of the reference clock. In such a case, the characteristic of the programmable low-pass filter 11b is set to match the frequency of the reference clock that generates the characteristic. Further, in the embodiment, the example of the servo surface servo is described. However, as described above, it is needless to say that the present invention can be applied to a data surface servo in which a servo signal is written corresponding to a sector.

[0021]

As described above, according to the present invention, the clock signal corresponding to the current rotational state of the disk obtained from the disk via the magnetic head is received from the read circuit and calculated in accordance with the clock signal. A control signal generating circuit for generating a control signal having a frequency corresponding to the numerical value calculated by the means, and a reference clock generating circuit for generating a reference clock that is PLL-controlled in accordance with the control signal; Therefore, the reference clock in the PLL control can be generated in a manner following the fluctuation of the current disk read in real time. Thus, a reference clock can be generated so as to follow the rotation fluctuation of the disk at the time of writing the reference clock, so that the change in the joint time can be suppressed and the number of retries for writing the reference clock can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment in which a reference clock writing apparatus for a disk according to the present invention is applied to a disk pack of a servo surface servo system.

FIG. 2 is a flowchart of a reference clock setting process.

[Explanation of symbols]

1 disk, 2 servo disk, 2a servo surface,
4,5 ... magnetic head, 6,12 ... read / write circuit, 7,
13 Write clock generation circuit, 8 PLL clock generation circuit, 9 Initial clock count circuit, 10 Data processing device, 11 Programmable clock cycle conversion circuit, 20 MPU, 21 Memory, 22 Display, 23 Interface, 24 bus, 21a initial clock writing program, 21b reference clock cycle control program, 21c reference clock determination program.

Claims (6)

[Claims] 1. A reference clock writing device for writing a reference clock to a reference clock writing track of a magnetic disk based on an index signal, comprising: a clock writing circuit for writing a clock signal to a predetermined track; A read circuit for reading a clock signal; a counting means for counting a clock signal for one round of a track obtained from the read circuit with reference to the index signal; a clock for starting writing from a clock signal at the end of writing on the predetermined track Time detecting means for detecting the time to a signal; calculating means for calculating a value corresponding to one clock cycle of a reference clock signal to be written from the time detecting means and the count value of the clock signal for one round of the track Receiving the clock signal from the readout circuit and responding A control signal generation circuit that generates a control signal having a frequency corresponding to the value calculated by the calculation means; and a reference clock generation circuit that generates the reference clock that is PLL-controlled in accordance with the control signal. A reference clock writing apparatus for writing data on a reference clock to a reference clock writing track in response to receiving the reference clock from a clock generation circuit. 2. The magnetic disk drive according to claim 1, further comprising: reading means for reading the reference clock from the reference clock writing track and determining whether the clock is within a permissible range as a reference clock signal. Reference clock writing device. 3. A first PLL for receiving a clock signal from the read circuit and generating a PLL-controlled clock signal.
A clock writing circuit that receives a signal from a crystal oscillator and writes a clock having a predetermined frequency to the predetermined track. The control signal generation circuit includes a first PLL circuit. A direct digital synthesizer that receives a clock signal from the controller and generates a sine wave signal having a frequency corresponding to a value calculated by the calculator as the control signal in accordance with the clock signal. 3. A circuit according to claim 2, further comprising a second PLL circuit for generating said reference clock signal which is PLL-controlled in response to an output signal from the synthesizer.
A reference clock writing apparatus for writing magnetic data to a magnetic disk as described above. 4. The calculating means calculates a value corresponding to a frequency of a reference clock signal to be written to a servo track from the time detecting means and the count value of the clock signal for one round. The reference clock generation circuit is
PL according to the control signal from the control signal generation circuit
A reference clock to be written into the L-controlled servo track; and the determination means receives the reference clock from the reference clock generation circuit, writes the reference clock into the servo track, and writes the written servo. 3. The reference clock writing device according to claim 2, wherein the reference clock is read from a track to determine whether the reference clock signal is within an allowable range as a reference clock signal. And a servo signal generating and writing circuit.
2. The servo signal generating and writing circuit according to claim 1, wherein the servo signal is generated at a predetermined position of a predetermined track where a servo signal is generated by receiving the reference clock from the reference clock generating circuit and data is written. Reference clock writing device for magnetic disk. 6. A servo signal generating / writing circuit, further comprising:
The servo signal generating and writing circuit is for writing the servo signal at a predetermined position of a predetermined track where a servo signal is generated by receiving the reference clock from the reference clock generating circuit and writing data, and 3. The reference clock writing apparatus according to claim 2, wherein the servo signal is valid when the reference clock read from the reference clock track is determined to be within an allowable range by the determination unit.