JP2000114551A - Semiconductor tunnel element and manufacture thereof, and integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor tunnel element that has an excellent high-speed switching characteristic as well as can control the tunneling effect. SOLUTION: An undope AlGaAs layer 2 and an n+-GaAs high-density anode layer 3 are successively laminated on a semi-insulating GaAs substrate 1. An undope AlAs layer 4 as a tunnel layer and a metal thin film NiA 5 lattice- matched with the AlAs layer 4 are continuously epitaxially grown on the n+- GaAs layer 3. Thus, a semiconductor tunnel element is obtained. For actual use, a first electrode is formed on the NiAl layer 5 and a second electrode is formed on the n+-GaAs layer 3 exposed by etching. The obtained tunnel diode has a sharper rise of sensitivity than conventional Zener diode or Schottky diode. The electron tunnel effect is controlled by the film thickness of the tunnel layer 4 and the material of the semiconductor high-density anode layer 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor tunnel device utilizing a tunnel effect between a metal and a semiconductor, and an integrated circuit using the semiconductor tunnel device.

[0002]

2. Description of the Related Art In order to realize a high-speed switching element, a Zener diode formed by joining a high-concentration n-type semiconductor and a p-type semiconductor and a Schottky diode using a semiconductor / metal junction are generally used. It is used.

In the case where the Zener diode is used as a high-frequency switching element, the switching time of the diode switching element depends on the life of the minority carrier in the pn junction. Life needs to be shortened. For this purpose, the effect of accumulating minority carriers needs to be reduced, and the n-layer and p-layer are heavily doped to shorten the life of minority carriers. On the other hand, in the case of a Schottky diode using a metal Schottky junction, although there is no minority carrier accumulation effect, doping is performed by lowering the doping concentration on the semiconductor side so that contact does not become ohmic, or It is necessary to include a thick high-resistance semiconductor intermediate layer. As a technique for realizing a high-speed switching element, there is a tunnel effect, which is one of electron quantum effects. This tunnel effect is an effect that electrons can pass through barrier layers of several to several tens of atomic layers in a sufficiently short time.

[0004]

However, the technique for realizing the above-mentioned conventional high-speed switching element has the following problems. As described above, in the Zener diode, the n-layer and the p-layer are heavily doped in order to reduce the accumulation effect of minority carriers, so that the reverse current increases and the reverse breakdown voltage decreases. There is a problem.

In the above-mentioned Schottky diode having excellent high-speed switching characteristics, the switching speed increases when the high-frequency series resistance is reduced. Therefore, it is desirable to dope the semiconductor layer at a high concentration. However, if the semiconductor layer is doped with too high a concentration,
Since the contact between semiconductors becomes ohmic, doping with a lower doping concentration on the semiconductor side, or
It is necessary to include a thick high-resistance semiconductor intermediate layer. As a result, a certain depletion layer region exists between the metal and the semiconductor doped at a certain concentration, and this depletion layer region increases the transient time of electrons and reduces the switching speed of the device. There is a problem.

In addition, in the above-mentioned tunnel effect, when a metal that does not lattice match with a high-concentration semiconductor material is generally provided, a large number of surface levels are formed in the semiconductor, and an ohmic contact is formed by a heated alloy. There is a problem that the tunnel effect between metals cannot be controlled. In the case of a structure such as a high-concentration semiconductor / a low-concentration semiconductor / a high-concentration semiconductor, the low-concentration semiconductor in the intermediate layer easily becomes ohmic due to impurity diffusion in several to several tens of atomic layers, thereby controlling the tunnel effect. Has a problem.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor tunnel device having a high-speed switching characteristic superior to a Schottky diode or a Zener diode and capable of controlling a tunnel effect, a method of manufacturing the same, and integration using the semiconductor tunnel device. It is to provide a circuit.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor tunnel device comprising: a semiconductor tunnel layer formed on a semiconductor high-concentration anode layer formed on a semiconductor substrate; A high-concentration anode layer and a cathode metal layer lattice-matched to the semiconductor tunnel layer,
It is characterized by being sequentially laminated.

According to the above configuration, of the semiconductor tunnel layer and the cathode metal layer formed on the semiconductor high-concentration anode layer serving as the channel layer, the cathode metal layer is connected to the semiconductor high-concentration anode layer and the semiconductor tunnel layer. Lattice matched. Therefore, the interface state between the semiconductor layer composed of the semiconductor high-concentration anode layer and the semiconductor tunnel layer and the cathode metal layer is greatly reduced. By optimally selecting the thickness of the semiconductor tunnel layer, ohmic conduction between the semiconductor high-concentration anode layer and the cathode metal layer is prevented, and the depletion region on the semiconductor high-concentration anode layer side is reduced. Thus, a tunnel effect in which the semiconductor tunnel layer rises steeply can be obtained.

In this case, the rise voltage of the tunnel effect is controlled by controlling the thickness of the semiconductor tunnel layer. Further, the breakdown voltage at the time of a negative bias is controlled by changing the material of the semiconductor high-concentration anode layer.

According to a second aspect of the present invention, in the semiconductor tunnel device of the first aspect, the semiconductor substrate is a GaAs substrate, and the semiconductor high-concentration anode layer is an n ⁺ -GaAs layer and n ⁺ -. At least one of the InGaAs layers, and the semiconductor tunnel layer is formed of Al _x Ga _{1 -x} As (x =
0.3-1) Single layer, InGaP single layer, Al _x Ga _1-x As (x = 0.3
1) at least one of a / GaAs superlattice layer and an InGaP / GaAs superlattice layer, wherein the cathode metal layer is NiAl
It is characterized by being a metal layer.

According to the above structure, the N formed on the AlAs single layer or the InGaP single layer as the semiconductor tunnel layer.
The difference in lattice constant between the iAl metal layer and the AlAs single layer is about 2
%. Therefore, at a critical film thickness of about 10 nm or less, the strain is not relaxed and hardly diffuses into AlAs, GaAs, or the like.
It contributes to the stability of the device. Further, even when using any of the semiconductor tunneling layer as _{Al x Ga 1-x As (} x = 0.3~1) / GaAs superlattice layer and InGaP / GaAs superlattice layer, and the NiAl metal layer n ⁺ -GaAs layer or n ⁺ -InGaAs
In addition to preventing ohmic conduction with the s layer, it is equivalent to applying a bias voltage to only the first AlAs layer or InGaP single layer when a bias voltage is applied. Layer or InGa
The same low rise voltage as in the case of a single P layer is obtained.

According to a third aspect of the present invention, in the semiconductor tunnel device of the first aspect, the semiconductor substrate is an InP substrate, the semiconductor high-concentration anode layer is an n ⁺ -InGaAs layer, The semiconductor tunnel layer is In
At least one of an AlAs single layer, an InAlAsP single layer, an InAlAs / InGaAs superlattice layer and an InAlAsP / InGaAs superlattice layer, wherein the cathode metal layer is a NiAl metal layer.

According to the above construction, the ohmic conduction between the NiAl metal layer and the n.sup. ⁺ -InGaAs layer is prevented, and the rising voltage when a bias voltage is applied, as in the second aspect of the invention. Becomes lower.

According to a fourth aspect of the present invention, in the semiconductor tunnel device according to the second or third aspect, the cathode metal layer is a CoAl metal layer.

According to the above construction, the CoAl metal layer and the n ⁺ -In are formed in the same manner as in the second or third aspect of the invention.
Ohmic conduction between the GaAs layer and the n ⁺ -GaAs layer is prevented, and the rise voltage when a bias voltage is applied is reduced.

According to a fifth aspect of the present invention, in the semiconductor tunnel device of the first aspect, the semiconductor tunnel layer has a thickness of 5 nm or more and 20 nm or less.

According to the above configuration, since the thickness of the semiconductor tunnel layer is 20 nm or less, the depletion region on the side of the high-concentration anode layer between the high-concentration semiconductor layer and the cathode metal layer is thin, Electrons on the cathode metal layer side can easily tunnel to the semiconductor high-concentration anode layer side. Further, since the thickness of the semiconductor tunnel layer is 5 nm or more, the contact between the semiconductor high-concentration anode layer and the cathode metal layer does not become ohmic, and can function as a high-speed switching element.

According to a sixth aspect of the present invention, there is provided a method for manufacturing a semiconductor tunnel device, wherein a high concentration n ⁺ -GaAs semiconductor layer is formed on a GaAs substrate by molecular beam epitaxial growth or metal organic chemical vapor deposition. Depositing a semiconductor tunnel layer comprising at least one of an AlAs single layer and an AlAs / GaAs superlattice layer on the n ⁺ -GaAs semiconductor high-concentration anode layer; With the matched NiAl metal layer,
The method is characterized by including a step of sequentially performing epitaxial growth and a step of annealing the stacked body.

According to the above configuration, the semiconductor tunnel device according to the second aspect of the present invention is easily formed. In this case, since the semiconductor tunnel layer and the cathode metal layer are continuously epitaxially grown on the semiconductor high-concentration anode layer, both the semiconductor layer including the semiconductor high-concentration anode layer and the semiconductor tunnel layer and the cathode metal layer are formed. The interface states between the layers are greatly reduced. Further, the thickness of the semiconductor tunnel layer can be easily controlled.

According to a seventh aspect of the present invention, there is provided an integrated circuit comprising:
A semiconductor high-concentration anode layer and a semiconductor tunnel layer are sequentially formed on an epitaxial wafer on which at least one of a hetero bipolar transistor (HBT) and a high electron mobility transistor (HEMT) is deposited, and the semiconductor tunnel layer is formed on the semiconductor tunnel layer. A cathode metal layer lattice-matched to the high-concentration anode layer and the semiconductor tunnel layer is formed, and the HBT or HEMT is electrically isolated from the high-concentration anode / semiconductor tunnel layer and the cathode metal layer. It is characterized by having.

According to the above configuration, the semiconductor tunnel device according to the first aspect of the present invention is integrated on the same substrate as the HBT or HEMT device. Thus, the manufacturing process of the integrated circuit is simplified, and the cost is reduced.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. The present invention uses a cathode metal material lattice-matched to a semiconductor material, and continuously epitaxially grows a semiconductor tunnel layer and the cathode metal layer of the semiconductor material on a semiconductor high-concentration anode layer of the semiconductor material, A semiconductor tunnel layer having a thickness of 5 nm to 20 nm is formed between the high concentration semiconductor layer and the metal layer. By controlling the thickness and the like of the tunnel layer, a semiconductor tunnel element capable of controlling the tunnel effect with good controllability is obtained. In this case, since a semiconductor tunnel layer for preventing ohmic conduction is epitaxially grown between the metal layer and the high-concentration semiconductor layer, the metal layer / semiconductor layer does not become ohmic even if the semiconductor layer is doped at a high concentration. Further, the depletion region on the side of the high-concentration semiconductor layer can be made thinner, and the switching speed of the semiconductor tunnel element does not decrease.

<First Embodiment> FIG. 1 is a sectional view showing a basic structure of a semiconductor tunnel device according to the present embodiment. On a semi-insulating GaAs substrate 1, a non-doped AlGa
An As buffer layer (thickness: 50 nm) 2 and an n ⁺ -GaAs high concentration anode layer (thickness: 500 nm, concentration 5E18 / cm ³ ) 3 as a channel layer through which a current flows are formed by MBE (molecular beam epitaxy). ). On the n ⁺ -GaAs high-concentration anode layer 3, a non-doped AlAs layer (thickness: 13 nm) 4 serving as a tunnel layer for performing a tunnel effect
A metal thin film NiAl (thickness: 10 nm) 5 lattice-matched to the AlAs layer 4 is continuously epitaxially grown at about 150 ° C. In this case, since the diffusion length of metal atoms is short, the NiAl metal thin film 5 has a quantum wire shape having a width of several angstroms and a length of several microns.
Annealing at 00 ° C. to 550 ° C. makes it possible to form a uniform thickness in the plane.

In actual element formation, as shown in FIG. 4, a metal is vapor-deposited on the NiAl metal thin film 5 to form an electrode 6, and the NiAl metal thin film 5 and the AlAs layer 4 are formed into n ⁺ -GaAs.
The electrode 7 is formed on the n ⁺ -GaAs high concentration anode layer 3 by dry etching or wet etching until the high concentration anode layer 3 is exposed. In order to prevent oxidation of the AlAs layer 4, a protective film such as a SiNx film is formed on the entire side surface of the etched AlAs layer 4.

The semiconductor tunnel device having the above configuration is
It is a high-speed switching element that utilizes the property that electrons can tunnel through a semiconductor of several atomic layers. Hereinafter, the band structure of the semiconductor tunnel device will be described. FIG. 2 is a band diagram of the present semiconductor tunnel device. 2 (a) shows that the voltage applied between the metal and the high-concentration semiconductor is a positive bias, FIG. 2 (b) shows that the voltage is zero bias, and FIG. 2 (c) shows that the voltage is zero. Is a band diagram in the case of a negative bias. That is, the positive / negative bias applied to the present semiconductor tunnel element is in the opposite direction to that of a general Schottky diode.

In the case of the positive bias shown in FIG. 2A, the thickness of the barrier layer felt by the electrons is further smaller than the thickness of the semiconductor tunnel layer 4, so that the thickness between the cathode metal layer 5 and the high-concentration semiconductor layer 3 is increased. Tunnel current flows through In the case of the negative bias shown in FIG. 2 (c), when the voltage is low, electrons cannot tunnel through the semiconductor tunnel layer 4 having a constant thickness. A current that can tunnel through the thickness of the triangular barrier and a current that exceeds the barrier flow.

As described above, when a cathode metal layer is generally deposited on a highly doped semiconductor layer in a Schottky diode, in order to prevent ohmic contact, the thickness of the intermediate layer is set to, for example, a thickness of 50 nm or more where electrons cannot be tunneled. Must be done. On the other hand, in the present semiconductor tunnel element, by selecting a material having a small lattice constant difference between the semiconductor tunnel layer 4 and the high-concentration semiconductor layer 3 as the cathode metal layer 5, the semiconductor tunnel layer 4 and the cathode metal layer 5 are formed. Can be continuously epitaxially grown. Therefore, both semiconductor layers 3 and 4
Metal layer 5 / semiconductor layers 3, 4 by continuously growing cathode metal layer 5 lattice-matched to semiconductor layer 4 on semiconductor layer 4.
The interface state between them can be greatly reduced. In this case, since the semiconductor tunnel layer 5 can be grown while controlling the layer thickness to several nanometers, it is possible to prevent ohmic contact and at the same time to control the electrons to tunnel at a low voltage.

As described above, according to the present semiconductor tunnel device, electrons tunnel through several atomic layers to several tens of atomic layers in a short transient time, so that a high-speed switching element having a low rising voltage can be manufactured. The switching time depends on the time for electrons to tunnel through the semiconductor tunnel layer 4, and the rising voltage can be controlled by the thickness of the semiconductor tunnel layer 4. However, when the film thickness is 5 nm to 20 nm, the rising voltage is sufficiently small. However, when the film thickness is 5 nm or less, the contact between the cathode metal layer 5 and the semiconductor high-concentration anode layer 3 becomes ohmic and cannot be used.

When a positive bias is applied between the electrodes 6 and 7 as shown in FIG. 3A, by adjusting the thickness of the semiconductor tunnel layer 4 as shown in FIG. You can freely control the rise voltage V _a. When a negative bias is applied between the electrodes 6 and 7 as shown in FIG.
As shown in FIG. 3C, the reverse breakdown voltage _Vb is determined by the tunneling efficiency of the electrons in the reverse direction, that is, the thickness of the semiconductor tunnel layer 4 and the barrier between the semiconductor tunnel layer 4 and the high-concentration semiconductor layer 3. It depends on the height difference. Therefore, when the thickness of the semiconductor tunnel layer 4 is the same, the withstand voltage of the element can be greatly increased by selecting a material having a large difference in barrier height as the material of the semiconductor high-concentration anode layer 3.

As described above, the present semiconductor tunnel device
It has two features compared to a general diode. one,
A semiconductor metal layer 5 and a high-concentration anode layer 3 for semiconductor are formed by a semiconductor tunnel layer 4 having a diameter of about 20 nm or less for tunneling electrons.
The point is that the rising voltage can be controlled by controlling the tunneling efficiency of electrons by the thickness of the semiconductor tunnel layer 4. Another point is that when the thickness of the semiconductor tunnel layer 4 is constant, the withstand voltage in the reverse direction can be controlled by selecting a material having a large difference in barrier height as the material of the semiconductor high-concentration anode layer 3. It is.

FIG. 4A shows an electrode 6 formed by depositing a metal on the NiAl layer 5 in the basic structure of the semiconductor tunnel device shown in FIG. 1 and etching and exposing the n ⁺ -GaAs layer 3.
FIG. 3 is a schematic cross-sectional view of a semiconductor tunnel diode obtained by forming an electrode 7 thereon. The size of the electrodes 6 and 7 is 0.
6 mm × 0.6 mm, and the distance between the electrodes 6 and 7 is 3 mm. The voltage -V is applied to the electrode 6 of this semiconductor tunnel diode.
Is applied, and a voltage + V is applied to the electrode 7, the current-voltage characteristic shows an asymmetric characteristic as shown in FIG. In the positive voltage direction (n ⁺ -GaAs layer 3 is a positive electrode), electrons are NiAl.
From the layer 5 side, the thin AlAs layer 4 tunnels and flows to the n ⁺ -GaAs layer 3. The rising voltage is determined by the thickness of the AlAs layer 4. That is, the thickness of the AlAs layer 4 is reduced (10 n
m or less), the rising voltage can be reduced. However, if the thickness is 5 nm or less, the NiAl layer 5 cannot be used because ohmic conduction occurs between the n ⁺ -GaAs layer 3 which is a semiconductor high-concentration anode layer.

When a reverse voltage is applied (n ⁺ -GaAs layer 3
If the thickness of the AlAs layer 4 is more than a certain thickness, electrons cannot tunnel through the negative electrode, so that the electrons pass through the barrier between the n ⁺ -GaAs layer 3 and the AlAs layer 4 for conduction. Must cross. If the breakdown voltage is changed by changing the material of the semiconductor, for example, by changing the n ⁺ -GaAs layer 3 to the n ⁺ -InGaAs layer, a larger barrier difference between the AlAs layer 4 and the InGaAs layer is obtained, and the breakdown voltage is increased. Can be controlled as follows. As shown in FIG. 7, the value of the current flowing when a voltage of 2 V or more is applied in the negative direction is similar to the positive current in the case of a general Schottky diode, and the current exceeding the barrier and the tunnel current are similar. And the sum of the two. In comparison,
The current in the positive direction is only the tunnel current, and the current rises steeply, which is excellent as switching characteristics. FIG. 4B shows an equivalent circuit diagram of the semiconductor tunnel diode shown in FIG.

As described above, in the present embodiment,
On the n ⁺ -GaAs high concentration anode layer 3 as a channel layer, an AlAs layer 4 as a tunnel layer and a NiAl metal thin film 5 lattice-matched to the semiconductor layers 3 and 4 are continuously epitaxially grown. Therefore, a semiconductor tunnel layer 4 of 20 nm or less, in which electrons can be tunneled, can be formed between the cathode metal layer 5 and the semiconductor high-concentration anode layer 3. In this case, by setting the thickness of the tunnel layer 4 to 5 nm or more, ohmic conduction between the cathode metal layer 5 and the semiconductor high-concentration anode layer 3 is prevented, and the depletion region on the semiconductor high-concentration anode layer 3 side is reduced. Thus, the switching speed can be increased. Further, by controlling the thickness of the semiconductor tunnel layer 4 and the material of the semiconductor high-concentration anode layer 3, it is possible to control a tunnel effect such as a start-up voltage and a reverse breakdown voltage.

That is, according to the present embodiment, it is possible to produce a tunnel diode which has a simple structure, is low in manufacturing cost, has a sharper rise than ordinary zener diodes and Schottky diodes, and can control electron tunnel effect. You can.

<Second Embodiment> A schematic diagram of a semiconductor tunnel diode according to the present embodiment is shown in FIG.
As in the first embodiment, a non-doped AlGaAs buffer layer, an n ⁺ -GaAs high-concentration anode layer 13, a non-doped AlAs layer (tunnel layer) 14, and a NiAl metal thin film 15 are formed on a semi-insulating GaAs substrate. The semiconductor tunnel devices are formed sequentially. In this embodiment, the portion between the positions where the electrodes 16 and 17 are formed in the NiAl metal thin film 15 and the AlAs layer 14 is defined as n ⁺ -GaA.
Etching is performed up to the s high-concentration anode layer 13 to isolate the portions where both electrodes are formed. Thereafter, the electrode 1 made of an ohmic metal is placed on the NiAl metal thin film 15 at the isolated place.
6 and the electrode 17 are provided by vapor deposition. After that, the first
As in the case of the embodiment, in order to prevent oxidation of the AlAs layer 14, a protective film such as a SiNx film is formed on the entire side surface after the etching.

When a voltage -V is applied to the electrode 16, the electrode 1
When a voltage + V is applied to 7, a symmetric and non-linear current-voltage characteristic of the tunnel diode is obtained as shown in FIG. The electrons tunnel through the AlAs layer 14 from the negative electrode 16 and the NiAl metal thin film 15 to form n ⁺ -Ga
It flows to the NiAl metal thin film 15 and the positive electrode 17 through the As high concentration anode layer 13 and the AlAs layer 14.
In the semiconductor tunnel diode of the present embodiment, the current-voltage curve is completely symmetrical because the configuration between the two electrodes 16 and 17 is symmetrical, that is, the semiconductor tunneling diode shown in the first embodiment. It can be said that the device has two back-to-back serial connection characteristics. The rising voltage can be controlled by changing the thickness of the AlAs layer 14. FIG. 5B shows an equivalent circuit diagram of the present semiconductor tunnel diode.

<Third Embodiment> FIG. 6A is a schematic view of a semiconductor tunnel diode according to the present embodiment.
As in the first embodiment, a non-doped AlGaAs buffer layer, an n ⁺ -GaAs high-concentration anode layer 23, a non-doped AlAs layer (tunnel layer) 24, and a NiAl metal thin film 25 are formed on a semi-insulating GaAs substrate. The semiconductor tunnel devices are formed sequentially. In the present embodiment, the electrode 26 and the electrode 27 made of ohmic metal are provided on the NiAl metal thin film 25 by vapor deposition.

When a voltage -V is applied to the electrode 26, the electrode 2
7 shows a current-voltage characteristic when a voltage + V is applied to FIG.
As shown in. When the voltage V is between about -4V and 4 + V, the current flows through the NiAl metal thin film 25, and the current-voltage characteristics show the ohmic characteristics of the NiAl thin film. Thus, according to the general Ohm's law, the current-voltage curve is linear. When a voltage of −4 V or less or a voltage of +4 V or more is applied, some of the electrons are transferred from the negative electrode 26 to AlAs.
The layer 24 is tunneled and flows to the positive electrode 27 via the lower n ⁺ -GaAs high concentration anode layer 23. That is,
When a voltage of -4 V or less or +4 V or more is applied, some of the electrons flow from the negative electrode 26 through the NiAl metal thin film 25 to the positive electrode 27, while the other part tunnels through the AlAs layer 24. It flows to the positive electrode 27 via the AlAs layer 24 and the NiAl metal thin film 25, bypassing the n ⁺ -GaAs concentration anode layer 23. This corresponds to a non-linear portion where the voltage in the curve shown in FIG.

When the electrodes 26 and 27 are provided as shown in FIG. 6A, the voltage is limited by automatically shunting the current without increasing the voltage even if the current increases, as described above. It has the function of an element. The limiting voltage can be adjusted by the thickness of the AlAs layer 24. That is, the semiconductor tunnel diode according to the present embodiment is an element having a characteristic in which the semiconductor tunnel diode according to the second embodiment and the NiAl resistor are connected in parallel. Therefore, the present semiconductor tunnel diode can be represented by an equivalent circuit diagram as shown in FIG.

<Fourth Embodiment> Next, examples of various integrated circuits using the semiconductor tunnel element of the present invention will be described. FIGS. 8 and 9 show HBT and H on a GaAs substrate.
A semiconductor tunnel layer shown in FIG. 1 and a cathode metal thin film lattice-matched to the two semiconductor layers are continuously epitaxially grown on a high-concentration semiconductor layer of an epitaxial wafer on which active elements such as EMT are deposited. .

In FIG. 8, the HBT 38 formed on the GaAs substrate 31 is isolated by a process such as etching or ion implantation, and the HBT 38 on the GaAs substrate 31 is separated.
8, a non-doped AlGaAs buffer layer 32, an n ⁺ -GaAs high-concentration anode layer 33, a non-doped AlAs layer (tunnel layer) 34, a NiAl metal thin film 35
Are sequentially formed. Then, similarly to the first embodiment, N
An electrode 36 is formed on the iAl metal thin film 35, and an electrode 37 is formed on the n ⁺ -GaAs high concentration anode layer 33 which is exposed by etching to form a semiconductor tunnel diode 39.

In FIG. 9, the HEMT 49 formed on the GaAs substrate 41 is isolated by a process such as etching or ion implantation. Layer 42, n ⁺ -GaAs high concentration anode layer 43, non-doped AlAs layer (tunnel layer) 44, N
An iAl metal thin film 45 is sequentially formed. Then, similarly to the second embodiment, the NiAl metal thin film 45 and the AlAs layer 44 are formed.
Is etched to the n ⁺ -GaAs high-concentration anode layer 43 to isolate the portions where both electrodes are formed, and the electrodes 46 and 47 made of an ohmic metal are placed on the isolated NiAl metal thin film 45.
Is provided by vapor deposition. Further, an electrode 48 is provided on the exposed n ⁺ -GaAs high concentration anode layer 43. Thus, the semiconductor tunnel diode 50 is formed. The semiconductor tunnel diode 50 in this case functions similarly to the semiconductor tunnel diode of the second embodiment by applying a voltage between the electrode 46 and the electrode 47, while the semiconductor tunnel diode 50 is provided between the electrode 46 and the electrode 48. By applying a voltage, the same function as the semiconductor tunnel diode of the first embodiment can be obtained.

Further, as described above, elements such as high-speed switching tunnel diodes 39 and 50 and electric resistance
A device integrated with the elements of the HBT 38 and the HEMT 49 on the same substrate can be further incorporated into a microwave or millimeter-wave monolithic integrated circuit including an amplification circuit or a logic circuit. As described above, in the present embodiment, H
On the same substrate as the BT38 and HEMT49 elements,
Epitaxial growth of a high-speed switching tunnel diode is possible. Therefore, HBT38 and HEMT
49, and the cost can be reduced because the number of circuit manufacturing steps is reduced.

The semiconductor tunnel diode according to each of the above-described embodiments includes a diode element having a low input impedance, an element capable of controlling a large area and a high voltage, a current shunt element, current-voltage symmetry and nonlinearity. Application to a high-frequency conversion element or the like utilizing the method can be considered. Further, a single or uniform large-area element can be manufactured using this semiconductor tunnel diode.

In each of the above embodiments, the above A
The lGaAs buffer layers 2, 32, 42 and the n ⁺ -GaAs high concentration anode layers 3, 13, 23, 33, 43 are formed by MBE. However, the present invention is not limited to this, and may be formed by the MOCVD method.

In each of the above embodiments, the semiconductor high-concentration anode layer is formed of n ⁺ -GaAs, but may be formed of an n ⁺ -InGaAs layer or an n ⁺ -GaAs layer and an n ⁺ -GaAs layer. It may have a two-layer structure with a ⁺ -InGaAs layer. Further, the semiconductor tunnel layer is composed of a single layer of AlAs, but a single layer of Al _x Ga _1-x As (x = 0.3 to 1), InGaP
Single layer, may be composed of at least one of _{Al x Ga 1-x As (} x = 0.3~1) / GaAs superlattice layer and InGaP / GaAs superlattice layer. In each of the above embodiments, the semiconductor substrate is made of GaAs, and the semiconductor high-concentration anode layer is made of n ⁺ -G
aAs, the semiconductor tunnel layer is made of AlAs, the semiconductor substrate is made of InP, the semiconductor high-concentration anode layer is made of n ⁺ -InGaAs, and the semiconductor tunnel layers are a single layer of InAlAs and a single layer of InAlAsP. , InAlAs / InGaAs
It may be composed of at least one of a superlattice layer and an InAlAsP / InGaAs superlattice layer. In each of the above embodiments, the cathode metal thin film is made of NiAl, but may be made of CoAl.

[0048]

As is apparent from the above description, the semiconductor tunnel device according to the first aspect of the present invention comprises a semiconductor tunnel layer and a cathode metal layer lattice-matched to the two semiconductor layers on a semiconductor high-concentration anode layer. Due to the lamination, the interface state between the two semiconductor layers and the cathode metal layer is greatly reduced. Therefore, by setting the thickness of the semiconductor tunnel layer to several atomic layers to several tens of atomic layers, ohmic conduction between the semiconductor high concentration anode layer and the cathode metal layer is prevented, and The depletion region on the side of the concentration anode layer can be made thin. Therefore,
A tunnel phenomenon in which the rise of current in the semiconductor tunnel layer is steep can be realized.

In this case, the rising voltage of the tunneling can be controlled by controlling the thickness of the semiconductor tunnel layer. Further, the breakdown voltage at the time of a negative bias can be controlled by changing the material of the semiconductor high-concentration anode layer.

That is, according to the present invention, the rise of the current is steeper than that of the existing Schottky diode or the like, the stability is better than the Zener diode, and the high frequency characteristic is equal to or higher than that of the Schottky diode. In addition, a semiconductor switching element having a low manufacturing cost and a simple structure can be obtained.

In the semiconductor tunnel device according to the second aspect of the present invention, the semiconductor substrate is a GaAs substrate,
The semiconductor high-concentration anode layer includes an n ⁺ -GaAs layer and an n ⁺ -
At least one of InGaAs layers, and the semiconductor tunnel layer is a single layer of Al _x Ga _1-x As (x = 0.3 to 1), InGaP
Monolayer, at least one of _{Al x Ga 1-x As (} x = 0.3~1) / GaAs superlattice layer and InGaP / GaAs superlattice layer, since the cathode metal layer is NiAl metal layer, The difference in lattice constant between the cathode metal layer and the semiconductor tunnel layer can be reduced to about 2%. Therefore, by optimally controlling the thickness of the semiconductor tunnel layer, it is possible to prevent ohmic conduction between the cathode metal layer and the high-concentration anode layer of the semiconductor, to control the tunnel effect, and to obtain a low rise voltage. Can be.

In the semiconductor tunnel device according to the third aspect of the present invention, the semiconductor substrate is an InP substrate,
The semiconductor high-concentration anode layer is an n ⁺ -InGaAs layer, and the semiconductor tunnel layer is an InAlAs single layer, InAlAl.
AsP monolayer, InAlAs / InGaAs superlattice layer and InAl
Since the cathode metal layer is at least one of an AsP / InGaAs superlattice layer and the cathode metal layer is a NiAl metal layer, the difference in lattice constant between the cathode metal layer and the semiconductor tunnel layer is about 2%.
%. Therefore, similarly to the case of the invention according to claim 2, by optimally controlling the thickness of the semiconductor tunnel layer, ohmic conduction between the cathode metal layer and the semiconductor high-concentration anode layer can be prevented, The tunnel effect can be controlled, and a low rising voltage can be obtained.

In the semiconductor tunnel device according to the fourth aspect of the present invention, the cathode metal layer in the semiconductor tunnel device according to the second or third aspect is a CoAl metal layer. The difference in lattice constant from the tunnel element can be reduced to about 2%. Therefore,
Similarly to the invention according to claim 2 or 3, by optimally controlling the thickness of the semiconductor tunnel layer,
Ohmic conduction between the cathode metal layer and the semiconductor high-concentration anode layer can be prevented, the tunnel effect can be controlled, and a low rise voltage can be obtained.

In the semiconductor tunnel device according to the fifth aspect of the present invention, the thickness of the semiconductor tunnel layer is 20 nm or less, so that the semiconductor high concentration anode layer between the semiconductor high concentration anode layer and the cathode metal layer is formed. The depletion region on the side can be made thinner, and electrons on the cathode metal layer side can easily tunnel to the semiconductor high concentration anode layer side. Further, since the thickness of the semiconductor tunnel layer is 5 nm or more, the contact between the semiconductor high-concentration anode layer and the cathode metal layer does not become ohmic, and can function as a high-speed switching element.

[0055] A method of manufacturing a semiconductor tunneling device of the invention according to claim 6 includes the steps of depositing using MBE method or MOCVD method n ⁺ -GaAs semiconductor high concentration anode layer on a GaAs substrate, the n ⁺ A step of sequentially epitaxially growing a semiconductor tunnel layer comprising at least one of an AlAs single layer and an AlAs / GaAs superlattice layer and a NiAl metal layer lattice-matched to the semiconductor layer on the -GaAs semiconductor high concentration anode layer; Since the method includes the step of annealing the laminate, the semiconductor tunnel device according to the second aspect of the present invention can be easily formed.

In this case, the semiconductor tunnel layer and the cathode metal layer are continuously epitaxially grown on the semiconductor high-concentration anode layer. The interface state with the cathode metal layer can be greatly reduced.
Further, the thickness of the semiconductor tunnel layer can be easily controlled.

Further, the integrated circuit of the invention according to claim 7 is:
A semiconductor high-concentration anode layer and a semiconductor tunnel layer are sequentially formed on an epitaxial wafer on which at least one of HBT and HEMT is deposited, and a cathode metal layer lattice-matched to the two semiconductor layers is formed on the semiconductor tunnel layer. The HBT or HEMT is electrically isolated from the high-concentration anode layer, the semiconductor tunnel layer and the cathode metal layer of the semiconductor, so that the HBT or HEMT is formed on the same substrate as the HBT or HEMT device. The semiconductor tunnel device of the invention can be integrated. Therefore, the manufacturing process of the integrated circuit can be simplified, and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a basic structure of a semiconductor tunnel device of the present invention.

FIG. 2 is a band diagram of the semiconductor tunnel device shown in FIG.

FIG. 3 is a current-voltage characteristic diagram of the semiconductor tunnel device shown in FIG.

FIG. 4 is a schematic sectional view of a semiconductor tunnel diode obtained from the semiconductor tunnel element shown in FIG. 1 and an equivalent circuit diagram thereof.

5 is a schematic cross-sectional view of a semiconductor tunnel diode different from FIG. 4 and an equivalent circuit diagram thereof.

FIG. 6 is a schematic cross-sectional view of a semiconductor tunnel diode different from FIGS. 4 and 5, and an equivalent circuit diagram thereof.

FIG. 7 is a current-voltage characteristic diagram of the semiconductor tunnel diode shown in FIGS. 4 to 6;

FIG. 8 shows a semiconductor tunnel diode shown in FIG.
It is a schematic diagram at the time of integrating with T.

FIG. 9 shows an example in which the semiconductor tunnel diode shown in FIG.
It is a schematic diagram at the time of integrating with MT.

[Explanation of symbols]

1,31,41: semi-insulating GaAs substrate, 2,32,42 ... non-doped AlGaAs layer, 3,13,23,33,43 ... n ⁺ -GaAs high concentration anode layer, 4,14,24,34,44 ... AlAs layer (tunnel layer), 5,15,25,35,45 ... NiAl metal thin film, 6,7,16,17,26,27,36,37,46,47,48
... electrodes, 38 ... HBT, 49 ... HEM
T.

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 29/73 H01L 29/80 E 29/778 21/338 29/812 27/095

Claims (7)

[Claims] A semiconductor tunnel layer and a cathode metal layer lattice-matched to the semiconductor high-concentration anode layer and the semiconductor tunnel layer are sequentially stacked on a semiconductor high-concentration anode layer formed on a semiconductor substrate. A semiconductor tunnel element characterized by the above-mentioned. 2. The semiconductor tunnel device according to claim 1, wherein the semiconductor substrate is a GaAs substrate, and the semiconductor high-concentration anode layer is an n ⁺ -GaAs layer and an n ⁺ -GaAs layer.
⁺ -InGaAs layer, and the semiconductor tunnel layer is a single layer of Al _x Ga _{1 -x} As (x = 0.3 to 1), InGa
A P single layer, at least one of an Al _x Ga _1-x As (x = 0.3-1) / GaAs super lattice layer and an InGaP / GaAs super lattice layer, and the cathode metal layer is a NiAl metal layer A semiconductor tunnel element characterized by the above-mentioned. 3. The semiconductor tunnel device according to claim 1, wherein the semiconductor substrate is an InP substrate, the semiconductor high-concentration anode layer is an n ⁺ -InGaAs layer, and the semiconductor tunnel layer is an InAlAs single layer. Layer, InAlAsP
Single layer, InAlAs / InGaAs superlattice layer and InAlAsP /
A semiconductor tunnel device, which is at least one of an InGaAs superlattice layer, and wherein the cathode metal layer is a NiAl metal layer. 4. The semiconductor tunnel device according to claim 2, wherein said cathode metal layer is a CoAl metal layer. 5. The semiconductor tunnel device according to claim 1, wherein said semiconductor tunnel layer has a thickness of 5 nm or more and 20 nm or less. 6. A GaAs substrate, n ⁺ -GaAs semiconductor height and step of concentration anode layer is deposited using molecular beam epitaxy or metal organic chemical vapor deposition, the n ⁺ -GaAs semiconductor high-concentration anode layer A semiconductor tunnel layer comprising at least one of an AlAs single layer and an AlAs / GaAs superlattice layer, and a NiAl metal layer lattice-matched to the semiconductor high-concentration anode layer and the semiconductor tunnel layer.
A method for manufacturing a semiconductor tunnel device, comprising: a step of sequentially performing epitaxial growth; and a step of annealing the laminate. 7. A semiconductor high-concentration anode layer and a semiconductor tunnel layer are sequentially formed on an epitaxial wafer on which at least one of a hetero-bipolar transistor and a high electron mobility transistor is deposited, and the semiconductor tunnel layer is formed on the semiconductor tunnel layer. A cathode metal layer lattice-matched to the concentration anode layer and the semiconductor tunnel layer is formed. The hetero bipolar transistor or the high electron mobility transistor and the semiconductor high concentration anode layer, the semiconductor tunnel layer and the cathode metal layer are mutually separated. An integrated circuit characterized by being electrically isolated.