JP2000105726A - Device and method for storage and reproduction - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a storage system which has a short access time and is low in cost. SOLUTION: The system is equipped with a 1st storage part 11 which has a short access time, a 2nd storage part 12 which has a long access time and is low in cost, and a switch part 13 which controls the input and output of data. At the time of storage, the switch part 13 stores the head part of successive data in the 1st storage part 11 and following data in the 2nd storage part 12. At the time of reproduction, the switch part 13 reproduces the head data in the 2nd storage part 12 within the access time of the 2nd storage part 12 and then start reproducing the following data. The reproduction is started from the 1st storage part 11, then the access time can be shortened. Further, the 2nd storage part 12 is used, then the cost can be suppressed low.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a storage / reproduction device and a storage / reproduction method for storing / reproducing continuous data, and more particularly to a storage / reproduction device and a storage / reproduction method using two different storage devices. .

[0002]

2. Description of the Related Art Conventionally, in an information processing system including a processing device such as a microprocessor and a main storage device, the processing speed of the entire system is reduced due to the processing speed of the main storage device being lower than that of the processing device. To reduce the drop,
Cache memory is being used. By the way, in an information processing system provided with a cache memory, when a cache miss occurs, data is transferred between the cache memory and the main storage device. However, this transfer is continuously performed by the size of the cache block. Is performed.

[0003] In an information processing system, when various processes are performed on temporally continuous data such as audio and video data, it is widely practiced to digitize these data and perform processing on the digital data. Have been done.
Even in such processing, data transfer is continuously performed between the processing device and the storage device.

As described above, in the information processing system, continuous transfer of data is frequently performed, and therefore, it is preferable that the transfer can be performed at high speed. In the following, data transferred continuously is referred to as continuous data.

When the storage device is a general semiconductor memory, there are two factors that define the time required for transferring continuous data (access time in a broad sense). One factor is the time from when an address is given to the storage device to when output of the first data is started (access time in a narrow sense). Hereinafter, the access time in a narrow sense is simply referred to as the access time.
Another factor is a time interval (cycle time) at which subsequent data is output from the storage device.

The time T required for continuous data transfer is
Can be expressed as the following equation (1), where the access time is ta, the cycle time is tc, and the number of data words is n. T = ta + tc × n (1) In general, in a semiconductor memory, the access time tends to be longer than the cycle time.

[0007] Even when the storage device is a disk-type storage device such as a hard disk, the above-described access time and cycle time can be specified. That is, an access time is defined as a period from when an access command is issued until the first data is output, and a time when data stored in an area continuous with the area where the data is stored on the disk surface is output. The interval may be defined as a cycle time.

[0008] As described above, in the information processing system,
It is important to reduce the time required for transferring continuous data, and this can be achieved by reducing the access time and cycle time of the storage device. For this reason, for example, in a storage device using a semiconductor memory, a configuration using a high-speed static ram having a short access time and a short cycle time can be considered. However, such rams are generally expensive.

Most of the access time in the disk storage device is occupied by the time required for the head to move to the track where data is stored, that is, the seek time. Since the seek time is determined by the physical moving speed of the head, it is difficult to reduce the access time in the disk storage device.

Therefore, two different storage devices, that is, a small-capacity storage device having a short access time and a short cycle time, and a large-capacity storage device having a long access time but a short cycle time are used for continuous storage. By realizing a large-capacity storage / reproduction device having a short data access time and a short cycle time, the time required for transferring continuous data can be reduced, and the price performance of an information processing system using this storage / reproduction device will be reduced. The ratio can be increased.

A conventional technique for shortening the time required for transferring continuous data, that is, increasing the speed of accessing continuous data by using a storage / reproducing apparatus including two different storage devices is disclosed in Japanese Unexamined Patent Publication No. No. 2,110,988. Hereinafter, the related art in this publication is referred to as a first related art. FIG. 31 is a block diagram for explaining the storage / reproduction device described in this publication.
As shown in this figure, this system includes a recording medium 90.
0, a semiconductor memory 901, a control device 902, and an input / output device 903.

The storage and reproduction of continuous data in the storage / reproduction device will be described below. In this system, before the start of recording the continuous data on the recording medium 900,
In addition, a preparation time is required before the reproduction from the recording medium 900 is started. The preparation time is, for example, a moving time of the recording / reproducing head. Also, in this system,
After the start of recording / reproduction, data can be recorded on the recording medium 900 at a speed higher than the data supply speed from the input / output device 903, and reproduction can be performed at the same speed as the data supply speed to the input / output device 903.

First, the continuous data D1 is stored in the recording medium 900.
The operation for recording .about.D3 will be described. The continuous data D1 is data composed of data p10 and p11, the continuous data D2 is data composed of data p20 and p21, and the continuous data D3 is data p30 and p21.
This is data consisting of p31. FIG. 32 is an explanatory diagram showing a state at a certain time during a recording operation in this system. The state shown in this figure is a state in which the input and storage of the continuous data D1 have been completed, and the input of the continuous data D3 to the input / output device 903 has been started. The portions indicated by broken lines on the recording medium 900 indicate locations where the continuous data D2 and D3 are to be recorded.

In this example, after the recording of the data p10 and p11 in the continuous data D1 is completed, the input / output device 90
3, p30 is input following p11. However, since the recording medium 900 requires the preparation period described above, the recording of p30 cannot be started immediately after the recording of p11 is completed. Therefore, FIG.
As shown in FIG. 2, the control device 902 stores p30 in the semiconductor memory 901 once.

After that, when the recording medium 900 is ready,
The control device 902 reads p30 from the semiconductor memory 901 and records it on the recording medium 900 in the high-speed recording mode. At this time, since the input of p31 to the input / output device 903 has been started, the control device 902 stores p31 in the semiconductor memory 901 in parallel with the recording of p30 from the semiconductor memory 901 to the recording medium 900.

Here, the recording on the recording medium 900 is performed faster than the input to the input / output device 903. Therefore, the amount of data in the semiconductor memory 901 gradually decreases. When there is no more data in the semiconductor memory 901, the control device 902 changes the recording mode on the recording medium 900 to the normal mode, that is, the input / output device 903.
To return to the mode in which recording is directly performed on the recording medium 900, and the subsequent recording is continued.

Next, an example of a reproducing operation in this system will be described. In this example, continuous data D1 to D3 are stored in the recording medium 900, and D1
And the operation for reproducing D3 will be described. In this system, p10, p20 and p30 in the continuous data D1 to D3 are stored in the recording medium 9 by the system.
When 00 is loaded, the data is copied from the recording medium 900 to the semiconductor memory 901.

FIG. 33 is an explanatory diagram showing a state at a certain time during a reproducing operation in this system. The state shown in this figure is a state in which the output / reproduction of the continuous data D1 has been completed and the output of the continuous data D3 has started. In this state, the input / output device 903 is required to output p30 following p11. However, the recording medium 9
Since 00 requires a preparation period, the reproduction of p30 cannot be started immediately after the reproduction of p11 is completed. Therefore, the control device 902 reads p30 copied in advance from the semiconductor memory 901 and outputs it.
In addition, the control device 902 instructs the recording medium 900 to reproduce from p31 instead of p30. By the time the output of p30 from the semiconductor memory 901 is completed,
Since the recording medium 900 is ready, the output of p31 is performed from the recording medium 900.

Next, as another conventional technique for accelerating the access to continuous data, there is disclosed “Transistor Technology, Vol.
No. 248-256 ", the synchronous dynamic ram will be described. In the following, this conventional technique is referred to as a second conventional technique. Further, since the synchronous dynamic ram is widely known, a detailed description thereof will be omitted, and only a basic operation will be briefly described.

FIG. 34 is a timing chart showing a read operation of continuous data in the synchronous dynamic ram. In this figure, a0-a3 and b
0 and b1 indicate data words of the continuous data Da and Db, respectively.

As shown in this figure, in the second prior art, one ram is divided into two banks, and in parallel with reading of the continuous data Da stored in one bank, the other ram is divided into two banks. By issuing a read command (read) of the stored continuous data Db, immediately after the continuous data Da is completely read, the continuous data Db is read.
The reading of b can be started. Therefore, in this configuration, the access time ta is equal to the cycle time t.
continuous data Da and Db
Is not interrupted. Here, in the currently manufactured synchronous dynamic ram products, the access time ta has a time length twice to three times the cycle time tc.

[0022]

However, in the storage / reproducing apparatus shown as the first prior art, data must be recorded from the semiconductor memory 901 to the recording medium 900 in the high-speed recording mode when recording continuous data. . Therefore, there is a problem that power consumption and cost in the system increase. When the system is in the high-speed recording mode, writing and reading are performed in parallel to the semiconductor memory 901, so that the high-speed semiconductor memory 90
1 is required, and there is a problem that power consumption and cost in the semiconductor memory 901 increase.

Further, in the storage / playback apparatus, when playing back continuous data, data is copied from the storage medium 900 to the semiconductor memory 901 when the storage medium 900 is loaded. However, there is a problem that power consumption and cost in the system increase due to the necessity of a conversion step and time. Further, for every continuous data stored in the recording medium 900, a part thereof is stored in the semiconductor memory 901. Therefore, it is necessary to increase the capacity of the semiconductor memory 901 according to the increase in the number of continuous data. Also in this respect, the cost is increased.

Further, the synchronous dynamic ram shown as the second prior art has a configuration in which the same ram is divided and used, so that two banks have the same performance. For this reason, if a ram having a short access time is used, the access time of the two banks is shortened, and the cost is increased. In order to shorten the access time in this RAM, a configuration for predicting the capacity of continuous data to be accessed in advance is necessary.
This leads to an increase in cost.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and has as its object to provide a storage / reproduction device having a short access time and a low cost, and a storage device used in the storage / reproduction device. And a reproduction method.

[0026]

In order to achieve the above object, a storage / reproduction device according to the first aspect of the present invention comprises:
When storing continuous data in a storage / reproducing apparatus including a first storage unit having an access time of, and a second storage unit having a second access time longer than the first access time, While the first data group including the leading data is input to the first storage unit,
When a second data group including subsequent data following each data in the data group is input to the second storage unit, and when continuous data is reproduced, each data in the first data group is stored in the first storage unit. And a control unit for outputting, from the second storage unit, subsequent data following each of the data while outputting the data from the second storage unit.

[0027] According to a tenth aspect of the present invention, there is provided a storage / reproduction method, comprising: a first storage unit having a first access time;
In the storage / reproduction method for storing / reproducing continuous data using the second storage unit having a second access time longer than the first access time, the first data group including the leading data in the continuous data may be stored in the first storage unit. Continuous data is stored in the first storage unit by storing a second data group including subsequent data following each data in the first data group in the second storage unit. It is characterized in that continuous data is reproduced by outputting each data in a data group from the first storage unit and outputting subsequent data following the respective data from the second storage unit.

In the above configuration or method, the access time is the time from when an address is given to the storage unit to when output of the first data is started. Further, continuous data is data that is preferably transferred continuously.

According to the configuration or method described above, the first data group including the leading data of the continuous data is stored in the first storage unit having a short access time. Here, the leading data is data constituting the leading part of the continuous data, and is composed of one or more data words.

That is, the first storage unit having a short access time stores data of a predetermined portion of the continuous data including the head data of the continuous data. Further, the second storage unit having a long access time and low cost stores subsequent data which is a portion subsequent to each data constituting the first data group.

When reproducing the continuous data, each data of the first data group is output from the first storage unit, and data subsequent to each of the data is output from the second storage unit. Has become. That is, in the above configuration or method, first, the first data is input or output (input / output) to / from the first storage unit having a short access time, and then the input / output of subsequent data is performed to / from the second storage unit. Do. Then, when the data following the subsequent data is included in the first data group, input / output to / from the first storage unit is performed again.

Therefore, according to the above configuration or method, when the continuous data is stored and reproduced, the input / output of the head data of the continuous data is performed to / from the first storage unit having a short access time. Access time can be shortened. Further, since the low-cost second storage unit is used, it is possible to reduce the cost of the entire apparatus. Furthermore, since it is not necessary to store all the data of the first data group in the second storage unit, the storage capacity of these storage units can be used efficiently. Therefore, according to the above configuration or method, it is possible to shorten the access time when storing and reproducing continuous data, and to store and reproduce continuous data at low cost.

Further, if the first and second storage units having a short cycle time are used, the above configuration or method can provide a low-cost storage / reproduction device or a low-cost storage / reproduction method in which both the access time and the cycle time are short. Become.

The access to the second storage unit is started at
It is preferable that the output be performed before the output of each data from the first storage unit ends. That is, it is preferable that a part of the time during which the output from the first storage unit is being performed overlaps a part of the second access time. According to this configuration, after the output of the data from the first storage unit is completed, a period until the subsequent data of the data is output is
It is possible to make the time shorter than the second access time.

According to a second aspect of the present invention, in the storage / reproducing apparatus according to the first aspect, when the control section stores or reproduces continuous data, the control section inputs each data in the first storage section. Alternatively, the access time of the second storage unit is terminated before the output is terminated.

According to the above configuration, the access time of the second storage unit is completed before the input / output of each data in the first data group is completed. Immediately after the input / output, the subsequent data in the second data group can be input / output. Therefore, there is no interruption in data input / output when the storage unit for input / output is switched. As a result, continuous data in which output is not preferably interrupted during reproduction, for example,
It is possible to store and reproduce continuous data such as music data.

According to a third aspect of the present invention, in the storage / reproducing apparatus according to the second aspect, the control unit is configured to determine a time at which access to the second storage unit is started and a time period at which the first storage unit is accessed. By controlling the size of each data of the first data group to be stored, the access time of the second storage unit is completed before the input or output of each data in the first storage unit is completed. And

According to the above configuration, the control unit controls the size of each data stored in the first storage unit and controls the time required for inputting and outputting each of the data. . Further, the control unit controls the time at which access to the second storage unit is started. These controls are performed so that the access time of the second storage unit ends before the output from the first storage unit or the input to the first storage unit is completed.

For example, the size of the data stored in the first storage unit can be determined as follows. That is, the time from the access start time to the first storage unit to the access start time to the second storage unit is represented by td, the first and second times.
Assuming that the access time of the storage unit is ta1 and ta2, and the cycle time of the first storage unit is tc, the size L of each data stored in the first storage unit is L ≧ (ta2−ta1 + td) / tc. (A). Here, control is also conceivable in which td is negative, that is, access to the first storage unit is started after access to the second storage unit is started.

Thus, according to the above configuration, before the input / output of each data in the first data group is completed,
Since the access time of the second storage unit can be surely ended, the configuration described in claim 2 can be easily realized.

According to a fourth aspect of the present invention, in the storage / reproducing apparatus according to the second aspect, the control unit, when storing the continuous data, sets the end of each data in the first data group. Storing the portion in the second storage unit as a leading portion of each subsequent data in the second data group;
When reproducing the continuous data, when the tail portion is output from the first storage unit, the head portion is simultaneously read from the second storage unit.

According to the above configuration, when the first storage section outputs the end of each data, the second storage simultaneously reads the same data as the end. Therefore, if the control unit outputs the subsequent data from the second storage unit during the reproduction of the tail part, the output of the continuous data is not interrupted. That is, according to the above configuration, it is possible to ease the restriction on the timing of switching the storage unit so that the continuous data is output without interruption.

According to a fifth aspect of the present invention, there is provided a storage / reproducing apparatus, wherein a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time. When storing continuous data, all parts of the continuous data are stored in the second storage unit, and when the continuous data is reproduced, the continuous data is stored in the first storage unit. When the head data of the data is stored, the head data is output to the first storage unit, and the subsequent data following the head data is stored in the second storage unit.
If the head data is not stored in the first storage unit while the data is output from the storage unit, all the data is output to the second storage unit and the head data in the continuous data is stored in the first storage unit. Is provided with a control unit for storing the information.

Further, in the storage / reproduction method according to claim 11 of the present invention, a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time are provided. In the storage / reproduction method for storing / reproducing continuous data using the two storage units, all parts of the continuous data are stored in the second storage unit, and the first data of the continuous data is stored in the first storage unit. If you have
The head data is output to the first storage unit, and the subsequent data following the head data is output from the second storage unit. If the head data is not stored in the first storage unit, It is characterized in that all the data is output to the second storage unit and the leading data in the continuous data is stored in the first storage unit to reproduce the continuous data.

In the above configuration or method, the first storage unit is a buffer storage device in a storage / reproduction device having a high access time, such as a cache memory. Further, the second storage unit is a main storage device in the storage / reproduction device. For this reason, all the continuous data is stored in the second storage unit. According to the above configuration or method, when the continuous data is reproduced, if the leading data of the continuous data is stored in the first storage unit, the leading data is stored in the first data having a short access time. Is output from the storage unit. Therefore, it is possible to shorten the access time of the storage / reproduction device.

When the first data is not stored in the first storage section, all the data of the continuous data are stored in the second storage section.
Output from the storage unit to the outside. And at the time of this output,
The head data is output to the outside and stored in the first storage unit.

Therefore, according to the above configuration or method, it is possible to copy the head data without providing an initialization step and time for copying the head data from the second storage unit to the first storage unit. It is possible. Thus, when the continuous data is reproduced again, the head data can be output from the first storage unit having a short access time. Therefore, according to the above configuration or method, it is possible to shorten the access time when storing and reproducing continuous data, and to store and reproduce continuous data at low cost.

In the above configuration or method, the first
Rather than storing the head data of all the continuous data stored in the second storage unit in the storage unit, the continuous data that has been reproduced once, that is, the head data of the continuous data with a high reproduction frequency is stored. I have. That is, in this configuration, the number of head data stored in the first storage unit does not increase in proportion to an increase in continuous data stored in the second storage unit. Therefore, the capacity of the first storage unit (or the ratio of the capacity of the first storage unit and the second storage unit) can be set to a value desired by the user, so that the cost can be further reduced.

Furthermore, if the first and second storage units are short in cycle time, the above configuration or method can be used as a low-cost storage / reproduction device or storage / reproduction method with both short access time and short cycle time. Become.

According to a sixth aspect of the present invention, in the configuration of the fifth aspect, when the first data in the continuous data is stored in the first storage section, When updating the continuous data stored in the second storage unit, the control unit also updates the leading data stored in the first storage unit.

According to the above configuration, when the continuous data reproduced once is updated, the head data of the continuous data stored in the first storage unit which is the cache memory is also updated at the same time. Therefore, even after updating, continuous data with a high reproduction frequency can be reproduced in a short access time.

According to a seventh aspect of the present invention, in the storage / reproduction device according to the fifth aspect, the control unit, when storing or reproducing the continuous data, stores the first data from the first storage unit. Before the output is completed, the access time of the second storage unit is ended.

According to the above configuration, the access time of the second storage unit is completed before the output of the first data from the first storage unit is completed. Can be output. Therefore, there is no interruption in data input / output when the storage unit for input / output is switched. Therefore, it is possible to store / reproduce continuous data whose output is not preferably interrupted during reproduction, for example, continuous data such as music data.

Further, in the storage / reproduction device according to claim 8 of the present invention, in the configuration of claim 7, the control unit sets a time at which an access to the second storage unit is started and a time at which the first storage unit is accessed. By controlling the size of the head data to be stored, the access time of the second storage unit ends before the output of the head data from the first storage unit ends.

According to the above configuration, the control unit controls the size of the head data stored in the first storage unit and controls the time required for outputting the head data. Further, the control unit controls the time at which access to the second storage unit is started. This control is performed so that the access time of the second storage unit ends before the output of the first storage unit is completed. Further, for example, the control of the size of the head data may be performed using the above equation (a). Thus, according to the above configuration, the access time of the second storage unit can be surely ended before the output of the first data from the first storage unit ends, so that the configuration according to claim 7. Can be easily realized.

According to a ninth aspect of the present invention, in addition to the configuration according to any one of the first to eighth aspects, in addition to the configuration according to any one of the first to eighth aspects, a first data group stored in the first storage section is stored. An arithmetic unit is provided for calculating at least one of the size and storage location of each data based on the address on the storage / reproduction device where the data is stored.

According to the above configuration, the arithmetic unit calculates at least one of the size and the storage location of the data in the first storage unit based on the address where the data is stored. ing. Thereby, the first
Even if the storage unit does not include a management tag or the like in which the size of the data is written, the control unit can easily acquire the timing at which the input of the data to the first storage unit ends. Therefore, the control unit can easily and accurately determine the timing for outputting the subsequent data from the second storage unit.

[0058]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] A first embodiment of the present invention will be described below. FIG. 1 is a block diagram showing a configuration of a storage / reproduction device 1 which is a storage / reproduction device according to the present embodiment. As shown in this figure, the storage and playback device 1 includes a first storage unit 11, a second storage unit 12, and a switch unit (control unit) 13. The storage / reproduction device 1 can be used, for example, as a storage / reproduction device in an information processing device, and is particularly a storage / reproduction device effective as a storage / reproduction device in an information processing device that processes continuous data. The storage / reproduction device 1 outputs stored data or stores input data according to an address input signal, an access start signal, an input / output clock signal, and the like transmitted from an information processing device or the like. Things.

First, the configuration of the storage / reproduction device 1 will be described. The first storage unit 11 is a memory in which both the access time and the cycle time are short. As the storage / reproduction device 1, for example, a high-speed static ram can be used. The second storage unit 12 is a low-cost memory having a larger capacity than the first storage unit 11 and having a long access time and a short cycle time. As the second storage section 12, for example, a dynamic ram, a disk-type storage device, or the like can be used.

As shown in FIG. 1, the first storage section 11 has an address input port 31, a data input / output port 32, and an input / output clock signal input terminal 33. Similarly, the second storage unit 12 includes an address input port 41, a data input / output port 42, and an input / output clock signal input terminal 43.

The address input ports 31 and 41 are terminals for externally inputting an address input signal AI.
The data input / output ports 32 and 42 are terminals for outputting data to the outside or for inputting data from the outside. Also, the input / output clock signal input terminal 33
43 is a terminal for externally inputting the input / output clock signal CK.

Then, the first and second storage units 11 and 12
When an address is input from the address input ports 31 and 41, access to this address is started.
Then, after the access to the input address is completed, the access to the address continuous with this address is performed in synchronization with the input / output clock signal CK input from the input / output clock signal input terminals 33 and 43. ing.

For example, when an address input signal AI indicating the address 1000 is input to the address input ports 31 and 41, first, the data stored at the address 1000 is transferred from the storage units 11 and 12 to the data input / output port 32. -Output from 42. Thereafter, the data stored at addresses 1001, 1002,... Is output in synchronization with the input / output clock signal CK.

Note that access means inputting (writing) or outputting (reading) data to and from the storage units 11 and 12. Accessing an address means writing data to a specific storage location of the storage unit 11 or 12 specified by the address, or reading data stored in this storage location.

The switch section 13 has a first storage section 11 and a second storage section 11.
One of the storage units 12 is connected to a processing device external to the storage / reproduction device 1, and data is input / output to / from the first storage unit 11 or the second storage unit 12. FIG. 2 is a block diagram showing the configuration of the switch unit 13. As shown in this figure, the switch unit 13 includes a multiplexer 5
1, a counter 52, and logic gates 53 and 54.

The multiplexer 51 has a data input / output port 55. This data input / output port 55
A connection terminal for inputting and outputting data to and from the storage / reproduction device 1. The multiplexer 51 is provided with a switch control signal CS input from a counter 52 described later.
The data input / output port 55 and the data input / output port 32 in the first storage unit 11 or the data input / output port 42 in the second storage unit 12 are selectively connected based on the following. That is, the multiplexer 51
Is connected between the data input / output port 32 and the data input / output port 55 when the switch control signal CS is at the L level (low level), and when the switch control signal CS is at the H level (high level). , Data input / output port 4
2 and the data input / output port 55.

The counter 52 controls the multiplexer 51 by the switch control signal CS to connect the data input / output port 55 to the data input / output port 32 or the data input / output port 42. Also, the counter 52 controls logic gates 53 and 54 to be described later,
The first storage unit 11 or the second storage unit 12 outputs the input / output clock signal CK.

The counter 52 includes an input / output clock signal input terminal 61 for inputting an input / output clock signal CK from outside, an access start signal input terminal 62 for inputting an access start signal AS, and a switch control signal CS to be described later. Is provided with a switch control signal output terminal 63 for outputting the same. Then, the input / output clock signal C
By counting K, the storage unit storing the currently read data and the time when the reading of this data is completed are determined. Then, a switch control signal CS for switching the multiplexer 51 is output based on the result of this determination. Further, the counter 52 is reset when the access start signal AS is input, that is, the count number becomes zero.

The logic gates 53 and 54 receive the switch control signal CS and the input / output clock signal CK output from the counter 52, and based on these signals CS and CK, the first storage unit 11 and the second storage unit 11. The input / output clock signal CK is output to the unit 12. That is, the logic gate 53 outputs the input / output clock signal CK to the first storage unit 11 when the switch control signal CS is at the L level. The logic gate 54 outputs the input / output clock signal CK to the second storage unit 12 when the switch control signal CS is at the H level. Hereinafter, an input / output clock signal output from the logic gate 53 to the first storage unit 11 is referred to as an input / output clock signal CK1, and an input / output clock signal output from the logic gate 54 to the second storage unit 12 is input / output. Clock signal C
K2.

Further, by the control by the counter 52 as described above, in the switch unit 13, while the data input / output port 55 and the data input / output port 32 of the first storage unit 11 are connected, the logic gate 53 First storage unit 1
1, the input / output clock signal CK1 is output. On the other hand, while the data input / output port 55 is connected to the data input / output port 42 of the second storage unit 12, the input / output clock signal CK 2 is output from the logic gate 54 to the second storage unit 12. Has become.

Next, the operation of the storage / reproduction device 1 will be described. FIG. 3 illustrates the first storage unit 11 and the second storage unit 11 illustrated in FIG.
FIG. 4 is an explanatory diagram illustrating an example of a storage (storing) state of continuous data in a storage unit 12. In the following, based on this example,
An operation of reading out continuous data in the storage / reproduction device 1 will be described.

As shown in this figure, in this example, continuous data D1 to D4 are stored in the storage / reproduction device 1. These continuous data D1 to D4 are respectively composed of two block data p10 and p11, block data p20 and p21, block data p30 and p31, and block data p40 and p41. The block data p10, the block data p20, the block data p30, and the block data p40 are stored in the first storage unit 11 as a first data group. On the other hand, block data p11 and block data p2
1, block data p31 and block data p41
Are stored in the second storage unit 12 as a second data group. The block data is data obtained by dividing continuous data by a predetermined size, and is composed of one or more data words.

FIG. 4 is an explanatory diagram showing a part of a timing chart showing operation timings when reading out the continuous data D1 to D4 from the storage / reproduction device 1. In the following, the block data p1 shown in FIG.
0 is composed of data words d0 and d1, and block data p11 is composed of data words d2 to d7. The output from the storage / reproduction device 1 is continuous data D1 to D
4 can be performed in any order.
Only the output of the continuous data D1 will be described.

In the following, the access times of the first storage unit 11 and the second storage unit 12 will be referred to as ta1 and ta, respectively.
Let it be 2. Further, the first storage unit 11 and the second storage unit 12
Are cycle times tc1 and tc2, respectively. Therefore, the minimum value of the cycle in the input / output clock signal CK1 is limited by the cycle time tc1. The minimum value of the cycle in the input / output clock signal CK2 is limited by the cycle time tc2. Furthermore, hereinafter, these cycle times tc1 and tc2 are the same and ta2 = t
Let it be a1 + 2tc1.

As shown in FIG. 4, at the time of access start at time t1, an access start signal AS is input to the counter 52 of the switch unit 13 from an information processing device (not shown), and the address input signal AI is stored in the first memory. The data is input to the unit 11 and the second storage unit 12. This address input signal AI is the continuous data D1 required by the information processing device.
Corresponds to the address where the data corresponding to the data is stored. Then, with this input, the first storage unit 11 and the second storage unit 12 start accessing the input address.

At this time, the counter 52 is reset in the switch section 13 in response to the input of the access start signal AS. Then, the counter 52 outputs the switch control signal CS to the L level, to the multiplexer 51 and the logic gates 53 and 54. Multiplexer 51
Is based on the L level switch control signal CS,
The data input / output port 32 and the data input / output port 55 in the first storage unit 11 having a short access time are connected. Thus, the output from the first storage unit 11 becomes the output from the storage / reproduction device 1. Also, the logic gate 53
Based on this L-level switch control signal CS, the first
The input / output clock signal CK1 is output to the storage unit 11.

At time t2 after the elapse of the access time ta1 of the first storage unit 11 from time t1, the first storage unit 11 starts the block (head data) of the continuous data D1 based on the address input signal AI. Access the data word d0 of the data p10 and output this data. Then, the first storage unit 11 accesses the subsequent data word d1 based on the input / output clock signal CK1 and outputs this data after the cycle time tc1 of the first storage unit 11 from time t2.

On the other hand, the counter 52 stores the data word d1
Is output at time t3 after elapse of tc1 from time t1.
The completion of the output of the block data p10 is detected based on the count value (the number of cycles, etc.) of the input / output clock signal CK counted from the above, and the switch control signal CS is set to the H level. The multiplexer 51 connects the data input / output port 42 and the data input / output port 55 in the second storage unit 12 based on the H level switch control signal CS. Thereby, the output from the second storage unit 12 becomes the output from the storage and playback device 1. In addition, the logic gate 54 supplies the input / output clock signal CK2 to the second storage unit 12 based on the H level switch control signal CS.
Is output. On the other hand, the logic gate 53 stops outputting the input / output clock signal CK1 to the first storage unit 11 based on the switch control signal CS.

The time t3 is the second time from the time t1.
This is the time when the access time ta2 of the storage unit 12 has elapsed. Accordingly, at this time, the second storage unit 12 accesses the data word d2, which is the data following the data word d1, and outputs this data. After outputting the data word d2, the second storage unit 12 stores the data words d3 to d3 to subsequent to the data word d2 based on the input / output clock signal CK2.
Access d7 and output these data.

As described above, in the storage / reproduction device 1, the first data (block data p10, p20, p30 and p40) in the continuous data D1 to D4 is stored in the first storage unit 1.
1 and the other parts are stored in the second storage unit 1
2 is stored. That is, in the storage / reproduction device 1, the continuous data D1 to D4 are stored in the first storage unit 11
And the second storage unit 12. When reading the continuous data D1 to D4, the first storage unit 11 and the second storage unit 12 start accessing at the same time. And the second
Reading of data from the first storage unit 11 is completed within the access time of the storage unit 12.

Therefore, the access time of the storage / reproduction device 1 becomes the access time ta1 of the first storage unit 11 which is shorter than the access time ta2 of the second storage unit 12, and the continuous data D1 to D4 can be read with this access time. It can be carried out. Further, in the storage / reproduction device 1, although the access time is the access time ta1, since the capacity is large, the cycle time is short, and the low cost second storage unit 12 is used, the overall cost is reduced. It is possible to reduce it. That is, the storage and playback device 1
Both the access time and the cycle time are short, and the storage and reproduction device is low in cost.

Further, in the storage / reproduction device 1, the same data is not redundantly stored in both the first storage unit 11 and the second storage unit 12. Therefore, no extra storage capacity is consumed for realizing a short access time, so that the storage capacity of these storage units 11 and 12 can be effectively used.

In the storage / playback apparatus 1, the first storage unit 1
If the cycle time tc1 of one and the cycle time tc2 of the second storage unit 12 are the same, the reading of the data word can be continued in a constant cycle time. Further, in the storage / reproduction device 1, writing can be realized by reversing the flow of data, and the access time for writing continuous data can be shortened in the same manner as in reading.

In FIG. 4, ta1 = tc1
= (Ta2) / 3 = tc2, but the storage unit 11
The relationship between the access time and the cycle time in 12 is not limited to this.

In the present embodiment, the storage unit 11.1
2, the relationship between the access time and the cycle time is
It is assumed that ta1 + 2tc1 = ta2. However, the configuration of the storage / reproduction device 1 is not limited to this. For example, the relationship between the access time and the cycle time in the storage units 11 and 12 may be such that ta1 + 2tc1 ≧ ta2. Even in this case, at time t3 in FIG. 4, the access time ta2 of the second storage unit 12 has ended, and at this time, the reading of the data word d2 in the block data p11 is started. After this reading, the subsequent data words d3 to d7 are output based on the input / output clock signal CK2 at every cycle time tc2.

Further, this relationship is such that ta1 + 2tc1 <t
In the case of a2, it takes tc1 or more after the data word d1 is output until the data word d2 is output. Accordingly, the period from the output of the data word d1 to the output of the data word d2 is long, but this period is shorter than the access time of the second storage unit 12.

In this embodiment, tc1 = tc2
However, the relationship between the access time and the cycle time in the first storage unit 11 is not limited to this, and may be tc1
$ Tc2. In this case, the cycle at which the data word is read is the time after the data word d2 is read.
Change. However, even in this case, the access time of the storage / reproduction device 1 is still the access time of the first storage unit 11.

In the present embodiment, referring to FIG.
An example of the storage state of the continuous data D1 to D4 in the storage and playback device 1 has been described. However, the storage state of the continuous data D1 to D4 in the storage / reproduction device 1 is not limited to this example. For example, when the size of each of the continuous data D1 to D4 is not uniform, the data may be stored as shown in FIG. As shown in this figure, in this example, the continuous data D2 consists only of p20. If the continuous data is sufficiently short as in the continuous data D2, the entire continuous data may be stored in the first storage unit 11.

Further, there is a storage element in which the number of continuous data accesses is limited, such as page mode access of a dynamic RAM. Such a storage element is called a second
When used as the storage unit 12, the continuous data D1 to D
4 (for example, the block data p in FIG. 3)
11) cannot be increased indefinitely.

Therefore, reading of the continuous data D1 to D4 in this case will be described below. FIG.
FIG. 9 is an explanatory diagram showing an example of a storage state of continuous data D1 to D4 suitable for this case. As shown in this figure, in this example, the continuous data D1 is composed of block data p10 to p1.
3, continuous data D2 is p20 / p21, continuous data D3
Is block data p30 to p33, and the continuous data D4 is block data p40 to p44. In the following, the upper limit of the number of consecutive accesses in the second storage unit 12 is defined as a specified number of accesses.

As in this case, when the number of consecutive accesses to the second storage unit 12 is limited,
The first storage unit 11 stores the head block data of the continuous data, and the second storage unit 12 stores the subsequent block data of the head block data by an amount that can be read within the specified access count. Remember. Then, the remaining block data is stored in the first storage unit 11, or in the first storage unit 11 and the second storage unit 12.

The operation of reading the continuous data D1 stored as described above will be described. After the start of access, the block data p10 is stored in the first block in the same manner as the timing shown in FIG.
The block data p11 is output from the storage unit 11, and then the block data p11 is output from the second storage unit. Block data p11
After the completion of the output, the counter 52 outputs the switch control signal CS
Is set to the L level again, the data input / output port 32 and the data input / output port 55 are connected, and the block data p12 is output from the first storage unit 11.

While the block data p12 is being output, the second storage unit 12 prepares for reading so that the data can be accessed again. And
After the output of the block data p12 is completed, the counter 52
The switch control signal CS is set to the H level, and the data input / output port 42 and the data input / output port 55 are connected.
The storage unit 12 outputs the block data p13. By performing storage / reproduction in this manner, the second storage unit 1
Even if the number of accesses is restricted by the prescribed number of accesses, it is possible to read out very long continuous data.

The storage / reproduction method applied to the storage / reproduction device 1 can also be expressed as follows. That is, this storage / reproduction method includes a first storage unit having a short access time and a short cycle time, a second storage unit having a long access time but a short cycle time, an input / output port of the first storage unit, and a second storage unit. A storage / reproducing method applied to a storage / reproducing apparatus having switch means for selecting an input / output port of a unit as appropriate and connecting to an input / output port of the entire storage / reproducing apparatus, wherein a part of continuous data is stored in a first storage unit. Alternatively, it can be expressed as a method of controlling the switch unit to store the remaining part in the second storage unit. According to this method, the access time for continuous data can be reduced, and the high use efficiency of the storage unit can be realized.

[Second Embodiment] A second embodiment of the present invention will be described below. The first embodiment described above
The members having the same functions as the members shown in (1) are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 7 is a block diagram showing a configuration of a storage / reproduction device 1a, which is a storage / reproduction device according to the present embodiment. As shown in FIG.
In the configuration of the storage / reproduction device 1 shown in FIG.
This is a configuration including a switch unit 13a instead of 3.

First, the configuration of the switch section 13a will be described. FIG. 8 is a block diagram showing the configuration of the switch section 13a. As shown in FIG.
a shows a configuration in which a counter 52a is provided instead of the counter 52 in the configuration of the switch unit 13 shown in FIG. The counter 52a has a configuration in which a clock control signal output terminal 64 for outputting a clock control signal CC is provided in the configuration of the counter 52. This clock control signal CC is a signal to be one input of the logic gate 53. In the switch section 13a, the logic gate 53 outputs the input / output clock signal CK1 to the first storage section 11 when the clock control signal CC is at L level.

Next, the operation of the storage / reproduction device 1a will be described. FIG. 9 is an explanatory diagram illustrating an example of a storage state of continuous data in the first storage unit 11 and the second storage unit 12 illustrated in FIG. Hereinafter, based on this example, the operation of reading the continuous data in the storage / reproduction device 1a will be described.

As shown in this figure, in this example, the continuous data D1 to D4 are stored in the storage / reproduction device 1a. These continuous data D1 to D4 are respectively composed of three block data p10 to p12, block data p20 to p22, block data p30 to p32, and block data p40 to p42.

Then, the block data p10 and p11,
Block data p20 and p21, block data p30
P31 and block data p40 and p41 are stored in the first storage unit 11, while the block data p11
P12, block data p21 and p22, block data p31 and p32, and block data p41 and p4
2 is stored in the second storage unit 12. That is, the block data p11, p21, p31, and p41 are the first
The information is stored in the storage unit 11 and the second storage unit 12.

FIG. 10 is a part of a timing chart showing operation timings when reading out the continuous data D1 to D4 from the storage / reproduction device 1a. In addition,
Hereinafter, the block data p10 shown in FIG. 9 is composed of data words d0 and d1, and the block data p11
Consists of the data word d2 and the block data p13
Consists of data words d3 to d7. The output from the storage / reproduction device 1a can be performed in any order for the continuous data D1 to D4. However, only the output of the continuous data D1 will be described below. Further, hereinafter, it is assumed that the cycle times tc1 and tc2 in the storage units 11 and 12 are the same. The access time ta2 of the second storage unit 12 is equal to the sum of the access time ta1 of the first storage unit 11 and the value obtained by doubling the cycle time tc1, that is, ta2 = ta1 + 2tc1.

As shown in FIG. 10, at the start of access at time t11, an information processing device (not shown) sends an access start signal A to a counter 52a of the switch unit 13a.
When S is input, the address input signal AI is input to the first storage unit 11 and the second storage unit 12. Then, with this input, the first storage unit 11 and the second
The storage unit 12 starts accessing the input address.

At this time, in the switch section 13a, the counter 52a is reset in response to the input of the access start signal AS. Then, the counter 52a sets the switch control signal CS to the L level and outputs the signal to the multiplexer 51 and the logic gate 54. Also, the counter 52a
Outputs the clock control signal CC to the logic gate 53 with the L level.

The multiplexer 51 connects the data input / output port 32 and the data input / output port 55 in the first storage unit 11 having a short access time based on the switch control signal CS at the L level. Thereby, the output from the first storage unit 11 becomes the output from the storage / reproduction device 1a. The logic gate 53 outputs the input / output clock signal CK1 to the first storage unit 11 based on the L-level clock control signal CC.

At time t12 after the access time ta1 of the first storage unit 11 has elapsed from time t11, the first storage unit 11
Is based on the address input signal AI,
And accesses the data word d0 of the block data p10, which is the leading part of, and outputs this data. Then, after the cycle time tc1 of the first storage unit 11 from time t12, the first storage unit 11 accesses the subsequent data word d1 based on the input / output clock signal CK1, and outputs this data.

On the other hand, the counter 52a detects that the output of the data word d1 has been completed at time t13, which is 2tc1 after time t12, based on the count value of the input / output clock signal CK counted from time t11. Then, the switch control signal CS is set to the H level. The logic gate 54 outputs the input / output clock signal CK2 to the second storage unit 12 based on the H level switch control signal CS.

The time t13 is a time when the access time ta2 of the second storage unit 12 has elapsed from the time t11. Therefore, the second storage unit 12 accesses the data word d2 following the data word d1 at this time and outputs this data. At this time, since the clock control signal CC is at L level, the logic gate 53 outputs the input / output clock signal CK1 to the first storage unit 11. Therefore, at time t13, data word d
2 is output from both the first storage unit 11 and the second storage unit 12.

Further, based on the H-level switch control signal CS, the multiplexer 51 controls the data input / output port 42 and the data input / output port 5 in the second storage unit 12.
5 is connected. Thereby, the output from the second storage unit 12 becomes the output from the storage / reproduction device 1a. Then, the second storage unit 12 accesses the data words d3 to d7 after the data word d2 based on the input / output clock signal CK2, and outputs these data. Then, at time t14 after a lapse of tc2 from time t13, the counter 52
a is the block data p1 based on the count value of the input / output clock signal CK counted from time t11.
1 is completed, and the clock control signal C is detected.
C is set to H level. The logic gate 53 stops outputting the input / output clock signal CK1 to the first storage unit 11 based on the H level clock control signal CC.

As described above, in the storage / reproduction device 1a, part of the continuous data is stored in both the first storage unit 11 and the second storage unit 12. Then, the counter 52a outputs a logic gate 53 and a logic gate 54 for outputting the input / output clock signal CK to the storage units 11 and 12.
Are separately controlled by different control signals. Then, in the reproduction period of the data stored in both (the period from time t13 to t14 in FIG. 10), this data is stored in the first and second storage units 11 and 12.
Are output to the switch unit 13a. Therefore, the counter 52a is connected to the multiplexer 51.
Is switched within this period, continuous data can be reproduced without interruption. That is, in the storage / reproduction device 1a, the time restriction on the switching timing of the multiplexer 51 is very loose.

Therefore, the storage / reproduction device 1a is particularly effective in a situation where the switching timing of the multiplexer 51 tends to vary. For example, the data input / output port 55
When the line connecting the data input / output port 32 or the data input / output port 42 is composed of a plurality of signal lines (bits), the switching timing of the data input / output ports 32 and 42 by the multiplexer 51 is delayed. Variations tend to vary from signal line to signal line.

That is, for example, the data input / output port 3
2 to the data input / output port 42, although some bits of the data output from the data input / output port 55 have been switched,
In other bits, a situation occurs in which the data input / output port 32 is still connected. in this case,
In the configuration of the storage / reproduction device 1, incorrect data is output from the data input / output port 55.

On the other hand, in the storage / reproduction device 1a, during the period when the data stored in both the storage units 11 and 12 is being output, these same data are stored in the storage units 11 and 12.
Are output simultaneously from each other, even if the switching timing of the multiplexer 51 varies, incorrect data is not output.

Further, in the storage / reproduction device 1a, writing can be realized by reversing the flow of data, and the access time in writing continuous data can be shortened in the same manner as in reading. At the time of writing, the same data is input to the first storage unit 11 and the second storage unit 12 during the period from time t13 to t14. Further, in order to simplify the control of the multiplexer 51, at the time of writing, the data input / output port 55 may be connected to both the data input / output port 32 and the data input / output port 42 regardless of the switch control signal CS. .

[Embodiment 3] A third embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 2 and 3 are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 11 is a block diagram showing a configuration of a storage / reproduction device 1b, which is a storage / reproduction device according to the present embodiment. As shown in the figure, the storage / playback apparatus 1b is different from the storage / playback apparatus 1 shown in FIG. 1 in that a first storage unit 11a is used instead of the first storage unit 11 and the switch unit 13.
And a switch unit 13b.
And an offset value generator 15.

In the storage / reproduction device 1b, the second storage unit 1
2 stores all data. The first storage unit 11a is a storage unit including a circuit required for a cache function. That is, the first storage unit 11a stores
This is a cache memory that stores a copy of a part of the data stored in the second storage unit 12 as necessary. Then, when a cache hit occurs, the first storage unit 11a outputs an H-level hit determination signal HS from the hit determination signal output terminal 34 to the switch unit 13b. The configuration of the first storage unit 11a will be described later. Further, the cache control in the first storage unit 11a is the same as the control in a generally known cache memory, and thus a detailed description is omitted.

The switch section 13b is provided with a hit determination signal HS.
Based on the result, one of the first storage unit 11a and the second storage unit 12 is connected to a processing device external to the storage / reproduction device 1b, and data is input to the first storage unit 11a or the second storage unit 12. Output. The switch unit 13
The configuration of b will be described later.

The offset value generator 15 is for giving a predetermined offset value to the adder 14. The adder 14 includes an adder control signal KC and an address input signal A.
Inputting I, the offset value given from the offset value generator 15 is added to the address input signal AI and output to the second storage unit 12. The addition of the offset value by the adder 14 is performed based on the adder control signal KC output from the switch unit 13b. That is, if the adder control signal KC is at the H level, the adder 14 adds the offset value. If the adder control signal KC is at the L level, the adder 14 outputs the input address input signal AI as it is to the second Output to the storage unit 12.

First, the configuration of the first storage section 11a will be described. FIG. 12 is a block diagram illustrating a configuration of the first storage unit 11a. As shown in this figure, the first storage unit 1
1a is an address comparator 71a-71d, a logic gate 7
2, selector 73, cache entries 74a to 74d
It has.

As shown in this figure, each of the cache entries 74a to 74d includes a valid bit (V), an LRU information field (LRU), an address tag (Address), and a data field (Data). The LRU (Least Recently Used) information is information used for replacement when a cache entry runs short.

The address comparators 71a to 71d input the address input signal AI and the cache entry 74
By comparing the valid bits and address tags in the cache entries 74a-7d
It is determined whether or not data corresponding to the address input signal AI is stored in 4d, and the result of the determination is output to the logic gate 72.

The logic gate 72 includes an address comparator 71a
The hit determination signal HS is output to the switch unit 13b based on the determination results of .about.71d. That is, when there is data corresponding to the address input signal AI in any of the cache entries 74a to 74d, the logic gate 72 outputs the H-level hit determination signal HS to the switch unit 13b. On the other hand, when there is no data corresponding to the address input signal AI in these cache entries 74a to 74d, the L level hit determination signal HS is output to the switch unit 13b.

The selector 73 includes the address comparators 71a to 71a.
Based on the determination result of 71d and the input / output clock signal CK1, a data word in the data field in the cache entries 74a to 74d is selected and output to the switch unit 13b via the data input / output port 32.

FIG. 13 is a block diagram showing a configuration of the switch section 13b. As shown in FIG.
3b is a multiplexer 51, logic gates 53 and 54,
The configuration includes a sequencer 81 and a copy path 82.

The sequencer 81 is a control device having all the functions of the counter 52a in the switch section 13a shown in FIG. Further, the sequencer 81 inputs the hit determination signal HS output from the first storage unit 11a from the hit determination signal input terminal 67, and based on this signal,
The copy path control signal CP is generated and output from the copy path control signal output terminal 65 to the copy path 82. Also, the sequencer 81 generates an adder control signal KC based on the hit determination signal HS, and outputs this signal from the adder control signal output terminal 66 to the adder 14 shown in FIG.

The copy path 82 has a copy path control signal C
When P is input, the data input / output port 32 and the data input / output port 42 are connected to set a data copy path between the first storage unit 11a and the second storage unit 12. Switch.

Next, the operation of the storage / reproduction device 1b will be described. FIG. 14 shows the first storage unit 1 shown in FIG.
FIG. 3 is an explanatory diagram illustrating an example of a state of storing (storing) continuous data in a first storage unit and a second storage unit. Hereinafter, based on this example, the reading and writing operations of the continuous data in the storage / reproduction device 1b will be described.

As shown in this figure, in this example,
The continuous data D1 to D4 are stored in the storage / reproduction device 1b. These continuous data D1 to D4 are
Two block data p10 and p11, block data p20 and p21, and block data p30 and p3, respectively.
1, block data p40 and p41. The second storage unit 12 stores all these data, while the first storage unit 11a stores block data p10, block data p20, and block data p30.

First, a read operation in the storage / reproduction device 1b will be described. FIG. 15 is a flowchart showing a read operation in the storage / reproduction device 1b. Hereinafter, the reading operation of the continuous data D1 in the storage / reproduction device 1b will be described first with reference to FIG. Note that the access time of the first storage unit 11a is
It is set to ta1 similarly to 1. Further, the cycle time of the first storage unit 11a and the cycle time of the second storage unit 12 are assumed to be the same, and this cycle time is defined as tc.

As shown in FIG. 15, at the start, an access start signal AS is input to the sequencer 81 of the switch section 13b from an information processing device (not shown), and an address input signal AI is input to the first storage section 11a. Is performed (S1).

The first storage section 11a stores the address input signal A
I and the cache entries 74a-74
By comparing with the address tag in d, it is determined whether or not the cache hits (S2).

Since the first storage unit 11a stores the block data p10, which is the head data of the continuous data D1, it is determined in S2 that the cache has been hit, and the H level hit determination signal HS is transmitted to the sequencer 81.
Output to Further, after the access time ta1, the first storage unit 11a outputs the block data p10 based on the input address input signal AI. Sequencer 81
Outputs an H level adder control signal KC to the adder 14 based on the H level hit determination signal HS. Based on the H level adder control signal KC, the adder 14 adds a predetermined offset value given from the offset value generator 15 to the input address input signal AI, and stores this signal AI in the second storage. Output to the unit 12 (S3). This addition of the offset value is performed in the second storage unit 12
Is started from the block data p11 instead of the block data p10.
Therefore, the offset value given from the offset value generator 15 is a value corresponding to the size of the block data p10.

The sequencer 81 outputs an L level switch control signal CS and an L level clock control signal CC based on the H level hit determination signal HS. Accordingly, the multiplexer 51 connects the data input / output port 32 and the data input / output port 55 (S4), and the input / output clock signal CK1 is output from the logic gate 53. Therefore, after the access time ta1 from the start, the block data p10 output from the first storage unit 11a becomes the output of the storage and playback device 1b (S5).

After all the block data p10 has been output, the sequencer 81 outputs an H-level switch control signal CS to the multiplexer 51 in the same manner as the counter 52a shown in FIG. The output port 55 is connected (S6). At the same time, the sequencer 81 outputs an H-level clock control signal CC, and based on this, the logic gate 53
The output of the input / output clock signal CK1 to 1a is stopped.
Further, based on the H level switch control signal CS,
The logic gate 54 starts outputting the input / output clock signal CK2 to the second storage unit 12. At this time, since the access time ta2 has elapsed since the start, the second storage unit 1
2 is a block data p11 based on the address input signal AI to which the offset value is added, which is input in S3.
Is output from the storage / reproduction device 1b (S7), and the reading of the continuous data D1 ends.

FIG. 16A shows the output timings of the first storage unit 11a and the second storage unit 12 in the operations of S1 to S7 described above. In addition, FIG.
In (d), t21 corresponds to the time when the processing shown in FIG. 15 is started. FIGS. 16A to 16D show input / output of the first storage unit 11a.
The input / output of the second storage unit 12 is shown in FIG. The data words d0 and d1 correspond to the block data p10 shown in FIG.
Corresponds to the block data p11.

As shown in FIG.
The time required from the input of I until the cache hit determination is performed and the reading from the data word d1 is started, that is, the access time ta1 of the first storage unit 11a is equal to the time when the cache hits. This is the access time of the storage / reproduction device 1b. In addition, the storage and playback device 1
b, the cycle time tc of the first and second storage units is
This is the cycle time tc of the entire storage / reproduction device 1b. As described above, in the storage / reproduction device 1b, as in the storage / reproduction device 1 shown in FIG.
Output data words d0 and d1. Therefore, the storage / reproduction device 1b is a storage / reproduction device having a short access time and a short cycle time.

Next, the reading operation of the continuous data D4 will be described with reference to FIG. The first storage unit 11a
Block data p4 which is the head data of the continuous data D4
Since 0 is not stored, it is determined in S2 that the cache has missed, and an L-level hit determination signal HS is output to the sequencer 81.

The sequencer 81 outputs an L-level adder control signal KC to the adder 14 based on the L-level hit determination signal HS. Based on the L level adder control signal KC, the adder 14 outputs the input address input signal AI to the second storage unit 12 as it is (S8).

The sequencer 81 outputs an H-level switch control signal CS and an L-level clock control signal CC based on the L-level hit determination signal HS. As a result, the multiplexer 51 connects the data input / output port 42 and the data input / output port 55 (S9), while the input / output clock signal CK1 from the logic gate 53 to the first storage unit 11a and the input / output clock signal CK1 from the logic gate 54 The input / output clock signal CK2 is output to the second storage unit 12.

At this time, the sequencer 81 outputs a copy path control signal CP to the copy path 82. Thereby, the copy path 82 connects the data input / output port 32 and the data input / output port 42 (S10).

Therefore, the access time ta from the start
After 2, the block data p40 is output from the second storage unit 12, and this output becomes the output of the storage and playback device 1b (S11). The block data p40 is copied to the first storage unit 11a via the copy path 82 (S12).

When the output of the block data p40 ends, the sequencer 81 stops the copy path control signal CP and disconnects the connection between the data input / output port 32 and the data input / output port 42 by the copy path 82 (S13).
The sequencer 81 outputs the clock control signal CC at the H level to the logic gate 53, and stops outputting the input / output clock signal CK1 to the first storage unit 11a. afterwards,
From the second storage unit 12, the block data p that does not need to be copied
The reading of data 41 is continued (S14), and the reading of the continuous data D4 ends.

S1, S2 and S8 to S14 described above
1st storage unit 11a and 2nd storage unit 12 in the operation of
FIG. 16B shows the output timing. In this figure, the data words d0 and d1 correspond to the block data p40 shown in FIG.
Corresponds to the block data p41.

As shown in FIG.
The time required from the input of I until the cache hit determination is performed and the reading from the second storage unit 12 is started, that is, the access time ta2 of the second storage unit 12 is missed by the cache. Storage and playback device 1 in case
b is the access time.

As described above, in the storage / reproduction device 1b, when a cache miss occurs, that is, when the first data of the continuous data is not stored in the first storage unit 11a, reading from the second storage unit 12 is performed. The data is copied from the second storage unit 12 to the first storage unit 11a in parallel. Therefore, when the continuous data D4 is read after this read, the cache hits.
Access time can be reduced.

Next, a write operation in the storage / reproduction device 1b will be described. FIG. 17 is a flowchart showing a write operation in the storage / reproduction device 1b. Hereinafter, an operation of writing the continuous data D1 in the storage / reproduction device 1b will be described with reference to FIG.

As shown in FIG. 17, at the start, an access start signal AS is input from an information processing device (not shown) to the sequencer 81 of the switch section 13b, and an address input signal AI is stored in the first storage section 11a and the first storage section 11b. 2 is input to the storage unit 12 (S21 and S22). Thereafter, the second storage unit 12 does not depend on the hit / miss of the cache.
The sequencer 81 outputs an H-level switch control signal CS to the multiplexer 51 in order to write the data to the multiplexer 51. Thus, the multiplexer 51 connects the data input / output port 42 and the data input / output port 55 (S23), and the input / output clock signal CK2 is output from the logic gate 54.

The first storage section 11a, to which the address input signal AI has been input, compares the address indicated by the address input signal AI with the address tags in the cache entries 74a to 74d to determine whether or not a cache hit has occurred. And outputs a result of the determination as a hit determination signal HS (S24).

That is, when the cache hits as in the case of writing the continuous data D1, the first storage unit 11
a is a sequencer 81 that outputs a high-level hit determination signal HS.
Output to The sequencer 81 outputs a copy path control signal CP to the copy path 82 based on the H level hit determination signal HS. In addition, the sequencer 81
A level clock control signal CC is output to logic gate 53. Accordingly, the copy path 82 connects the data input / output port 32 and the data input / output port 42, and the logic gate 53 starts outputting the input / output clock signal CK1 to the first storage unit 11a (S25). .

Thus, the access time ta from the start
After 2, the block data p10 input from the data input / output port 55 is input to the first storage unit 11a and the second storage unit 12, and the block data p10 in these storage units 11a and 12 is updated to the latest contents. (S2
6. S27).

After updating the block data p10, the sequencer 81 stops the copy path control signal CP and disconnects the connection between the data input / output port 32 and the data input / output port 42 by the copy path 82 (S28). The sequencer 81 outputs the clock control signal CC at the H level to the logic gate 53, and stops outputting the input / output clock signal CK1 to the first storage unit 11a. Then, the second storage unit 1
Then, the writing of the block data p11 to No. 2 is continued (S29), and the writing of the continuous data D1 ends.

FIG. 16 (c) shows the timing of writing to the first storage unit 11a and the second storage unit 12 in the operations of S21 to S29 described above. As shown in this figure, the time required from the input of the address input signal AI until the cache hit determination is performed and the writing to the first storage unit 11a and the second storage unit 12 is started, that is, , Access time ta2 of the second storage unit 12
Is the access time of the storage / reproduction device 1b at the time of writing when the cache hits.

At the time of writing to the first storage section 11a in S26, the input / output clock signal CK2 may be input to the first storage section 11a via a signal line (not shown). The input / output clock signal CK2 is a signal similar to the input / output clock signal CK1 (tc1 = t
c2) Therefore, the input / output clock signal CK2 is stored in the first storage unit 1
1a can be used as the input / output clock signal.

When the cache misses, as in the case of writing the continuous data D4, the first storage unit 11a
Outputs an L-level hit determination signal HS to the sequencer 81. Based on the L-level hit determination signal HS, the sequencer 81 inputs the block data p40 and p41 only to the second storage unit 12, and the block data p40 and p41 in the second storage unit 12 are updated to the latest contents. (S30), the writing of the continuous data D4 ends.

S21 to S24 and S30 shown above
1st storage unit 11a and 2nd storage unit 12 in the operation of
FIG. 16D shows the timing of writing data to the memory. As shown in this figure, after the address input signal AI is input, a cache hit determination is made, and the second storage unit 1
The time required until the writing to No. 2 is started, that is, the access time ta2 of the second storage unit 12 is the access time at the time of writing when the cache misses.

As described above, the storage / reproduction device 1b includes the first storage unit 11a, which is a cache memory, and outputs data from the second storage unit 12 when a cache miss occurs during reading of continuous data. Is written to the first storage unit 11a. Therefore, when the second storage unit 12 is loaded, the first storage unit 1
Step of storing data in 1a (initialization step)
Even if there is no data, it is possible to shorten the access time when the same continuous data is reproduced next time.

Further, in the storage / reproduction device 1b, it is not necessary to use a memory having a capacity enough to store the leading portion of all continuous data as the first storage unit 11a. Therefore, in the storage / reproduction device 1b, the ratio of the capacities of the first storage unit 11a and the second storage unit 12 can be set freely, so that the cost of the entire device can be reduced. Further, when the second storage unit 12 is replaced, the data cached in the first storage unit 11a is discarded, so that
The storage unit 12 can be exchangeable.

In the present embodiment, the first storage unit 11
Although the write control of the cache with respect to a is performed by write-through, the present invention is not limited to this, and this control may be write-back. That is, since the write-through type cache control is performed on the first storage unit 11a, the access time at the time of writing of the storage / reproduction device 1b is reduced by the second storage unit 12b.
Is limited by the access time ta2. However, if write-back type cache control is applied to the first storage unit 11a, the control becomes complicated, but the access time at the time of writing when the cache hits can be reduced.

In the present embodiment, the first storage unit 11
The data at the head of the continuous data is stored in a. However, the present invention is not limited to this, and as shown in FIG.
If continuous access to the second data is restricted, the first storage unit 11a stores (caches) the data at the beginning of the continuous data, and the second storage unit 12 stores the data following the data at the beginning. Is stored in the first storage unit 11a or the first storage unit 11a and the second data are stored in the first storage unit 11a.
You may make it memorize | store in the memory | storage part 12.

In the storage / reproduction device 1b, when the cache hits during reading, the second storage unit 12
An offset value given from the offset value generator 15 is added to the address input signal AI based on the adder control signal KC output from the sequencer 81. However, the invention is not limited thereto, and the offset value to the second storage unit 12 may be directly provided from the sequencer 81. That is, the sequencer 81 may be configured to calculate a necessary offset value and output this value to the adder 14.

In order to reduce the occurrence of cache misses at the time of reading and writing, the storage / reproduction device 1
b may be configured to perform an initialization step described later. FIG. 18 is a flowchart showing a flow of the operation in the storage / reproduction device 1b at the time of this initialization step.

In this configuration, the sequencer 81 searches for an address in the second storage unit 12 via a signal line (not shown), and the data stored at each address is the head data (head part) in the continuous data. It is determined whether or not the first data is copied to the first storage unit 11a.

The data type is determined / copied using a pointer p indicating the address to be searched and a counter c indicating the number of copied head data. In the following, start and end are addresses indicating the end of the search area, limit
Indicates the upper limit of the number or amount of data that can be copied to the first storage unit 11a, which is determined by the configuration (capacity or number of entries) of the first storage unit 11a.

When the initialization is started, the sequencer 81
Outputs the copy path control signal CP to the copy path 82 and connects the copy path 82 (S41). Also,
The sequencer 81 initializes the pointer p and the counter c so that p = start and c = 0 (S42 and S4).
3).

The sequencer 81 stores the address data (word) in the second storage unit 12 indicated by the pointer p.
Is the first data of the continuous data or not (S
44) If it is the first data, specify the address (S
45 · S46), the second storage unit 12 to the first storage unit 11a
This data is copied (S47, S48), and the counter c is advanced (S49). Next, the pointer p is advanced (S
50) The data at the next address is determined until the pointer p becomes end or the counter c becomes limit (S51).

As described above, in the above configuration, when the storage / reproduction device 1b is initialized, the head data of the continuous data stored in the second storage unit 12 is searched, and the first storage unit 11b is searched.
The head data is copied from the second storage unit 12 to the first storage unit 11a within the range permitted by the number of entries or the capacity of a.

By performing such copying at the time of initialization,
The occurrence rate of a cache miss in the first storage unit 11a can be reduced, and the responsiveness of the storage / reproduction device 1b can be improved.

If the number of continuous data stored in the second storage unit 12 is large, there is continuous data whose head data is not copied to the first storage unit 11a at the time of this initialization. A cache miss occurs for continuous data. However, even for these continuous data, the cache is hit in the subsequent access due to the replacement of the data in the first storage unit 11a (replacement of the cache). Therefore, the second storage unit 1
Even if the number of entries and the capacity of the first storage unit 11a are set irrespective of the number of continuous data in 2, the access time of the storage / reproduction device 1b to each continuous data can be reduced. That is, the head portion of the continuous data is searched at the time of initialization and copied to the first storage unit, thereby reducing cache misses and setting the configuration (capacity etc.) of the first storage unit regardless of the number of continuous data. It is possible to do.

In the above configuration, the counter c
Is a counter that counts the number of copied areas, and li
mit may be the upper limit of the number of copyable areas determined by the configuration of the first storage unit 11a.

In this embodiment, the adder 14
When the adder control signal KC is at the H level, the offset value is added to the address input signal AI, while when the adder control signal KC is at the L level, the offset value is not added. However, the configuration of the storage / reproduction device 1b is not limited to this. That is, the adder 14 may be configured to add the offset value when the adder control signal KC is valid, but not to add the offset value when the adder control signal KC is invalid. Good.

Writing to the valid bit (V) and the address tag (Address) in the cache entries 74a to 74d shown in FIG. 12 is performed by a cache control circuit (not shown).

The storage / reproduction method applied to the storage / reproduction device 1b can be expressed as follows. That is, this storage and reproduction method includes a first storage unit having a short access time and a short cycle time, a second storage unit having a long access time but a short cycle time, an input / output port of the first storage unit, and a second storage unit. A switch unit for appropriately selecting an input / output port of the unit and connecting the input / output port of the entire storage device, wherein the first storage unit stores a part of the continuous data. A cache memory for storing, the second storage unit is a storage unit for storing the entire continuous data, and a method of controlling the switch unit to store the data in the first storage unit when reading and writing the continuous data. It is also possible to express. According to this method, the access time for continuous data can be reduced without the step of initialization, and the ratio of the capacities of the first storage unit and the second storage unit can be set freely. Further, the second storage unit can be exchanged.

[Embodiment 4] A fourth embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 3 are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 19 is a block diagram showing a configuration of a storage / reproduction device 1c, which is a storage / reproduction device according to the present embodiment. As shown in this figure, the storage / playback apparatus 1c is different from the storage / playback apparatus 1 shown in FIG. 1 in that a first storage unit 11b is used instead of the first storage unit 11 and the switch unit 13.
And a switch unit 13c.

First, the configuration of the first storage section 11b and the switch section 13c will be described. As shown in FIG. 19, the first storage unit 11b stores the first storage unit 1 shown in FIG.
In the configuration of FIG. 1, a data size value output terminal 91 and a pointer value input terminal 92 are provided, and the data size value DS and the pointer value PV are input and output to and from the switch unit 13c. Note that these data size values D
S and the pointer value PV will be described later.

FIG. 20 is an explanatory diagram showing the configuration of the first storage section 11b. As shown in this figure, the first storage unit 1
1b is a management tag 93a to 93d, a pointer field selector 94, a data size field selector 9
5, a memory array 96 and an address decoder 97.

As shown in this figure, the management tags 93a to 93a-9
3d is a management tag composed of a pointer field (Pointer) and a data size field (Size). This pointer field is a field for storing a pointer indicating a position in the memory array 96 of data stored in the memory array 96. The data size field is an area for storing the sizes of these data.

The pointer field selector 94 is a selector for selecting a pointer field corresponding to continuous data to be accessed. The data size field selector 95 is a selector for selecting a data size field corresponding to continuous data to be accessed. The memory array 96 and the address decoder 97 are a memory array for storing (storing) data and an address decoder thereof.

FIG. 21 is a block diagram showing the structure of the switch section 13c. As shown in FIG.
3c is a configuration of the switch unit 13 shown in FIG.
In this configuration, a sequencer 101 is provided instead of the counter 52. Further, as shown in FIG.
01 includes a data size value input terminal 102 and a pointer value output terminal 103 in the configuration of the counter 52, and outputs the data size value DS and the pointer value PV to the first
Input and output are performed with the storage unit 11b.

FIG. 22 is a block diagram of the first storage unit 11 shown in FIG.
FIG. 4B is an explanatory diagram showing an example of the storage (storing) state of continuous data in the second storage unit 12b. As shown in this figure, in this example, the continuous data D1
To D4 are stored. These continuous data D1 to D4 are each composed of two block data p10
· P11, block data p20 and p21, block data p30 and p31, and block data p40 and p41. The block data p10, the block data p20, the block data p30, and the block data p40 are stored in the first storage unit 11b, while the block data p11, the block data p21,
The block data p31 and the block data p41 are
It is stored in the second storage unit 12.

In this figure, L1 to L4 in the pointer field and the data size field are shown.
Is a code indicating the number of words (data size) of the block data p10, p20, p30, and p40 respectively stored in the first storage unit 11b.

In the first storage unit 11b, the management tags 93a to 93d store information for managing data in the memory array 96. For example, in the storage state shown in FIG.
Are L1 + L2 to L1 + L2 + L3 of the memory array 96.
-1. To indicate the area where the block data p30 is stored, the pointer field of the management tag 93c indicates L1 + L2 indicating the head of the area, and the data size field indicates the number of words L.
3 are set respectively.

The sizes of the block data p10, p20, p30 and p40 stored in the first storage unit 11b, that is, L1 to L4 are determined by the access time of the first storage unit 11b and the second storage unit 12. It is determined from the cycle time. That is, these L1
L4 are determined such that the input / output in the first storage unit 11b ends after the access time of the second storage unit 12 has elapsed. Further, in the storage / reproduction device 1c, it is assumed that the access time of the second storage unit 12 changes depending on data required for output.

For example, if the access time of the first storage unit 11b is ta1, the access time of the second storage unit 12 to the continuous data D3 is ta23, and the cycle time of the first storage unit 11b and the second storage unit 12 is tc. , L3 are (t
a23−ta1) ≦ L3 × tc.

In this way, since the access time of the second storage unit 12 elapses while reading and writing to the first storage unit 11b, even if ta23 is long, the influence of this access time is eliminated. It becomes possible. Further, it is preferable to set L3 as small as possible within a range satisfying the above condition. By doing so, the first storage unit 11
It is possible to improve the use efficiency of b.

Next, the operation of the storage / reproduction device 1c will be described based on an example of the storage status of continuous data in the first storage unit 11b and the second storage unit 12 shown in FIG.

In the following description, the access time of the first storage unit 11b is ta, the access time of the second storage unit 12 for the continuous data D1 is ta21, and the access time of the second storage unit 12 for the continuous data D3 is ta23. . The cycle time of the first storage unit 11b and the second storage unit 12 is represented by tc.

FIGS. 23 (a) and 23 (b) are part of a timing chart showing the operation timing of the storage / reproduction device 1c when storing / reproducing these continuous data D1 to D4. Shows the timing of the read operation of the continuous data D1, while FIG. 23B is a timing chart showing the timing of the write operation of the continuous data D3. In these figures, the input / output of the first storage unit 11b is shown, while the input / output of the second storage unit 12 is shown.

First, reading of the continuous data D1 will be described with reference to FIG. In the following, while the block data p10 is composed of the data words d0 and d1, the block data p11 is composed of the data words d2 to d7.
And consist of Also, while the block data p30 consists of data words d0 to d3, the block data p31
Consists of data words d4 to d7.

As shown in this figure, at the start of access at time t31, an access start signal AS is input to the sequencer 101 of the switch unit 13c from an information processing device (not shown), and an address input signal AI is
The data is input to the first storage unit 11b and the second storage unit 12.
In response to this input, the first storage unit 11b and the second storage unit 12 store the input address input signal AI
Access to the address corresponding to.

That is, in the first storage section 11b, the management tag 93a stores the pointer value 0 indicating the area where the block data p10 is stored and the data size value L1 of the block data p10 based on the address. get. The information on the pointer value and the data size is information indicating that the block data p10 is stored in the pointer values 0 to L1-1 in the memory array 96. Here, in the example of FIG. 23A, L1 = 2
It is.

Then, the management tag 93a receives the pointer value PV (=
0) is output to the address decoder 97, the data size value DS (= L1) is output to the sequencer 101 via the data size field selector 95, and reading of the block data p10 is started. Here, the time required for the above processing is the access time ta1 in the first storage unit 11b.

Further, the sequencer 101 sets the switch control signal CS to the L level in response to the input of the access start signal AS, controls the logic gate 53, and sends the input / output clock signal CK1 to the first storage unit 11b. Output. The multiplexer 51 connects the data input / output port 55 and the data input / output port 32 in response to the input of the switch control signal CS at the L level. Therefore,
The output of the first storage unit 11b is the output from the storage and playback device 1c.

Then, the sequencer 101 sets the management tag 9
After reading the data for the L1 word from the first storage unit 11b based on the data size value DS output from the third storage unit 3a, that is, after elapse of ta21, the switch control signal CS is set to the H level, and the second storage unit 12 Is the output of the storage / reproduction device 1c.

Next, referring to FIG.
3 will be described. As shown in this figure,
At the start of access at time t31, an access start signal AS is input to the sequencer 101 of the switch unit 13c from an information processing device (not shown), and the address input signal AI is transmitted to the first storage unit 11b and the second storage unit 1c.
2 is input.

Sequencer 101 provides access start signal A
In response to the input of S, the switch control signal CS is set to L level to control the logic gate 53, and the first storage unit 11b
Output the input / output clock signal CK1. The multiplexer 51 connects the data input / output port 55 and the data input / output port 32 in response to the input of the switch control signal CS at the L level. Therefore, the continuous data D3 input to the storage / reproduction device 1c first
The data is input to the storage unit 11b.

The sequencer 101 calculates a pointer value PV and a data size value DS according to the input continuous data D3, and outputs them to the first storage section 11b. That is, the sequencer 101 performs the above-described condition (ta23−
ta1) The pointer value PV is set so as to satisfy ≦ L3 × tc.
(= L3) and the data size value DS are calculated.

Further, the first storage section 11b and the second storage section 12 start accessing an address corresponding to the input address input signal AI. That is, in the first storage unit 11b, the management tag 93c stores the pointer value PV and the data size value DS output from the sequencer 101.
On the basis of the pointer value PV (=
L1 + L2) and the data size value DS (= L3) in the data size field.

Each information of the pointer value PV (= L1 + L2) and the data size value DS (= L3) is stored in the memory array 96 as pointer values L1 + L2 to L1 + L2.
+ L3-1 indicates an instruction to store the block data p30. Here, in the example of FIG. 23B, L3 = 4
It is. Further, the pointer value PV (= L1 + L2) is also transmitted to the address decoder, and data writing to the first storage unit 11b is started. Here, the time required for the above processing is the access time ta1 of the first storage unit 11b.

After inputting data into the first storage section 11b by L3 words based on the calculated data size value DS, that is, after elapse of ta23, the sequencer 101 sets the switch control signal CS to the H level, The data input destination is switched to the second storage unit 12.

As described above, in the storage / reproduction device 1c, the size of the continuous data stored in the first storage unit 11b depends on the access time, the cycle time, and the access time of the first storage unit 11b and the second storage unit 12. Is a variable amount. Therefore, the type of continuous data, or
The access time ta2 of the second storage unit 12 depends on conditions such as a storage location, that is, for each of the continuous data DX.
Even when X changes, the above condition (ta2X
−ta1) ≦ LX × tc, and continuous data is not interrupted when the output is switched between the first storage unit 11b and the second storage unit 12. Further, it is possible to increase the use efficiency of the first storage unit 11b.

In the storage / playback apparatus 1c, since the length of data stored in the first storage unit 11b is variable, the control of the sequencer 101 is complicated. Therefore, a configuration in which this control is realized by software may be adopted. In such a configuration, for example, the first storage unit 11b is a semiconductor memory, the second storage unit 12 is a disk-type storage and playback device,
Further, it can be easily realized by using the sequencer 101 as a microprocessor.

In the present embodiment, when storing continuous data, the sequencer 101 uses the input continuous data D
Although the pointer value PV and the data size value DS corresponding to X are calculated and output to the first storage unit 11b,
The configuration of the storage / reproduction device 1c is not limited to this. That is,
The selector 94 for the pointer field, the selector 95 for the data size field, or the address decoder 97 may calculate these values and output them to the sequencer 101.

[Embodiment 5] A fifth embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 4 are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 24 is a block diagram showing a configuration of a storage / reproduction device 1d, which is a storage / reproduction device according to the present embodiment. As shown in this figure, the storage / reproduction device 1d includes a first storage unit 11c instead of the first storage unit 11b in the configuration of the storage / reproduction device 1c shown in FIG. Configuration.

The computing unit 16 determines the size of the data read from the first storage unit 11c or the size of the data read from the first storage unit 11c.
The size of the data stored in the address input signal AI
And outputs it to the sequencer 101 of the switch unit 13c.

FIG. 25 is a block diagram showing a configuration of the first storage section 11c. As shown in this figure, the first storage unit 1
In the configuration of the first storage unit 11b shown in FIG. 20, reference numerals 1c denote management tags 111a to 111 made up of pointer fields (Pointers) instead of the management tags 93a to 93d.
1d, and does not include the data size field selector 95 and the data size value output terminal 91.

The management tags 111a to 111d do not have a data size field for storing the data size, unlike the management tags 93a to 93d shown in FIG.
That is, the first storage unit 11c does not store the size of the data stored in the memory array 96.

FIG. 26 is a block diagram of the first storage unit 11 shown in FIG.
FIG. 3C is an explanatory diagram showing an example of a state of storing (storing) continuous data in a second storage unit 12; As shown in this figure, in this example, similar to the example of the storage / reproduction device 1c shown in FIG.
Is stored.

The storage / reproduction operation of the storage / reproduction device 1d is the same as that of the storage / reproduction device 1c described in the fourth embodiment, except that the data size of the storage / reproduction device 1c is different from that of the storage / reproduction device 1c. It is not stored, and the arithmetic unit 16 calculates the data size based on the address input signal AI.

That is, in the storage / playback apparatus 1d, at the time of playback, the management tags 111a to 111d do not output the data size value DS of the data to be played back to the sequencer 101, while the sequencer 101 To get the size of. Also, at the time of recording, the data size value DS of the stored data is not input to the management tags 111a to 111d. Thus, according to the above configuration, the circuit size of the first storage unit 11c can be reduced, so that the cost can be reduced.

Incidentally, depending on the computer system,
The access time in the main storage device may change depending on the address. For example, the access time of the image memory is often longer than that of the main storage device. Consider application of the configuration of the storage / reproduction device 1d to such a computer system.

In this system, since the addresses of the main storage device and the image memory are determined at the time of design, the access time of the stored data is uniquely determined by the address. Therefore, the size of each data in the first storage unit 11c is also uniquely obtained from the address. In such a system, storing the data size in the management tag increases the size of the expensive management tag. On the other hand, according to the configuration of the storage / reproduction device 1d, there is no need to store the data size in the management tag, so that a more optimal system can be configured.

As described above, the first storage 1
By providing the computing unit 16 for calculating the size (data amount) of data stored in the first storage unit 1c, a small management tag can be used even when the access time of the second storage unit 12 changes depending on the address of the data. Thus, a storage / reproduction device with a short access time can be realized.

Note that, depending on the form of the system having the storage / reproduction device 1d as a component, the pointer value PV may also be obtained from the address. In such a case, FIG.
By calculating the pointer value (storage location) PV by the computing unit 16 shown in FIG. 4, the management tags 111a to 111a shown in FIG.
It is possible to eliminate the need for the 111d and the pointer field selector 94.

[Embodiment 6] A sixth embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 5 are denoted by the same reference numerals, and description thereof will be omitted. In the present embodiment,
A more specific configuration of the storage / reproduction device 1 described in Embodiment 1 will be described.

FIG. 27 is an explanatory diagram showing the configuration of a storage / reproduction device according to the present embodiment (hereinafter referred to as the present storage / reproduction device). As shown in this figure, the present storage / reproduction device has a row address input port 31a, a column address input port 31
b, row address decoder 121, column address decoder 1
22, a first storage unit 11, a second storage unit 12, a data input / output buffer 123, a data multiplexer / sense amplifier 124, and a control circuit 125.

The row address input port 31a and the column address input port 31b correspond to the address input port 31 or the address input port 41 shown in FIG. The row address decoder 121 selects a row in the first storage unit 11 and the second storage unit 12 based on a row address input from the row address input port 31a. Also, the row address decoder 12
1, the first storage unit 11 and the second storage unit 12 are connected by a plurality of word lines 131.

The column address decoder 122 decodes a column address input from the column address input port 31b and inputs the same to the data multiplexer / sense amplifier 124.

Data Multiplexer / Sense Amplifier 12
4 selects a word (data) in the row of the first storage unit 11 and the second storage unit 12 selected by the row address decoder 121 based on the column address input from the column address decoder 122, and It is to read. When storing, the data multiplexer / sense amplifier 124 selects a predetermined address in the same selected row, and writes a word to this address.

The data multiplexer / sense amplifier 124 also has the function of the switch unit 13 shown in FIG.
In order to output the data, either the first storage unit 11 or the second storage unit 12 is appropriately selected. Further, the data multiplexer / sense amplifier 124 and the first
The storage unit 11 and the second storage unit 12 are connected by a plurality of bit lines 132.

The data input / output buffer 123 is a buffer for inputting / outputting data between the data multiplexer / sense amplifier 124 and the outside. The control circuit 125 also controls the row address decoder 12 based on the input / output clock signal CK and the access start signal AS.
1, the column address decoder 122 and the data multiplexer / sense amplifier 124 to control the first storage unit 11
And a central portion of the present storage / reproduction device for inputting data to the second storage section 12 or outputting data from the storage sections 11 and 12.

As described above, the present storage / reproduction apparatus is a single memory package having an internal configuration as shown in FIG. 27, and has a function corresponding to the storage / reproduction apparatus 1. The present storage / reproduction device functions as a storage / reproduction device having a short access time and a short cycle time for continuous access from the head of a row.

The present storage / reproduction device is suitable for use in, for example, an external secondary cache of a processor system. As described above, access to the cache such as the secondary cache is performed continuously from the start address of the cache block by the size of the cache block. Further, since access to the secondary cache depends on the execution state of the program, it is impossible to completely predict in advance the cache block to be accessed next. Even when such an access is performed, the present storage / reproduction device can operate as a storage / reproduction device having a short access time and a short cycle time regardless of the execution state of the program.

Further, in the present storage / reproduction device, power consumption and cost can be reduced as compared with the case where both the access time and the cycle time of the entire secondary cache are constituted by the storage unit. Further, the present storage / reproduction device can be easily used because all the components are contained in one package. Further, since the switch section does not need to be an independent circuit, the entire circuit scale can be reduced.

In the present embodiment, the present storage / playback apparatus has the specific configuration of the storage / playback apparatus 1 shown in the first embodiment. 5 can be applied as a specific configuration of the storage / reproduction devices 1a to 1d. That is, in the configuration of the present storage / reproduction device, the first storage unit 11a
11c may be provided. Further, the data multiplexer / sense amplifier 124 or the control circuit 12
5 may have the functions of the switch units 13a to 13c, the adder 14, the offset value generator 15, or the arithmetic unit 16.

[Embodiment 7] A seventh embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 6 are denoted by the same reference numerals, and description thereof will be omitted. In the present embodiment,
A more specific configuration of the storage / reproduction device 1 described in Embodiment 1 will be described.

FIG. 28 is an explanatory diagram showing the configuration of a storage / playback apparatus according to the present embodiment (hereinafter, referred to as the present storage / playback apparatus). As shown in this figure, the present storage / reproduction device has the same configuration as the storage / reproduction device 1 shown in Embodiment 1, except that a static memory is provided as the first storage unit 11 and a dynamic memory is provided as the second storage unit 12. Configuration.

That is, in the present storage / reproduction device, the first storage section 11 has a short access time and a short cycle time,
A memory cell having a large memory cell and a high cost is used. Further, in the present storage / reproduction device, as the second storage unit 12, the access time is long, the cycle time is short, the memory cell is small, and
It uses low-cost dynamic memory.

With the present storage and reproducing apparatus having such a configuration, both the access time and the cycle time when accessing continuous data are short, the chip area is small, and
In addition, a low-cost semiconductor memory reproducing device can be realized. In mounting, it is desirable that the entire storage / reproducing apparatus be housed in a single package and configured as shown in FIG.

[Eighth Embodiment] An eighth embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 7 are denoted by the same reference numerals, and description thereof will be omitted. In the present embodiment,
A more specific configuration of the storage / reproduction device 1 described in Embodiment 1 will be described.

FIG. 29 is an explanatory diagram showing the configuration of the storage / reproduction device according to the present embodiment (hereinafter referred to as the present storage / reproduction device). As shown in this figure, the present storage / reproduction device has the same configuration as the storage / reproduction device 1 shown in FIG. Configuration.

That is, in the present storage / reproduction apparatus, the first storage section 11 has a short access time and a short cycle time,
And while using high-cost semiconductor memory,
As the second storage unit 12, a disk-type storage device that has a long access time, a short cycle time, and a low cost is used.

By making the present storage / playback apparatus having such a configuration, it is possible to avoid prolonging the access time of the entire apparatus due to the long access time of the disk-type storage apparatus when accessing continuous data. Becomes That is, the access time of the disk storage device can be hidden. In addition, since a disk-type storage device is used as the second storage unit 12, the present storage / reproduction device is a short-time, low-cost, large-capacity storage / reproduction device.

The first storage section 11 stores only a part of the head of the continuous data. Therefore, a large effect can be obtained even if the capacity is small as compared with a memory for caching the entire continuous data like a disk cache.

In the present storage / playback apparatus, when the power supply is stopped, the contents of the semiconductor memory that constitutes the first storage unit 11 are stored in preparation for loss of data in the first storage unit 11 when the power supply is stopped. It is preferable to save the data in the reserved area of the disk storage device constituting the second storage unit 12. Further, a nonvolatile memory such as a flash memory may be used as the semiconductor memory constituting the first storage unit 11.

When the present storage / reproduction device is applied to a configuration in which a disk-type storage device is integrated with a control board, such as a hard disk drive that is generally used at present, the control board has It is considered that a mode in which the semiconductor memory constituting the first storage unit 11 is mounted is effective.

[Embodiment 9] A ninth embodiment of the present invention will be described below. The first embodiment described above
Members having the same functions as the members shown in FIGS. 1 to 8 are denoted by the same reference numerals, and description thereof will be omitted. In the present embodiment,
An information processing apparatus including the storage / reproduction device 1 described in the first embodiment will be described.

FIG. 30 is a block diagram showing the configuration of an information processing apparatus according to the present embodiment (hereinafter referred to as the present information processing apparatus). As shown in the figure, the present information processing apparatus includes a processing package 140 including an information processing unit 151, a switch unit 13, and a first storage unit 11, and a second storage unit 1
2 comprising a memory package 141 having The information processing unit 151 controls the switch unit 13 to
This is to make continuous access to the first storage unit 11 or the second storage unit 12. Information processing unit 1
The data processing unit 51 performs a process desired by the user on the data obtained through the first storage unit 11, the second storage unit 12, or the input unit (not shown), and controls the display device or the output device (not shown) for the data. The information is output to the outside, and is a central part of the information processing apparatus.

In this information processing apparatus, the information processing section 151, the first storage section 11 and the switch section 13 are housed in the same package, and the second storage section 12 having a relatively large capacity is housed in a different package.

With this information processing apparatus having such a configuration, the first storage unit 11 and the switch unit 13 which are required to have high speed, the information processing unit 151 associated therewith, or other control circuits are processed by the processing package 140. Can be summarized. Therefore, the processing package 140
Is very easy to implement in other devices.

Further, as the second storage unit 12, a semiconductor memory which is generally distributed and easily available is used, and only by connecting the semiconductor memory to the outside of the processing package 140, the access time is short, the cost is low, and the high performance Can be configured. Further, since the second storage unit 12 has a configuration external to the processing package 140, it can be easily replaced. Further, the second storage unit 12 has a large capacity and
If a memory with a short cycle time is used, an access time and a cycle time are short, and a large-capacity and low-cost information processing device can be configured.

Note that the storage / reproduction devices described in Embodiments 7 to 9 are configured in accordance with the storage / reproduction device 1 described in Embodiment 1, but the storage / reproduction devices described in Embodiments 2 to 5 are used. It is also applicable as a specific configuration of the playback devices 1a to 1d. That is, in the configuration of the storage / reproduction device shown in FIGS. 28 and 29, instead of the first storage unit 11, the first storage unit 11 made of a static ram or a semiconductor memory is used.
a to 11c may be provided. Further, in the configuration of the information processing apparatus shown in FIG. 30, these first storage units 11 a to 11 c may be provided instead of first storage unit 11. Furthermore, in the configuration shown in FIGS. 28 to 30, switch units 13 a to 13 a to 13
13c may be provided. Further, an adder 14, an offset value generator 15 or a calculator 16 may be provided as necessary.

The first storage unit 11, the first storage units 11a to 11c, and the second storage unit 1 shown in the first to ninth embodiments
2 includes signal lines for signals such as the address input signal AI and the input / output clock signal CK shown in FIGS.
Another control signal line is connected. However, these signal lines are not described, irrespective of the nature of the present invention, in order to avoid complicating the description.

The switch unit 13 and the switch unit 13a
The program for performing all or a part of the processing in the steps 13 to 13c is stored in a CD-ROM (Read Only Memory).
Alternatively, an information processing device that can record the program on a recording medium such as a floppy disk or FD (Floppy Disk) and read the program may be used in place of the switches.

[0246]

As described above, the storage / playback apparatus according to the first aspect of the present invention has a first storage unit having a first access time and a second access time longer than the first access time. When storing continuous data, the first data group including the leading data in the continuous data is input to the first storage unit, while the first storage unit has the first storage unit. A second data group including subsequent data following each data in the data group is input to the second storage unit, and when the continuous data is reproduced, the first data group is read.
And a controller that causes the first storage unit to output each data in the data group, and outputs subsequent data following the data from the second storage unit.

In the above configuration, first, the first data is input or output (input / output) to / from the first storage unit having a short access time, and then the subsequent data is input / output to / from the second storage unit. . Then, when the data following the subsequent data is included in the first data group, input / output to / from the first storage unit is performed again.

Therefore, according to the above configuration, when storing and reproducing continuous data, the leading data of the continuous data is input / output to / from the first storage unit having a short access time.
It is possible to shorten the access time of the storage / reproduction device. Further, since the low-cost second storage unit is used, it is possible to reduce the cost of the entire apparatus. Further, since it is not necessary to store all the data of the first data group in the second storage unit, it is possible to efficiently use the storage capacities of these storage units. Therefore, according to the above configuration, when storing and reproducing continuous data,
It is possible to shorten the access time and to store and reproduce continuous data at low cost.

According to a second aspect of the present invention, in the storage / reproduction device according to the first aspect, the control unit, when storing or reproducing the continuous data, inputs each data in the first storage unit. Alternatively, the access time of the second storage unit is terminated before the output is terminated.

According to the above arrangement, subsequent data of the second data group can be input / output immediately after input / output of each data of the first data group. Therefore, in addition to the effect of claim 1, when the input / output storage unit is switched,
This has an effect that data input / output is not interrupted.

According to a third aspect of the present invention, in the storage / reproducing apparatus according to the second aspect, the control unit is configured to determine when the access to the second storage unit is started, and when the first storage unit is accessed. By controlling the size of each data of the first data group to be stored, the access time of the second storage unit is completed before the input or output of each data in the first storage unit is completed. .

According to the above configuration, the control unit controls the size of each data to be stored in the first storage unit and the time at which access to the second storage unit is started, so that the output of the first storage unit is controlled. Alternatively, before the input to the first storage unit is completed, the second
This is performed so that the access time of the storage unit ends. Thereby, in addition to the effect of the second aspect, there is an effect that the configuration according to the second aspect can be easily realized.

According to a fourth aspect of the present invention, in the storage / reproducing apparatus according to the second aspect, the control unit, when storing the continuous data, sets the end of each data in the first data group. Storing the portion in the second storage unit as a leading portion of each subsequent data in the second data group;
When reproducing the continuous data, when outputting the tail part from the first storage part, the head part is simultaneously read from the second storage part.

According to the above configuration, if the control unit outputs the subsequent data from the second storage unit during the reproduction of the tail part, the output of the continuous data is not interrupted. Therefore, according to the above configuration, in addition to the effect of the second aspect, there is an effect that the restriction on the timing of switching the storage unit for continuously outputting the continuous data can be relaxed. .

According to a fifth aspect of the present invention, there is provided a storage / reproducing apparatus comprising: a first storage unit having a first access time; and a second storage unit having a second access time longer than the first access time. When storing continuous data, all parts of the continuous data are stored in the second storage unit, and when the continuous data is reproduced, the continuous data is stored in the first storage unit. When the head data of the data is stored, the head data is output to the first storage unit, and the subsequent data following the head data is stored in the second storage unit.
If the head data is not stored in the first storage unit while the data is output from the storage unit, all the data is output to the second storage unit and the head data in the continuous data is stored in the first storage unit. Is provided with a control unit for storing the information in the memory.

According to the above configuration, the first storage unit stores the first
Even if the storage unit does not have an initialization step and time for copying the head data, the head data is output from the first storage unit having a short access time when the continuous data once reproduced is reproduced again. Becomes possible. Therefore, according to the above configuration, when storing and reproducing continuous data,
It is possible to shorten the access time and to store and reproduce continuous data at low cost.

According to a sixth aspect of the present invention, in the storage reproducing apparatus according to the fifth aspect, when the first data in the continuous data is stored in the first storage section, Is a configuration in which when updating the continuous data stored in the second storage section, the top data stored in the first storage section is also updated.

According to the above configuration, when the continuous data reproduced once is updated, the head data of the continuous data stored in the first storage unit which is the cache memory is also updated at the same time. Therefore, in addition to the effect of the fifth aspect, even after the update, it is possible to reproduce the continuous data having a high reproduction frequency in a short access time.

According to a seventh aspect of the present invention, in the storage / reproducing apparatus according to the fifth aspect, the control unit, when storing or reproducing the continuous data, reads the first data from the first storage unit. This is a configuration in which the access time of the second storage unit is ended before the output ends.

According to the above arrangement, since the access time of the second storage unit is completed before the output of the first data from the first storage unit is completed, immediately after the output of the first data, the subsequent data is output. Can be output. Therefore, in addition to the effect of the fifth aspect, there is an effect that the input / output of data is not interrupted when the storage unit for input / output is switched.

[0261] Also, in the storage / reproduction device according to claim 8 of the present invention, in the configuration of claim 7, the control unit is configured to determine when the access to the second storage unit is started and when the first storage unit is accessed. By controlling the size of the head data to be stored, the access time of the second storage unit ends before the output of the head data from the first storage unit ends.

According to the above configuration, the control unit controls the size of the first data to be stored in the first storage unit and the time at which access to the second storage unit is started, so that the output of the first storage unit is controlled. Alternatively, the access time of the second storage unit is set to end before the input to the first storage unit is completed. Thereby, in addition to the effect of claim 7,
There is an effect that the configuration according to claim 7 can be easily realized.

According to a ninth aspect of the present invention, in addition to the configuration according to any one of the first to eighth aspects, in addition to the configuration according to any one of the first to eighth aspects, a first data group stored in the first storage section is stored. The configuration is provided with an arithmetic unit for calculating at least one of the size or storage location of each data based on the address on the storage / reproduction device where the data is stored.

According to the above configuration, the arithmetic unit calculates at least one of the size and the storage location of the data in the first storage unit based on the address. Accordingly, in addition to the effect of any one of the first to eighth aspects, even if the first storage unit does not include a management tag for writing the size of each data, data input to the first storage unit can be performed. This has the effect that the end timing can be easily obtained.

A storage / reproduction method according to a tenth aspect of the present invention includes a first storage unit having a first access time,
In the storage / reproduction method for storing / reproducing continuous data using the second storage unit having a second access time longer than the first access time, the first data group including the leading data in the continuous data may be stored in the first storage unit. Continuous data is stored in the first storage unit by storing a second data group including subsequent data following each data in the first data group in the second storage unit. This is a method for reproducing continuous data by outputting each data in a data group from the first storage unit and outputting subsequent data following the respective data from the second storage unit.

In the above method, first, the first data is input or output (input / output) to / from the first storage unit having a short access time, and then the subsequent data is input / output to / from the second storage unit. . Then, when the data following the subsequent data is included in the first data group, input / output to / from the first storage unit is performed again.

Therefore, according to the above method, when storing and reproducing continuous data, the leading data of the continuous data is input / output to / from the first storage unit having a short access time.
It is possible to shorten the access time of the storage / reproduction device. Further, since the low-cost second storage unit is used, it is possible to reduce the cost of the entire apparatus. Further, since it is not necessary to store all the data of the first data group in the second storage unit, it is possible to efficiently use the storage capacities of these storage units. Therefore, according to the above method, when storing and reproducing continuous data,
It is possible to shorten the access time and to store and reproduce continuous data at low cost.

In the storage / reproduction method according to the eleventh aspect of the present invention, a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time are provided. In the storage / reproduction method for storing / reproducing continuous data using the two storage units, all parts of the continuous data are stored in the second storage unit, and the first data of the continuous data is stored in the first storage unit. If you have
The head data is output to the first storage unit, and the subsequent data following the head data is output from the second storage unit. If the head data is not stored in the first storage unit, In this method, all data is output to the second storage unit, and the leading data of the continuous data is stored in the first storage unit to reproduce the continuous data.

According to the above-described method, the first memory is stored in the second storage unit.
Even if the storage unit does not have an initialization step and time for copying the head data, the head data is output from the first storage unit having a short access time when the continuous data once reproduced is reproduced again. Becomes possible. Therefore, according to the above method, when storing and reproducing continuous data,
It is possible to shorten the access time and to store and reproduce continuous data at low cost.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a storage / reproduction device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a switch unit in the storage / reproduction device shown in FIG.

FIG. 3 is an explanatory diagram showing an example of a state of storing continuous data in a first storage unit and a second storage unit of the storage / reproduction device shown in FIG. 1;

FIG. 4 is an explanatory diagram showing a part of a timing chart showing operation timings in the storage / reproduction device shown in FIG. 1 when continuous data stored as shown in FIG. 3 is read.

FIG. 5 is an explanatory diagram showing another example of a continuous data storage situation in the first storage unit and the second storage unit of the storage / reproduction device shown in FIG. 1;

FIG. 6 is an explanatory diagram showing still another example of a state of storing continuous data in the first storage unit and the second storage unit of the storage / reproduction device shown in FIG. 1;

FIG. 7 is a block diagram illustrating a configuration of a storage / reproduction device according to a second embodiment of the present invention.

8 is a block diagram illustrating a configuration of a switch unit in the storage / reproduction device illustrated in FIG.

9 is an explanatory diagram showing an example of a continuous data storage situation in a first storage unit and a second storage unit of the storage / reproduction device shown in FIG. 7;

10 is an explanatory diagram showing a part of a timing chart showing operation timings in the storage / reproduction device shown in FIG. 7 when continuous data stored as shown in FIG. 9 is read.

FIG. 11 is a block diagram showing a configuration of a storage / reproduction device according to a third embodiment of the present invention.

FIG. 12 shows a first example of the storage / reproduction device shown in FIG.
FIG. 3 is a block diagram illustrating a configuration of a storage unit.

13 is a block diagram showing a configuration of a switch unit in the storage / reproduction device shown in FIG.

14 is an explanatory diagram showing an example of a state of storing continuous data in a first storage unit and a second storage unit of the storage / reproduction device shown in FIG. 11;

FIG. 15 is a flowchart showing an operation flow at the time of reading in the storage / reproduction device shown in FIG. 11;

16 is an explanatory diagram showing a timing chart for explaining an example of operation timing in the storage / reproduction device shown in FIG. 11;

17 is a flowchart showing a flow of an operation at the time of writing in the storage / reproduction device shown in FIG. 11;

FIG. 18 is a flowchart showing a flow of an operation in an initialization step in the storage / reproduction device shown in FIG. 11;

FIG. 19 is a block diagram showing a configuration of a storage / reproduction device according to a fourth embodiment of the present invention.

20 shows a first example of the storage / reproduction device shown in FIG.
FIG. 3 is a block diagram illustrating a configuration of a storage unit.

21 is a block diagram showing a configuration of a switch unit in the storage / reproduction device shown in FIG.

FIG. 22 is an explanatory diagram showing an example of a state of storing continuous data in a first storage unit and a second storage unit of the storage / reproduction device shown in FIG.

FIG. 23 is an explanatory diagram showing a timing chart for explaining operation timings in the storage / reproduction device shown in FIG. 19;

FIG. 24 is a block diagram showing a configuration of a storage / reproduction device according to a fifth embodiment of the present invention.

FIG. 25 shows a first example of the storage / reproduction device shown in FIG.
FIG. 3 is a block diagram illustrating a configuration of a storage unit.

FIG. 26 is an explanatory diagram showing an example of a storage state of continuous data in a first storage unit and a second storage unit of the storage / reproduction device shown in FIG.

FIG. 27 is a block diagram illustrating a configuration of a storage / reproduction device according to a sixth embodiment of the present invention.

FIG. 28 is a block diagram showing a configuration of a storage / reproduction device according to a seventh embodiment of the present invention.

FIG. 29 is a block diagram showing a configuration of a storage / reproduction device according to an eighth embodiment of the present invention.

FIG. 30 is a block diagram illustrating a configuration of an information processing apparatus according to a ninth embodiment of the present invention.

FIG. 31 is a block diagram showing a configuration of a conventional storage system.

FIG. 32 is an explanatory diagram showing a state during a recording operation of the storage system shown in FIG. 31;

FIG. 33 is an explanatory diagram showing a state during a reproducing operation of the storage system shown in FIG. 31;

FIG. 34 is a timing chart showing an operation of reading continuous data in a conventional synchronous dynamic ram.

[Explanation of symbols]

 1, 1a to 1d Storage / reproduction device 11, 11a to 11c First storage unit 12 Second storage unit 13, 13a to 13c Switch unit (control unit) 14 Adder 15 Offset value generator 16 Computing unit 32, 42, 55 Data I / O port 51 Multiplexer 52, 52a Counter 53, 54 Logic gate 81, 101 Sequencer

Claims (11)

[Claims] 1. A storage / reproducing apparatus comprising a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time, wherein continuous data is stored. In doing so, a first data group including the leading data in the continuous data is input to the first storage unit, and a second data group including subsequent data following each data in the first data group is stored in the first storage unit. When the continuous data is input to the second storage unit and each data in the first data group is output from the first storage unit, the subsequent data following the data is stored in the second storage unit. A storage / reproduction device comprising a control unit for outputting from a unit. 2. The control unit according to claim 1, wherein, when storing or reproducing the continuous data, the access time of said second storage unit is terminated before the input or output of each data in said first storage unit is terminated. The storage / reproduction device according to claim 1, wherein: 3. The first control unit controls the time at which access to the second storage unit is started and the size of each data of a first data group stored in the first storage unit. 3. The storage / reproducing apparatus according to claim 2, wherein the access time of the second storage section is terminated before input or output of each data in the storage section is terminated. 4. When storing the continuous data, the control unit sets the end of each data in the first data group as the head of each subsequent data in the second data group. 3. The apparatus according to claim 2, wherein, when reproducing the continuous data, when outputting the tail part from the first storage part, the head part is simultaneously read from the second storage part.
3. The storage and playback device according to claim 1. 5. A storage / reproduction device comprising a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time, wherein continuous data is stored. When the continuous data is reproduced, the entire portion of the continuous data is stored in the second storage unit. When the continuous data is reproduced, if the first data of the continuous data is stored in the first storage unit, The first data is output to the first storage unit, and the subsequent data following the first data is output from the second storage unit. If the first data is not stored in the first storage unit, the first data is output. 2. A storage / playback apparatus comprising: a control unit that outputs all data to a storage unit and stores first data in continuous data in the first storage unit. 6. When the first data in the continuous data is stored in the first storage section, the control section includes:
6. The storage / reproducing apparatus according to claim 5, wherein when updating the continuous data stored in the second storage unit, the head data stored in the first storage unit is also updated. 7. The storage unit according to claim 1, wherein when the continuous data is stored or reproduced, the access time of the second storage unit is terminated before the output of the first data from the first storage unit is terminated. The storage / reproduction device according to claim 5, wherein 8. The control unit according to claim 1, wherein the control unit controls a time at which access to the second storage unit is started and a size of head data to be stored in the first storage unit. 8. The access time of the second storage unit is terminated before output of data is terminated.
3. The storage and playback device according to claim 1. 9. The method according to claim 1, wherein at least one of the size and storage location of each data of the first data group stored in the first storage unit is determined based on an address on the storage / reproduction device where the data is stored. The storage / reproduction device according to any one of claims 1 to 8, further comprising an arithmetic unit for performing the calculation. 10. A storage for storing and reproducing continuous data using a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time. In the reproducing method, a first data group including head data in continuous data is input to the first storage unit, and a second data group including subsequent data following each data in the first data group is stored in the first storage unit. 2 for storing continuous data by inputting the data to the two storage units, outputting each data in the first data group from the first storage unit, and outputting subsequent data following the respective data from the second storage unit. And a method for reproducing continuous data. 11. A storage for storing and reproducing continuous data using a first storage unit having a first access time and a second storage unit having a second access time longer than the first access time. In the reproducing method, all portions of the continuous data are stored in the second storage unit, and when the first data of the continuous data is stored in the first storage unit, the first data is output to the first storage unit. Then, while the subsequent data subsequent to the head data is output from the second storage unit, if the head data is not stored in the first storage unit, all data is output to the second storage unit. And reproducing the continuous data by storing the first data in the continuous data in the first storage unit.