JP2000101367A - Lvds receiver circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a sense amplifier circuit which realizes speedy circuit operation. SOLUTION: In a differential amplifier circuit 1, consisting of two pre-stage transistor pairs Q5, Q6, and Q9, Q10, and a post-stage transistor pair Q11, Q12, the post-stage transistor pair Q11 and Q12 respectively receives a signal from the pre-stage transistor pairs at their gates. Thus, transistors which operate with even only a very little amount of electric charge so that speedy operation is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transistor input circuit, and more particularly to an LVDS (low voltage differen
tial signal) This relates to a receiver circuit.

[0002]

2. Description of the Related Art Conventionally, generally, an input portion of an electronic circuit receives an external signal, converts the signal into a signal having a predetermined voltage value and a current value, and supplies the signal to a subsequent electronic circuit. Is provided. By providing such an input circuit, a more stable circuit operation can be obtained,
A highly reliable circuit operation is realized as a whole.

[0003]

However, such an input circuit also has a certain operating speed, and a certain limitation is imposed on the change of the input signal. For example, as an example, a digital signal that changes in the range of 100 MHz can be processed. However, for an input signal that changes between active and inactive at a higher speed, the circuit operation follows this. Failure to do so results in a malfunction.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide an input circuit capable of achieving a desired operation even for a signal that changes rapidly by realizing a higher processing speed. .

[0005]

SUMMARY OF THE INVENTION The main outline of the present invention is as follows.
This will be briefly described below.

According to the present invention, two differential signals are received by respective gates, and one end of a current path is connected to a power supply potential,
The other end of the current path is connected to the ground potential, a first transistor pair of the first conductivity type, the two differential signals are received at respective gates, one end of the current path is connected to the power supply potential, A second transistor pair of a second conductivity type, the other end of the current path being connected to the ground potential; and one end of the current path of one of the first transistor pair being connected to the gate thereof, A third transistor of the second conductivity type having the other end connected to the power supply potential, and one end of the current path of one of the second transistor pair connected to its gate, and one end of the current path And a fourth transistor of the first conductivity type connected to the other end of the current path of the third transistor, and the other end of the current path connected to the ground potential, in response to a change in the difference signal. The current path of the third transistor A differential amplifier circuit and supplying an output signal to the outside from the other end.

[0007] As described above, the differential amplifier of the present invention comprises two preceding transistor pairs and a subsequent transistor pair. It should be noted that the subsequent transistor pair receives a signal from the preceding transistor pair at its gate. This enables a very quick operation as compared with the conventional circuit.

In the conventional circuit, since the signal from the preceding transistor pair is received at the source of the succeeding transistor, the charge capacity is equivalently very large as compared with the gate. In other words, it takes much time to transfer charges from the preceding transistor pair as compared with the gate of the present invention.

That is, the latter transistor pair of the present invention is:
Compared to the source, the signal from the previous transistor pair is equivalently received by the gate having a very small capacitance compared to the source, so that the FET can be operated with a small amount of charge, and the operation speed can be improved. it can. More specifically, as an example, the conventional circuit can support only a signal of about 100 MHz (a fluctuating input signal), whereas the circuit of the present invention can support a signal of about 400 MHz, and is simply By calculation, the operation speed is improved four times.

According to the present invention, there is provided a semiconductor device of the first conductivity type, wherein two differential signals are received by respective gates, one end of a current path is connected to a power supply potential, and the other end of the current path is connected to a ground potential. A second transistor of a second conductivity type, wherein a first transistor pair and the two differential signals are received at respective gates, one end of a current path is connected to the power supply potential, and the other end of the current path is connected to the ground potential. A second transistor pair, and the first transistor pair
One end of the current path of one of the transistor pairs is connected to the gate, and the other end of the current path is connected to the power supply potential. One end of the current path is connected to the gate, one end of the current path is connected to the other end of the current path of the third transistor, and the other end of the current path is connected to the ground potential. The other end of the current path of the fourth transistor of the first conductivity type and the other end of the current path of the third transistor are connected to respective gates, and the current path is provided in series between a power supply potential and a ground potential. Fifth of conductivity type
A differential amplifier circuit comprising: a transistor; and a sixth transistor of the first conductivity type, wherein an output signal is supplied to the outside from a current path of the fifth transistor in accordance with a change in the difference signal. .

According to the present invention, a first transistor pair of a first conductivity type having two gates receiving two differential signals and having one end of a current path connected to a power supply potential; A second transistor of the first conductivity type provided between the other end of the path and the ground potential; and a second transistor having the two differential signals received at respective gates, and one end of the current path connected to the power supply potential. A third transistor pair of two conductivity type; a fourth transistor of second conductivity type provided between the other end of the current path of the third transistor pair and the ground potential; One end of the one current path is connected to its gate, and the other end of the current path is connected to the power supply potential. The fifth transistor of the second conductivity type, and the one of the third transistor pair. Current path An end of the first conductive type is connected to the gate, one end of the current path is connected to the other end of the current path of the third transistor, and the other end of the current path is connected to the ground potential. A differential amplifier circuit comprising: a transistor; and supplying an output signal from the other end of the current path of the fifth transistor to the outside according to a change in the difference signal.

Further, according to the present invention, two differential signals are received by respective gates, one end of the current path is connected to the power supply potential, and the other end of the current path is connected to the ground potential. And one end of each of the current paths of the first transistor pair is connected to their gate terminal, one end of each of the current paths is connected to the power supply potential, respectively, A second transistor pair of a second conductivity type, the other end of which is connected to the ground potential, and the two differential signals received by respective gates; one end of a current path thereof is connected to a power supply potential; And a third transistor pair of the second conductivity type, the other end of which is connected to ground potential, and the other end of each of the current paths of the third transistor pair is connected to their gate terminals, and One end of A fourth transistor pair of a second conductivity type, each of which is connected to the power supply potential and the other end of the current path is connected to the ground potential; and one end of the second transistor pair is connected to its gate. A fifth transistor of the second conductivity type, one end of the current path of which is connected to the power supply potential, and the other end of the fourth transistor pair connected to the gate of the fifth transistor; An end is connected to one end of the current path, and the other end of the current path is connected to the ground potential.
A differential amplifier circuit comprising: a transistor; and supplying an output signal from the other end of the current path of the fifth transistor to the outside according to a change in the difference signal.

According to these configurations, a more stable operation enables a rapid signal processing to be realized by a transistor pair at the subsequent stage which receives a signal by a gate.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing an example of an LVDS receiver circuit according to the present invention. In FIG. 1, LVDS
The sense amplifier circuit 1 as a receiver circuit includes a transistor Q1, a transistor Q2, a transistor Q3, and a transistor Q4 provided in series with a power supply potential and a ground potential.
The input signals D +, D- connected to the current paths of these transistors, respectively, are provided in the current paths of the transistors Q5, Q6, which are the first transistor pair in the preceding stage in which these input signals are respectively supplied to the gates. A transistor Q7 and resistors R4 to R6, a second transistor pair of transistors Q9 and Q10, a transistor Q8 provided in a current path thereof, and resistors R7, R8 and R9;
Further, the transistors Q11 and Q12, which are provided between the power supply potential and the ground potential, and which are output from the preceding transistor pair at their respective gates, are provided between the resistors R1 to R3, and the power supply potential. And transistors Q13 and Q14, which are a transistor pair provided between the transistor Q13 and the ground potential.

According to the LVDS receiver circuit of the present invention, with such a configuration, a signal change of the difference signals D + and D- is identified by the pair of the preceding transistors Q5, Q6, Q9 and Q10, and the result is determined by the pair of the subsequent transistors Q11 and Q12. Supply to each gate terminal. As a result, in the sense amplifier circuit including the feedback circuit of the drain follower circuit as in the past, the transistor operation that could not be performed quickly can be quickly performed by the potential change by the gate terminal whose capacitance seems to be equivalently small. Become.

Here, an example of a sense amplifier circuit including a feedback circuit of a conventional drain follower circuit will be described below for comparison. FIG. 4 is a circuit diagram showing an example of this conventional receiver circuit. This sense amplifier circuit 4 comprises a transistor Q101, a transistor Q102, and a transistor Q102 provided in series with a power supply potential and a ground potential.
103, Q104, input signals D +, D- respectively connected to the current paths of these transistors, and transistors Q105, Q106, which are the first pair of transistors in the preceding stage in which these input signals are respectively supplied to the gates, A transistor Q107 provided in the path and a resistor R
104 to R106, transistors Q109 and Q110 as a second transistor pair, a transistor Q108 provided in a current path of these transistors, and resistors R107 and R10.
8, R109, and further resistors R101 to R103, and transistors Q111 and Q, which are a pair of transistors in the subsequent stage, which receive output signals from the pair of transistors in the preceding stage at their respective sources and are provided between the power supply potential and the ground potential.
112, and transistors Q113 and Q114 which are a pair of transistors provided between the power supply potential and the ground potential.
It is provided together with the resistors R111 and R112.

In such a conventional circuit, the output from the preceding transistor pair Q105, Q106, Q109, Q110 is supplied to the sources of the subsequent transistors Q111, Q113, respectively. It can be easily imagined that the operation will be performed after being satisfied by the movement, and the operation will be slower than in the case of the gate terminal of the present invention.

This is an example.
In contrast to being able to cope only with a signal of MHz (a fluctuating input signal), the circuit of the present invention can cope with a signal of about 400 MHz, and a simple calculation has improved the operation speed four times. It will be.

The circuit operation of the LVDC circuit shown in FIG. 1 will be described below in detail with reference to the timing chart shown in FIG. FIG. 2 is a timing chart showing the circuit operation of the LVDS receiver circuit of FIG.
The potential changes over time at points, points B and C are shown. The respective timings will be described in order.

At a time, the input signals D- and D + are supplied with mutually opposite input signals.

At time, the input signals are D- and D +,
At the point A, the inputs D− and D−
The signal is output with a delay according to +.

Similarly, at a point B, a signal is output at a point B with a delay according to the inputs D- and D + by using a differential amplifier constituted by a pair of NMOS transistors whose inputs are D- and D + and whose output is B. I do.

At time, the inputs are A and B, and the output is C
A signal C is output at a point C with a delay to inputs A and B at a point C.

At time, an output D0 is output with a delay according to the input C by a CMOS amplifier having an input C and an output D0.

Thus, the differential amplifier circuit 1 of the present invention
Output an output D0 according to the input signals D + and D-.

Further, the case of the reverse input signal will be described below.

At the time, mutually opposite input signals different from the time are supplied to the inputs D- and D +.

At time, an output A is set by a differential amplifier constituted by an NMOS having inputs D- and D + and an output A.
The point is output with a delay according to the inputs D + and D-.

At time, the inputs are A and B, and the output is C
And outputs it to the output point C with a delay according to the inputs A and B.

At a time, the output D0 is output with a delay according to the input C by a CMOS amplifier whose input is C and whose output is D0.

Still another embodiment of the present invention will be described below with reference to FIG. FIG. 3 is a circuit diagram showing another example of the LVDS receiver circuit according to the present invention. This LVD
The sense amplifier circuit 2 as an S receiver circuit includes a transistor Q21, a transistor Q22, a transistor Q23, and a transistor Q21 provided in series with a power supply potential and a ground potential.
Q24, input signals D + and D- respectively connected to the current paths of these transistors, and transistors Q25 and Q26, which are the first pair of transistors in the preceding stage in which these input signals are supplied to the gates, respectively. The transistor Q27 provided, the resistors R21 to R24, and the transistors Q28 and Q2 as a second transistor pair
9, a transistor Q30 provided in the current path thereof, and resistors R27 to R31, and resistors R25 and R26 connected to a power supply potential for specifying a potential supplied to the gate of the transistor Q27. Furthermore, this LVD
In parallel with this, the sense amplifier circuit 2 serving as an S receiver circuit includes input signals D + and D- connected to the current paths of these transistors, respectively, and a third stage in the preceding stage in which these input signals are respectively supplied to the gates. Transistors Q32 and Q33 as a transistor pair, a transistor Q31 provided in a current path thereof, resistors R32 to R37, and transistors Q35 and Q3 as a fourth transistor pair
6, a transistor Q34 provided in the current path thereof, and resistors R38 to R42, and resistors R38 and R39 connected to a power supply potential for specifying a potential supplied to the gate of the transistor Q34.

The first transistor pair Q25, Q25
The output of the second transistor pair Q32, Q29 is connected to the gates of the second transistor pair Q28, Q29, respectively.
The output of 33 is connected to the gates of the fourth transistor pair Q35, Q36, respectively.

Further, this sense amplifier circuit 2 has an output stage first transistor pair Q37, Q38 and an output stage second transistor pair Q39, Q40, and the output of the third transistor pair Q29 and the fourth transistor pair. Vs. Q36
Of the output stage first transistor pair Q37, Q38
The output is connected to the gates of the output stage second transistor pair Q39 and Q40, and this output is obtained as the output of the sense amplifier circuit 2.

According to this circuit configuration, the number of transistor pairs in the input stage is increased from two to four, and the input difference signals D + and D- are processed in parallel, so that the sense in the case of FIG. A result that the amplification factor is larger than that of the amplifier circuit and can handle a weak signal can be obtained.

The sense amplifier circuit as the LVDS receiver circuit according to the present invention is not limited to the above-described configuration, but can be variously modified within the scope of the same gist and produces the same effect. Needless to say, there is.

[0037]

As described above, according to the present invention, it is possible to provide a differential amplifier circuit which realizes a more rapid circuit operation by receiving the signal of the preceding transistor pair at the gate terminal of the succeeding transistor pair. it can.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an example of an LVDS receiver circuit according to the present invention.

FIG. 2 is a timing chart showing a circuit operation of the LVDS receiver circuit of FIG.

FIG. 3 is a circuit diagram showing another example of the LVDS receiver circuit according to the present invention.

FIG. 4 is a circuit diagram showing an example of a conventional receiver circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... LVDS receiver circuit 2 ... LVDS receiver circuit 3 ... LVDS receiver circuit Q1-Q14 ... FET transistor R1-R9 used for LVDS receiver circuit Resistance Q21-Q40 ... FET transistor R21-R42 used for LVDS receiver circuit

Continued on the front page F term (reference) 5B015 HH01 JJ21 KB13 5B024 AA15 BA07 CA07 5J056 AA01 BB02 CC00 CC01 CC04 DD13 DD28 FF09 5J066 AA01 AA12 CA65 FA04 HA10 HA17 HA25 MA11 MA21 ND01 ND11 ND25 PD01 SA00 TA06

Claims (5)

[Claims] A first transistor of a first conductivity type, wherein two differential signals are received at respective gates, one end of a current path is connected to a power supply potential, and the other end of the current path is connected to a ground potential. A pair of the second conductive type, wherein the two differential signals are received by respective gates, one end of the current path is connected to the power supply potential, and the other end of the current path is connected to the ground potential. A third transistor of the second conductivity type having one end of the current path of one of the first transistor pair connected to the gate thereof and the other end of the current path connected to the power supply potential; One end of the current path of one of the second transistor pair is connected to its gate, and one end of the current path is connected to the third
The fourth terminal of the first conductivity type is connected to the other end of the current path of the transistor, and the other end of the current path is connected to the ground potential.
A differential amplifier circuit comprising: a transistor; and supplying an output signal to the outside from the other end of the current path of the third transistor according to a change in the difference signal. 2. A first transistor of a first conductivity type, wherein two differential signals are received at respective gates, one end of a current path is connected to a power supply potential, and the other end of the current path is connected to a ground potential. A pair of the second conductive type, wherein the two differential signals are received by respective gates, one end of the current path is connected to the power supply potential, and the other end of the current path is connected to the ground potential. A third transistor of the second conductivity type having one end of the current path of one of the first transistor pair connected to the gate thereof and the other end of the current path connected to the power supply potential; One end of the current path of one of the second transistor pair is connected to its gate, and one end of the current path is connected to the third
The fourth terminal of the first conductivity type is connected to the other end of the current path of the transistor, and the other end of the current path is connected to the ground potential.
A fifth transistor of the second conductivity type, wherein the other end of the current path of the third transistor is connected to respective gates, and the current path is provided in series between a power supply potential and a ground potential; And a sixth transistor of a first conductivity type, wherein an output signal is supplied to the outside from a current path of the fifth transistor according to a change in the difference signal. 3. A first transistor pair of a first conductivity type having one end of a current path connected to a power supply potential and two differential signals received by respective gates, and the other of the current paths of the first transistor pair. A second transistor of the first conductivity type provided between an end and the ground potential; a second conductivity type wherein the two differential signals are received at respective gates, and one end of a current path thereof is connected to the power supply potential. A third transistor pair, a fourth transistor of the second conductivity type provided between the other end of the current path of the third transistor pair and the ground potential, and the one of the first transistor pair A fifth transistor of the second conductivity type having one end of a current path connected to the gate and the other end of the current path connected to the power supply potential; and a fifth transistor of one of the third transistor pairs. One end Is connected to a gate, said third one end of the current path
The sixth terminal of the first conductivity type is connected to the other end of the current path of the transistor, and the other end of the current path is connected to the ground potential.
A differential amplifier circuit comprising: a transistor; and supplying an output signal from the other end of the current path of the fifth transistor to the outside according to a change in the differential signal. 4. A fifth terminal of the first conductivity type, wherein one end of the current path is connected to the gate and the power supply potential, and the other end of the current path is connected to the gate of the first transistor pair. A transistor, one end of the current path being connected to the gate thereof and the power supply potential, and the other end of the current path being connected to the gate of the second transistor pair, the sixth transistor of the first conductivity type being provided. A second transistor of the second conductivity type, wherein one end of the current path is connected to the gate and the ground potential, and the other end of the current path is connected to the gate of the first transistor pair; An eighth transistor of the second conductivity type, wherein one end of a current path is connected to the gate thereof and the power supply potential, and the other end of the current path is connected to the gate of the second transistor pair. Differential amplifier circuit according to claim 1, characterized in that it comprises a. 5. A first conductive type first signal receiving two differential signals at respective gates, one end of a current path thereof is connected to a power supply potential, and the other end of the current path is connected to a ground potential. One end of each of the current paths of the transistor pair and the first transistor pair is connected to their gate terminals, one end of each of the current paths is connected to the power supply potential, and the other end of each of the current paths is A second transistor pair of a second conductivity type connected to the ground potential; a gate receiving the two difference signals; one end of a current path connected to a power supply potential; and the other end of the current paths Are connected to the ground potential, a third transistor pair of the second conductivity type, and the other ends of the current paths of the third transistor pair are connected to their gate terminals, respectively. Before each A fourth transistor pair of the second conductivity type connected to a power supply potential and the other end of the current path connected to the ground potential; and a current path connected to one end of the second transistor pair to the gate thereof. A fifth transistor of the second conductivity type, one end of which is connected to the power supply potential; the other end of the fourth transistor pair is connected to its gate; and the other end of the current path of the fifth transistor is the current thereof. A sixth transistor of the first conductivity type connected to one end of the current path, the other end of the current path being connected to the ground potential, and a current path of the fifth transistor in response to a change in the differential signal. A differential amplifier circuit for supplying an output signal from the other end to the outside.