JP2000099173A - Regulator circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate an overshooting at the time of switching from a source voltage to a regulator voltage and to shorten the voltage switching time by selecting either the output of a reference circuit or the source voltage to supply to an operation type operational amplifier. SOLUTION: The potential of an output voltage switching terminal 101 is denoted as VDD, and the output of the reference circuit 1 is connected to the negative input terminal of the operational amplifier 2. When the reference potential is higher than that of the positive input terminal of the operational amplifier 2 in the view point from VSS, the output potential of the operational amplifier circuit 2 varies instantly from VDD to VSS. When output level of the operational amplifier 2 reaches the VSS, the source-drain resistance of an output transistor 3a increases to a level higher than that of the equivalent resistor of an external load circuit where a pull-up resistor circuit 6 and a regulator circuit are driven. Consequently, the potential of a regulator output terminal 102 rises. While this process is repeated, the potential of the regulator output terminal 102 reaches a regulated potential.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a regulator circuit capable of switching an output voltage between a power supply voltage and a regulated voltage, and in particular, does not cause overshoot in a voltage change when the output voltage is switched from the power supply voltage to the regulator voltage. By providing means for reducing the switching time, it is possible to apply the present invention to any system using a high-speed and highly reliable multiple power supply.

[0002]

2. Description of the Related Art FIG. 2 shows an example of a conventional regulator circuit capable of switching between a power supply voltage and a regulated voltage when operating with a negative power supply, and the operation will be described.
In the following description, the positive power supply potential is set to VDD, and the negative power supply potential is set to VSS.

[0003] A conventional circuit configuration has an Nch for VSS.
A constant voltage higher than Vth of the transistor, here V
A voltage reference circuit 11 for outputting the Vth of the Pch transistor with respect to the DD, an operational amplifier 12 having the Pch transistor as an operation input, and an N for output current drive
channel transistor 13 and capacitor 14 for phase compensation
And an Nch transistor Vth adding Nch transistor 15, a pull-up resistor circuit 16, and a regulator output voltage switching Nch transistor 17.

The operational amplifier 12 has a negative input terminal for a reference potential and a positive input terminal for an Nch transistor V.
The drain and gate of the th addition transistor 15 are connected, and the gate of the output drive transistor 13 is connected to the regulator output terminal 112. The source and bulk of the output drive transistor 13 are connected to the negative power supply potential VSS114, and the drain is connected to the regulator output terminal 11.
2 and the Nch transistor Vth are connected to the source and bulk of the Nch transistor 15 for adding Vth. Thereby, the operational amplifier 12 adds the positive Vth of the Nch transistor to the reference potential, that is, adds the Vth of the Pch transistor and the Vth of the Nch transistor to the negative side with respect to the ground power supply potential VDD113 to the regulator output terminal potential. Work to keep. This operation is nothing but a regulator operation.

In this state, the regulator output terminal 112
When a voltage equal to or higher than Vth is applied to the gate of the output voltage switching Nch transistor 17 having the drain connected to VSS 114 and the source and bulk connected to VSS 114, the regulator output is short-circuited to VSS 114 and the output terminal 11
2 is a negative power supply potential. When the gate voltage is set to Vth or less, the regulated potential is output to the regulator output terminal 112 again.

Here, regarding the potential change of the regulator output terminal 112 and the like when the regulator output voltage is switched,
This will be described in more detail with reference to FIG. 3 showing the potential of the main wiring and FIG. 4 showing the internal circuit of the operational amplifier. In addition,
The corresponding circuit has VDD 113 of 0 V, VSS 114 of -1.
It operates at 5V, outputs Vth of Pch and Nch transistors of 0.4V, and outputs regulated voltage of -0.8V.

As shown in FIG. 3, the output potential of the regulator output terminal is initially a regulated voltage of 5 m.
A potential is applied to the output voltage switching terminal 111 in the order of VSS, VDD, and VSS so that the potential becomes VSS after 5 seconds and the regulated voltage again after 5 msec.

Hereinafter, the timing chart of FIG. 3 will be described in chronological order.

First, at time 0, the potential of the output voltage switching terminal 111 is VSS, and the regulator output is stable at the regulated voltage. At this time, the positive and negative input terminals of the operational amplifier 12 are both at the reference potential, that is, the potential of Pch Vth. From this fact and the operation of the Nch transistor Vth adding Nch transistor 15, the regulator output potential is Vth of the Pch transistor.
Of the Nch transistor to the negative side, ie, -0.8V.

The gate of the output drive transistor 13 has a reference potential equal to the Vch of the Nch transistor.
The operational amplifier 12 supplies a potential that can maintain the potential of the regulator output terminal 112 to the sum of th. This potential can change from a potential higher than Vth of the Nch transistor with respect to VSS to a potential near VDD depending on the magnitude of the load.

Next, at time 5 msec, the potential of the output voltage switching terminal changes to VDD.

First, the output potential of the regulator is forcibly short-circuited to VSS by the output voltage switching Nch transistor 17, and becomes equal to VSS.

For this reason, the potential of the positive input terminal of the operational amplifier 12 becomes equal to the sum of VSS and Vth of the Nch transistor through the Nch transistor 15 for adding the Nch transistor Vth. Also, the operational amplifier 1
Since the reference potential supplied to the negative input terminal of No. 2 is higher than Vth of the Nch transistor with respect to VSS, the potential of the regulator output terminal 112 becomes VSS due to the extremely large operation amplification factor of the operational amplifier.

The output drive transistor 13 supplied with the output potential of the operational amplifier 12 is completely cut off, and this state changes the potential of the output voltage switching terminal 111 to V.
This is a steady state when DD is set. At this time, both terminals of the phase compensation capacitor 14 are at VSS.

From this state, at time 10 msec, the operation of switching the output voltage to the regulated voltage is performed with the potential of the output voltage switching terminal 111 set to VSS.

Since the output drive transistor 13 for pulling the regulator output to the VSS side is completely cut off in the original state, the output voltage switching terminal 111 is connected to the VS
When the output voltage switching Nch transistor 17 is cut off as S, the regulator output terminal 112 is connected to VSS
There is no current path to the side.

Then, the potential of the positive input terminal of the operational amplifier 12 changes from VSS to VDD. However, as long as the potential of the positive input terminal of the operational amplifier does not become higher than the potential of the negative input terminal, no change appears at the output terminal of the operational amplifier.

When the potential of the positive input terminal of the operational amplifier reaches the reference potential, the potential of the output terminal of the operational amplifier starts to change for the first time.

However, from the internal circuit of the operational amplifier shown in FIG. 4, the input terminals 120 and 121 of the operational amplifier are connected to the gates of the Pch transistors 21 and 22, respectively. Since the voltage is about Vth of Pch, the resistance of the current path that pulls the output terminal 122 of the operational amplifier toward the VDD 123, that is, the resistance between the source and drain of the Pch transistor becomes very high.

After all, the output current of the operational amplifier at this time is P
Pch transistor 21 biased by Vth of channel
And the current Ic determined by the constant current characteristics of the phase compensation capacitor 22 and the phase compensation capacitor 1 connected to the output terminal of the operational amplifier.
4 and the gate capacitance C of the output drive transistor
The rise in potential is delayed by the time necessary for n18 to be charged by this current.

Here, since Ic is a very small current, the time td required for charging C and Cn by Ic is relatively long, reaching several tens of msec to more than one hundred msec. This is undesirable for a system incorporating a regulator, particularly when high-speed operation is required.

It should be further noted that, as shown in FIG. 3, when switching the output voltage, there is a large delay in the time for feeding back the potential change of the output terminal to the gate potential of the output drive transistor 13, so that the regulator When switching the potential of the output terminal 112 from VSS to the regulated voltage, several tens of msec
After the output voltage reaches the regulated voltage over a period of several hundred msec, the potential continues to rise and the potential of the regulator output terminal 112 temporarily becomes higher than the regulated potential, ie, overshoot. Is to occur.

When an overshoot occurs, the power supply voltage of the system in which the regulator is incorporated becomes lower than the designed voltage value even temporarily, which is not desirable for many systems, and in some cases, shuts down the system. This can cause

[0024]

SUMMARY OF THE INVENTION In a regulator circuit, in particular, a regulator circuit capable of switching an output voltage between a regulated voltage and a power supply voltage, a conventional circuit overshoots a voltage change when the output voltage is switched from the power supply voltage to the regulator voltage. There is a problem that a shoot is generated and adversely affects a system using a regulator output as a power supply. In addition, the switching time at the time of voltage switching is currently several tens of meters.
It requires a time from sec to 100 msec or more, which is a problem in a system operating at high speed.

As described above, in the regulator circuit capable of switching the output voltage between the regulated voltage and the power supply voltage, there is no overshoot of the voltage change when the output voltage is switched from the power supply voltage to the regulator voltage, and the voltage switching time is reduced. There was a problem to do.

[0026]

According to the present invention, a regulator circuit having the following configuration is employed to solve the above-mentioned problems.

In a regulator circuit using an operational operational amplifier having means for switching an output voltage between a regulated voltage based on a reference voltage generated by a reference circuit and a power supply voltage, the switching means comprises:
A regulator circuit is characterized in that an output of the reference circuit and a power supply voltage are selected by an output voltage switching signal and supplied to an input of the operation type operational amplifier.

The configuration and operation of the regulator circuit according to the present invention will be described below.

Here, the regulator circuit of the present invention includes a voltage reference circuit 1 for outputting the Vth of a Pch transistor, an operational amplifier circuit 2 using the Pch transistor as an operation input, and an Nch transistor Vth, as typically shown in FIG. The output Nch transistor 5, the pull-up resistor circuit 6, the output drive transistor 3, the phase compensation capacitor 4, the output of the reference circuit, and the negative power supply potential VSS 104 are output voltage switching signals 101.
A description will be given of a case in which the switch circuit 7 is configured to be operated by a negative power supply.

The operational amplifier 2 has a negative input terminal connected to the reference potential output from the reference circuit 1, a positive input terminal connected to the drain and gate of the Nch transistor Vth adding Nch transistor 5, and a regulator output terminal 102 connected to the negative input terminal. The gate of the output drive transistor 3 is connected. The source of the output drive transistor 3 is connected to VSS, and the drain is connected to the regulator output terminal 10.
2 and the Nch transistor Vth are connected to the source of the Nth transistor 5 for adding Vth. As a result, the operational amplifier 2
The sum of the reference potential and the positive Vth of the Nch transistor, that is, the Vth of the Pch transistor and the Vth of the Nch transistor are added to the ground power supply potential VDD10.
An operation is performed so as to keep the potential of the regulator output terminal 102 at the value added to the negative side with respect to 3. This operation is nothing but a regulator operation.

Here, the regulator output terminal 10
2 is switched between the regulated potential and the VSS, the output potential of the reference circuit 1 and the VSS1
A switch circuit 7 for selecting the potential 04 from the output voltage switching signal 101 and supplying the selected potential to the negative input terminal of the operational amplifier is added to the circuit.

That is, one input terminal of the switch circuit 7 is connected to the output of the reference circuit 1 and the other input terminal is connected to V
The output voltage switching signal 101 is supplied to the switch terminal 104 to the SS 104, and the output terminal of the switch circuit 7 is connected to the negative input terminal of the operational amplifier 2. The switch circuit 7 connects the output of the reference circuit 2 to the negative input terminal of the operational amplifier 2 when VDD is supplied to the switch terminal 104, and connects the negative power supply potential VSS104 and the operational amplifier 2 when VSS is supplied. To the negative input terminal.

In the circuit shown in FIG. 1, when the output voltage switching terminal is set to VDD, the output voltage is a regulated voltage.

From this state, the output voltage switching terminal 10
Assuming that 1 is VSS, the switch circuit disconnects the reference circuit 1 and the operational amplifier 2 and connects the VSS 104 to the negative input terminal of the operational amplifier 2.

By the way, the operational amplifier 2 which is supplied with the lowest potential VSS in the circuit to the negative input terminal of the operational amplifier 2 has a very large amplification factor. Output VDD. In addition,
Due to the operation of the Nch transistor Vth addition transistor 5, the potential of the positive input terminal is not input with a potential higher than minus Vth based on VDD.

The output of the operational amplifier 2, that is, the output drive transistor 3 whose gate is supplied with the VDD potential is completely turned on, and the output voltage of the regulator circuit becomes VSS.

At this time, none of the transistors except the inside of the switch circuit 7 is off.

If the potential of the output voltage switching terminal 101 is further changed to VDD from this state, the output of the reference circuit 1 is connected to the negative input terminal of the operational amplifier again.
The positive input terminal is given by adding VSS to the Vth of the Nch transistor. Here, when the potential lower by Vth of the Pch transistor as viewed from VDD, that is, the reference potential is higher than the potential higher by Vth of the Nch transistor as viewed from VSS, that is, higher than the potential of the positive input terminal of the operational amplifier 2, the operational amplifier circuit The output potential immediately changes from VDD to VSS. In other words, when a voltage higher than the sum of the respective absolute values of Vth of the Pch transistor and Vth of the Nch transistor is applied as the power supply voltage of the regulator circuit, the above operation is performed.

When the output of the operational amplifier 2 approaches VSS and the potential drops to the vicinity of Vth of the Nch transistor with respect to VSS, the resistance between the source and the drain of the output drive transistor 3 increases, and the pull-up resistor circuit 6 and It becomes higher than the equivalent resistance of the external load circuit driven by the regulator circuit. As a result, the potential of the regulator output terminal 102 increases, and furthermore, the operational amplifier 2
Will also increase toward VDD, and the output drive transistor 3 will not be turned off.

Further, while repeating the above process, the positive input terminal of the operational amplifier 2 changes until it becomes equal to the reference potential, and the potential of the regulator output terminal 102 becomes the regulated potential.

In the above process, there is no timing at which each transistor is completely turned off, and the circuits subsequent to the operational amplifier 2 to which the reference potential is applied from the reference circuit 1 do not have a high impedance state, and all of them operate actively. Therefore, a regulated voltage is output to the regulator output terminal 102 within a short time.

For the same reason as described above, the delay in feedback that occurs in the conventional circuit is extremely reduced, and as a result, overshoot does not occur when the regulator output voltage changes.

[0043]

Embodiments of the present invention will be described below. FIG. 5 shows an embodiment of the present invention.
FIG. 6 shows the potential change of the main wiring during the circuit operation according to the embodiment of the present invention.

In the circuit according to the embodiment of the present invention shown in FIG. 5, the switch circuit in the circuit shown in FIG. 1 is realized as an output voltage switching Nch transistor 37. Further, when the output of the reference circuit 31 is short-circuited to VSS by the output voltage switching Nch transistor 37, the reference power supply switching transistor 3 is used because the reference circuit 31 does not consume unnecessary current.
8 is added.

That is, the drain of the output voltage switching Nch transistor 37 is supplied to the output of the reference circuit 31, the source and bulk are supplied to VSS, and the gate is supplied with an inverted logic signal of the output voltage switching terminal 131. The drain of the intermittent transistor 38 is connected to the positive power supply of the reference circuit 31, the source and the bulk are connected to VDD 133, the gate is supplied with a signal having the same phase as the logic signal of the output voltage switching terminal 131, and the output voltage is switched. The inverter circuit 39 is used to generate an inverted signal of the logic signal at the terminal 131.

This regulator circuit sets VDD at 0 V and VS
S operates at -1.5 V, the Vth of the Pch and Nch transistors are both 0.4 V, and the regulation voltage is -0.8 V.
V is output.

Regarding the regulator output, as shown in FIG.
S, VSS is connected to the regulator output voltage switching terminal so that the regulated voltage becomes the regulated voltage again after 5 msec.
A potential is applied in the order of VDD and VSS.

Hereinafter, the timing chart of FIG. 6 will be described in chronological order.

First, at time 0, the potential of the regulator output voltage switching terminal 131 is VSS, and the regulator output is stabilized at the regulated voltage. At this time, the positive and negative input terminals of the operational amplifier 32 are both -0.4.
Because of this and the operation of the Nch Vth addition Nch transistor 35, the regulator output potential becomes −0.8 V obtained by adding the Vth of the Nch transistor to the negative side of the Vth potential of the Pch transistor.

The gate of the output drive transistor 33 has a reference potential of V of an Nch transistor.
The operational amplifier 32 supplies a value obtained by adding th, that is, a potential that can maintain the potential of the regulator output terminal 132 to −0.8 V. This potential is changed from a potential higher than Vth of the Nch transistor with respect to VSS to VDD.
It can vary depending on the size of the load up to a nearby potential.

Next, at time 5 msec, the potential of the output voltage switching terminal is set to VDD.

Reference power supply intermittent transistor 38
Is turned off, the output of the reference circuit 31 becomes high impedance, and at the same time, the potential of the negative input terminal of the operational amplifier 32 receiving the reference output becomes VSS when the output voltage switching Nch transistor 37 is turned on. It should be noted that no current is consumed in the reference circuit 31 because the reference power supply intermittent transistor 38 is off.

Since the potential of the negative input terminal of the operational amplifier 32 to which the output of the reference circuit 31 is connected becomes the lowest potential VSS in the circuit, the output terminal of the operational amplifier 32 receives the input of the positive input terminal. VDD is output regardless of the potential. The potential of the positive input terminal is set to VD by the operation of the Nch transistor Vth addition transistor 35.
A potential higher than minus Vth with respect to D is not input.

At this time, none of the transistors constituting the operational amplifier 32 are turned off.

The output potential of the operational amplifier 32, that is, VD
D is completely turned on, and the potential of the regulator output terminal 132 is changed to VS.
S. Further, a potential obtained by offsetting the potential of the regulator output terminal 132 by the potential of the Nch transistor by the operation of the NchVth adding Nch transistor 35 is applied to the positive input terminal of the operational amplifier 32.

This is a steady state from time 5 msec to before 10 msec, and when there is no load, the transition of the state is completed within a short time within 1 μsec.

Further, at time 10 msec, the potential of the output voltage switching terminal 131 is set to VSS.

Contrary to when the output voltage is switched to VSS, the output of the reference circuit 31 and the output voltage switching Nch transistor 37 connected to the negative input terminal of the operational amplifier 32 are turned off, and at the same time, the reference power supply is switched on and off. The transistor 38 is turned on, and the output of the reference potential starts. Since only the gate of another transistor is connected to the output of the reference circuit 21, a long time is not required until the reference potential is stabilized, and the reference potential is stabilized within 100 μsec at most.

As the output of the reference circuit 31 changes from VSS to −0.4 V, the output potential of the operational amplifier 32 changes toward VSS. In addition, the resistance between the source and the drain of the output drive transistor 33 receiving the gate increases, and as a result, the potential of the positive input terminal of the operational amplifier 32 also increases. From this operation, the potential of the regulator output terminal 132 changes from VSS to the regulated voltage without the output of the operational amplifier 32 rapidly approaching VSS.

That is, as shown in FIG. 6, no overshoot occurs in the change in the regulator output voltage. In addition, since there is no point in the circuit where the impedance becomes high when the voltage is switched, the voltage change is performed promptly, and the switching of the regulator output voltage is completed at the same time when the reference potential is stabilized, that is, approximately 100 μsec after time 10 msec.

The regulator circuit of the present invention capable of switching the output voltage between the power supply voltage and the regulated voltage does not cause overshoot when the output voltage changes as described above.
The voltage change is completed in a short time. This is effective for a clock oscillation circuit or the like that needs to be operated with the power supply voltage at the time of starting the circuit and then switched to the regulated voltage operation later.

[0062]

According to the regulator circuit of the present invention described above, an operational operational amplifier having means for switching an output voltage between a regulated voltage based on a reference voltage generated by a reference circuit and a power supply voltage is provided. The switching means selects an output of the reference circuit and a power supply voltage by an output voltage switching signal and supplies the selected power supply voltage to the input of the operation type operational amplifier, so that when the output voltage changes, the system operates with the regulator output. It is possible to complete the voltage change in a short time without causing an overshoot which has an adverse effect.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a typical configuration of a regulator circuit of the present invention.

FIG. 2 is a configuration diagram showing a configuration of a conventional regulator circuit.

FIG. 3 is a timing chart at the time of switching an output voltage of a conventional regulator circuit.

FIG. 4 is a circuit diagram showing an internal circuit of an operational amplifier used in a regulator circuit.

FIG. 5 is a configuration diagram showing an embodiment of a regulator circuit of the present invention.

FIG. 6 shows an embodiment of the regulator circuit of the present invention.
5 is a timing chart showing a potential change.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 voltage reference circuit 2 operational amplifier circuit 3 output drive transistor 5 addition N-channel transistor 6 pull-up resistor circuit 7 switch circuit 101 output voltage switching terminal 102 regulator output terminal

Claims (1)

[Claims] 1. A regulator circuit using an operational operational amplifier having switching means for switching an output voltage between a regulated voltage based on a reference voltage generated by a reference circuit and a power supply voltage, wherein the switching means comprises an output voltage. A regulator circuit wherein an output of the reference circuit and a power supply voltage are selected by a switching signal and supplied to an input of the operation type operational amplifier.