JP2000077556A - Ball grid array semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To flip-chip mount a pellet-like semiconductor chip with high connecting reliability at low cost by optimizing the arrangement of ball electrodes. SOLUTION: This ball grid array semiconductor device comprises a semiconductor chip 1 having a plurality of bonding pads, and a circuit wiring board 2 with the semiconductor chip mounted at a flip-chip on its major surface through bump electrodes 8 and pads for ball electrodes 4 placed on its underside. The pads for ball electrodes 4 are placed in regions on the underside, other than those corresponding to the region on the major surface where the bump electrodes 8 are placed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array (hereinafter referred to as "necessary") for a circuit wiring board in which a semiconductor chip is flip-chip mounted on a main surface and ball electrode pads are arranged in an array on the entire back surface. BG according to
Abbreviated as A-Ball Grid Array-. The present invention relates to a ball grid array type semiconductor device having improved reliability of mounting connection.

[0002]

2. Description of the Related Art In recent years, as semiconductor devices become more highly integrated, there is a demand for higher density in semiconductor packaging technology. Typical examples of the high density of the semiconductor mounting technology include a wire bonding technology and a TAB technology, and the flip-chip mounting technology is the highest density semiconductor mounting technology. It is widely used as a technology for mounting at a high density. As shown in FIG. 20A, this flip chip mounting technique has been a generally known technique since it was disclosed in US Pat. No. 3,401,126 and US Pat. No. 3,429,040. In FIG. 1, a semiconductor chip 1 is joined to a circuit wiring board 7 constituting an electronic circuit device by bump electrodes 8 and sealed by a sealing resin 3. Reference numeral 21 denotes a bonding pad, 22 denotes a barrier metal, 23 denotes a semiconductor chip connection terminal, 24 denotes a solder resist, and 25 denotes a passivation film.

On the other hand, a semiconductor package is a recent I / O.
In a QFP (Quad Flat Package) structure, the OLB pitch with respect to the circuit wiring board becomes narrower with an increase in the number of pins, and it has been difficult to connect to the circuit wiring board. Therefore, the document "Electr
OMPAC (Over Molded Pad Array Carrier), as described in “onic Packaging and Production, p25, May 1992”.
Proposals have also been made to enable connection of a circuit wiring board by making the connection. The outline of the OMPAC package is P
OMPAC has used BGA (Ball Grid Arr) to date, with a structure that uses solder ball electrodes for connection to circuit wiring boards instead of GA (Pin Grid Array) package insertion pins.
ay) Known as a package, and as a mainstream technology of high-density packaging technology, many proposals have been made to improve the connection reliability.

Since the BGA has a structure in which a BGA carrier board on which a semiconductor chip is mounted is connected to a circuit wiring board on which the BGA is mounted by ball electrodes, reliability is reduced due to stress distortion generated by flip chip mounting. In addition to the problem that the thermal expansion coefficient decreases, the thermal expansion coefficient of the BGA circuit wiring board differs from the thermal expansion coefficient of the circuit wiring board on which the BGA is mounted. The stress strain generated in the ball electrode causes fatigue failure of the ball electrode,
This would reduce the connection reliability life of the BGA package. Since the BGA connected to the circuit wiring board using the ball electrode has basically the same connection structure as the flip-chip mounting technology, the mounting connection reliability of the BGA reduces the maximum shear stress strain concentrated on the ball electrode portion. IBM Jour
nal of Research Development, Vol. 13, p251, 1969, and can be improved by a method equivalent to the flip-chip mounting method.

Further, as a method for improving the connection reliability of the BGA, the following proposal has been made. In Japanese Patent Application Laid-Open No. 2-109358, mounting reliability is improved by providing protrusions at four corners of a carrier substrate and making the ball connection portions concave, so that the protrusions are in contact with surfaces other than the recesses. Also, in Japanese Patent Application Laid-Open No. 3-16838, when a semiconductor chip is flip-chip mounted, solders having different melting points are used for ball electrodes, including ball electrodes of package balls, and high melting point solder is used for dummy electrodes. I have. Further, Japanese Patent Application Laid-Open No. Sho 63-12142 discloses that a ball electrode is formed by controlling the distance between a BGA circuit wiring board and a circuit board on which a BGA is mounted in order to improve ball connection reliability. , Drum-shaped and so on. In particular, Japanese Patent Application Laid-Open No. H8-153832 discloses that a sealing resin is disposed in a gap between balls.
In the method shown in (b), the thermal expansion coefficient of the sealing resin is set to B
It has been proposed to change the output stepwise from the GA substrate side toward the circuit wiring substrate side. Since these proposals are basically equivalent to the means for alleviating the stress strain that improves the bump connection reliability in flip chip mounting technology, the connection reliability of the BGA can be improved to some extent. . In the figure, a semiconductor chip 1 is joined to a BGA circuit wiring board 2 by bump electrodes 8, and this board 2 is joined to a circuit wiring board 7 constituting an electronic circuit device by ball electrodes 4.

However, as the size of a semiconductor chip mounted on a BGA becomes larger, for example, as in a recent RISC chip, the BGA packaging structure using the conventional method has a BGA connection that guarantees connection reliability of electronic devices. There has been a problem that the reliability cannot be sufficiently secured. Specifically, as the size of the semiconductor chip 1 mounted on the BGA becomes larger, the BGA mounting the semiconductor chip becomes larger.
The size of the substrate 2 is also increased, and the stress strain generated on the ball electrode 4 disposed on the back surface of the BGA substrate 2 is increased as compared with the conventional BGA mounting structure. The stress strain in the semiconductor chip 1
The stress strain is locally generated on the bump electrode 8 on the side, and the bump electrode connecting the semiconductor chip and the BGA circuit wiring board is destroyed. The bump electrode destruction due to the local new stress strain is different from the stress destruction at the bump electrode located at the maximum distance from the center of the semiconductor chip so far, and the semiconductor chips are connected as shown in FIG. Particularly noticeable near the outermost bump electrode,
When a BGA substrate that directly transmits the influence of local stress strain is used for the purpose of thinning in recent years, the stress strain increases, and there is a problem in guaranteeing the reliability of the electronic circuit device. Was.

On the other hand, recent electronic devices have realized a high-performance system by mounting various types of semiconductor chips.
As described above, the flip-chip mounting technology can be used as the highest-density semiconductor mounting technology. However, in order to perform flip-chip mounting, it is necessary to form bumps on a semiconductor chip. Conventional bump electrode forming methods include U.S. Pat. No. 3,410,774 and U.S. Pat.
No. 58295, and IBM Journal of Research a
nd Development, pp. 226-229, May 1969, JP-A-58-225652, JP-A-1-13.
It has been common practice to use the electroplating method described in US Pat. In the bump electrode forming method using these methods, the bump electrodes are formed on the wafer on which the semiconductor devices are formed, so that the cost of the semiconductor chip can be reduced.

However, the method of forming bumps in a lump according to the state of a wafer as described above has a problem that bumps cannot be easily formed on a semiconductor chip in a pellet state which is divided and diced from a semiconductor wafer. This problem of not being able to form bump electrodes is a particularly serious problem when flip chip mounting is used for commercial bare chips in the form of pellets because various types of semiconductor chips are mounted on electronic devices for the purpose of enhancing the functionality of the system. I was Since the serious problem of forming a bump on a semiconductor chip in a pellet state is not limited to flip chip mounting in recent years but also in performing TAB mounting in the past, bump formation is performed on a semiconductor chip in a pellet state. Many proposals have been made. For example, in Proceeding ISHM 1994, pp. 437-478, 1994, an Au bump is formed on a bare chip by a wire bumping method using a wire bonding apparatus. Proceedi
ng ECTC 1991, pp26-29, 1991 and Proceeding ECTC 19
90, pp412-417, 1990, bump electrodes are formed by electroless plating using a passivation film of a semiconductor chip as a mask. In Proceeding ISHM pp. 45-49, 1989, bump electrodes formed on a bump forming substrate are transferred to a semiconductor chip. In addition, Proceeding ECTC 1992, pp487-49
In 1,1992, a bare chip is flip-chip mounted without forming a bump electrode using an anisotropic conductive adhesive.

However, in the method of forming bumps by the wire bumping method described above, when mounting a semiconductor chip in which the number of I / Os is increasing in recent years, the number of bumps to be formed also increases, so that the bump formation time becomes longer and the bump manufacturing cost increases. Will increase. Also, in the method of forming bumps by electroless plating, since the metal film isotropically bends on the bonding pads, there is a problem that the connection reliability is limited in securing a sufficient bump height. Was. Furthermore, in the method of transferring the bump electrode formed on the bump substrate to the semiconductor chip, the manufacturing cost of the bump formed substrate and the process cost of transferring the formed bump electrode to the semiconductor chip overlap,
There has been a problem that the manufacturing cost as flip-chip mounting increases. Also, in the flip-chip mounting method using an anisotropic conductive adhesive without forming a bump electrode, the multi-pin fine I / O due to the limit of fine connection of the anisotropic conductive adhesive.
There is a problem that cannot be applied to the semiconductor chip.

[0010] In addition, in the case where flip-chip mounting is performed by forming bumps using the above-described method, any of the methods is compared with the case where flip-chip mounting is performed using a general vapor deposition method or electroplating method. As a result, there is a problem that the bump share strength cannot be secured to a sufficient value. In recent years, in flip-chip mounting for a large-sized semiconductor chip, stress distortion caused by a difference in a thermal expansion coefficient between the semiconductor chip and a circuit wiring board is caused. Therefore, there is a problem in bump connection reliability. further,
In order to improve the mounting reliability of electronic devices, KGD (Know
n Good Die) is indispensable, and general KGD can be performed in a wafer state before dicing. However, for semiconductor chips in a pellet state, KGD is difficult with current technology. Therefore,
KGD is difficult even for a bare chip in which bumps are formed as a post-process on a semiconductor chip in a pellet state, which has been a problem in realizing a highly reliable electronic circuit device.

As a method for solving the above many problems, as shown in FIG. 20D, a tape BGA (T) in which the solder balls 4 are arranged on the back surface of the TAB tape 35 via the ball forming terminals 12 is used. -BGA) has been proposed.
In the figure, reference numeral 32 denotes a cover plate, 33 denotes a stiffener, and 34 denotes a TAB inner lead. However,
In this T-BGA, since the solder balls 4 are arranged around the semiconductor chip 1 using a TAB tape, the BGA package size becomes extremely large as compared with the size of the semiconductor chip 1, so that electronic equipment can be used. There was a problem that miniaturization was not possible. For this reason, as a CSP (Chip Scale Package), ball electrodes are arranged in the same size as a semiconductor chip to reduce the size. For example, Electronic Package Production pp.4
On the other hand, μ-BGA disclosed in 9-53, January 1998, has been proposed, but it can solve the above-mentioned problem that occurs when flip-chip mounting a semiconductor chip in a diced pellet state inside a package Was not.

[0012]

In the above-described flip-chip mounting, there is a problem that stress strain caused by mismatch of thermal expansion coefficients is concentrated on the bump electrode and the bump electrode is destroyed. For this reason, many methods have been proposed to alleviate the maximum shear strain generated in the semiconductor chip, and the connection reliability can be sufficiently improved to some extent. Similarly to the case of the flip-chip mounting technology, when connecting a BGA connected by a ball electrode to a circuit wiring board, it is necessary to improve the ball connection reliability and sufficiently secure the mounting reliability of the electronic circuit device. . For this reason, the ball maximum shear strain has been alleviated by a method similar to flip chip mounting. By using these methods, the connection reliability of the BGA can be improved to a certain extent. However, recently, the size of the semiconductor chip mounted on the BGA is large, as represented by a RISC chip. However, there has been a problem that ball connection reliability cannot be sufficiently ensured by the conventional methods.
The problem is that as the size of the semiconductor chip increases, the stress strain in the BGA ball electrode increases compared to the conventional structure, and the bump electrode located on the semiconductor chip side differs locally from the bump stress strain located at the maximum distance of the semiconductor chip. As a result, a large amount of stress strain is generated, and bump electrode destruction occurs particularly near the outermost bump electrode of the semiconductor chip.

On the other hand, as a method for forming bump electrodes necessary for realizing flip-chip mounting, a vapor deposition method, an electroplating method, and the like have been generally used until now. When flip chip mounting is performed on a commercially available bare chip in the form of a pellet, the semiconductor chip is in a pellet state, and there has been a problem that bumps cannot be formed on the semiconductor chip by the conventional method. Therefore, wire bumping method, electroless plating method,
A transfer bump method, a method using an anisotropic conductive adhesive, and the like have been devised, and the effects thereof have been exhibited to some extent for TAB mounting and the like. However, I / O
The use of conventional methods for recent semiconductor chips, in which the pad pitch is becoming finer and the semiconductor chip size is increasing with the increase in the number of semiconductor chips, increases the mounting cost and connection with the limitations of fine connection technology. The reliability has been remarkably reduced, and this method is problematic in practical use. Furthermore, in the above-described methods, since the bump share strength cannot be secured as compared with the conventional vapor deposition method and the electroplating method, the bump stress strain due to the difference in the thermal expansion coefficient cannot be sufficiently reduced, There has been a problem that sufficient bump connection reliability cannot be ensured. Furthermore, when bumps are formed as a post-process on a semiconductor chip divided into pellets,
Although it is necessary to perform KGD in order to guarantee the reliability of electronic devices, it has been a problem that it is technically difficult to perform KGD on a semiconductor chip in a pellet state. In particular, T-BGA, CS as a recent advanced package
Although P and μ-BGA have been proposed, none of them can solve the above problems.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a ball electrode pad disposed on the back surface of a BGA semiconductor device having a semiconductor chip mounted on a main surface of a circuit wiring board is provided with a bump electrode. It is an object of the present invention to realize a BGA type semiconductor device capable of flip-chip mounting a semiconductor chip in a pellet state with high connection reliability and low cost by being optimally arranged in an area other than the area where the semiconductor chip is arranged.

[0015]

According to a first aspect of the present invention, there is provided a ball grid array type semiconductor device comprising: a semiconductor chip having a plurality of bonding pads; And a circuit wiring board on which flip-chip mounting and ball electrode pads are arranged on the back surface.
The ball electrode pad is arranged in a region other than the rear surface region corresponding to the region where the bump electrode is arranged on the main surface. A ball grid array type semiconductor device according to claim 2 is the device according to claim 1, wherein the circuit wiring board has an outer size larger than an outer shape of the semiconductor chip, and the bump electrode is formed with the semiconductor chip. The pad for the ball electrode is provided in a predetermined arrangement between the main surface of the circuit wiring substrate and the pad for the ball electrode other than the region on the back surface of the circuit wiring substrate corresponding to the region of the main surface on which the bump electrode is disposed. Are arranged in the region of (1). In addition, the ball grid array type semiconductor device according to claim 3 is claim 1.
Wherein the bump electrodes are provided in a predetermined arrangement between the semiconductor chip and the main surface of the circuit wiring board, and the pad for the ball electrode is such that the bump electrodes are arranged on the main surface. Are arranged in an array inside the region on the back surface corresponding to the region in which it is located. According to a fourth aspect of the present invention, in the ball grid array type semiconductor device according to the first aspect, the circuit wiring board has an outer dimension smaller than an outer dimension of the semiconductor chip, and the bump electrode is connected to the semiconductor chip. A predetermined arrangement is provided between the main surface of the circuit wiring board and the pad for the ball electrode. The pad for the ball electrode is arranged in a region other than the region on the back surface side of the substrate corresponding to the region where the bump electrode is arranged. It is characterized by having. In the second to fourth aspects of the present invention, the predetermined arrangement where the bump electrodes are provided is preferably an arrangement along the periphery of the semiconductor chip.
Various arrangements such as a staggered arrangement can be considered. Further, in a ball grid array type semiconductor device in which the outer dimensions of the BGA circuit wiring board are smaller than the outer dimensions of the semiconductor chip, bump electrodes are arranged at predetermined positions between the semiconductor chip and the main surface of the BGA circuit wiring board. Then, the pads for the ball electrodes may be provided in an array in a region inside the region on the back surface corresponding to the region where the bump electrodes are arranged on the main surface of the BGA circuit wiring board. In the case of such a configuration, the BGA smaller than the semiconductor chip is formed by the sealing resin.
Since the BGA type semiconductor device is sealed so as to surround the circuit wiring board, the size and mounting area of the BGA type semiconductor device can be reduced.

A semiconductor chip having at least a plurality of bonding pads is flip-chip mounted on the main surface of the circuit wiring board by bump electrodes, and ball electrodes are arranged in an array on the back surface of the circuit wiring substrate. A ball grid array type semiconductor device includes a step of forming a circuit wiring board having a region where a ball electrode is not arranged on a virtual line of a bump electrode connecting a semiconductor chip and the circuit wiring board; At least one method of heating or vibrating by positioning a pointed jig having at least one of a heating mechanism and a vibrating mechanism in a region where a ball electrode is not arranged on a back surface of a circuit wiring board. Connecting the semiconductor chip to the circuit wiring board using It may be elephants. In the ball grid array type semiconductor device manufactured by the manufacturing method as described above, the forbidden region where the ball electrode is not arranged has at least an area larger than the diameter of the bump connecting the semiconductor chip, and the pointed jig is adjacent to the forbidden region. It has an area or more that does not contact the ball electrode.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings. First, a configuration of a semiconductor device according to a first embodiment of the present invention and a method of manufacturing the semiconductor device will be described with reference to FIGS. In FIG. 1, a semiconductor device has a semiconductor chip 1 having a plurality of bonding pads on a lower surface side in the figure, and the semiconductor chip 1 is flip-chip mounted on a main surface (an upper surface in the figure) by bump electrodes 8 and a back surface. (A lower surface in the figure) and a BGA circuit wiring board 2 on which ball electrode pads (not shown in FIG. 1) are arranged. In this semiconductor device, the bonding surface between the semiconductor chip 1 and the substrate 2 is sealed with a sealing resin 3, and the circuit wiring board 2 is formed of a ball formed by solder which is welded to the pad (not shown). It is fixed to a circuit device substrate 7 such as a motherboard by the electrodes 4.

In the circuit wiring board 2, as shown in FIG. 3, the pads for the ball electrodes 4 are provided on the main surface other than the region on the back surface corresponding to the region 5 where the bump electrodes 8 are arranged. Area, and this configuration is the first
This is a characteristic of the semiconductor device according to the embodiment. FIGS. 2 (a), 2 (b), 2 (c), 3 (d) and FIGS. 3 (a), 3 (b), 3 (c) and 3 (d) show a method of manufacturing the semiconductor device according to the first embodiment having such features.
This will be described with reference to (e), (f), and (g).

First, in FIG. 2A, a semiconductor chip 1 is manufactured which is passivated by PSG (phosphorus silica glass) and SiN (silicon nitride) except for a bonding pad portion and diced into a pellet state. In addition, this semiconductor chip 1 is, from the gist of the present invention,
Generally, a commercially available pellet-shaped semiconductor chip may be used, and the manufacturing method thereof is not limited at all. However, in the first embodiment, the above-described semiconductor chip is used. In this semiconductor chip 1, 256 bonding pads 21 of 100 μm are arranged along the periphery of the semiconductor chip 1 at a position 2 mm inside from the edge of the semiconductor chip 1. The semiconductor chip 1 is 10 mm × 10 mm
Having the following dimensions were used. On the other hand, as shown in FIG. 2B, for a BGA circuit wiring board 2 on which a semiconductor chip 1 is mounted, an insulating layer and a conductor layer are mutually built up on, for example, US Pat. No. 4,811,082 or a normal glass epoxy board. Printed circuit board SLC (Surface Laminar
Circuit) substrate can be used. Therefore, it is possible to use a known flexible substrate having a copper wiring formed on its surface using, for example, a polyimide resin as a main material of the substrate.

On the surface of the BGA circuit wiring board 2, an Au bump 8 having a diameter of 100 μm for connecting the semiconductor chip 1 is provided via a semiconductor connection terminal 23 formed on a solder resist 24. The method for producing the Au bump 8 is not particularly limited, but is described in, for example, JP-A-62-125650, JP-A-59-181577, and JP-A-63-1.
As disclosed in JP-A-60250, a known technique such as a vapor deposition method or an electroplating method can be used. The material of the bump electrode 8 is not limited to Au.
Metals selected from u, W, Cu, Ni, Cr, Pt, and Pd and alloys containing these metals as main components may be used. For the sake of explanation, Au bumps are used in the first embodiment. 256 Au bumps are formed at positions corresponding to the bonding pads of the semiconductor chip. Further, a Ni / Ti barrier metal is formed on the Au bump 8, and the height is controlled to an accuracy of 50 μm ± 2 μm.

Further, the back surface of the BGA circuit wiring board has N
i / Cu ball connection terminal 12 is 200 μm
256 are arranged in an array with mφ. This BGA
The ball connection terminals 12 arranged on the back surface of the circuit wiring board are not arranged on the virtual lines of the bump electrodes on the main surface of the circuit wiring board connecting the semiconductor chip 1. Specifically, 15mm
1 in a circuit wiring board with external dimensions of × 15 mm
The arrangement prohibited area of the ball electrode 12 is ± 100 μm or more from the area of the same size as the semiconductor chip 1 of 0 mm × 10 mm and 2 mm of the inner part as a center. The method of manufacturing the solder ball is not particularly limited, but, for example, a screen printing of a solder paste is performed on an electrode terminal provided on the back surface of the circuit wiring board using a metal mask for screen printing, so that Can be formed by reflowing. This solder paste contains
Using a eutectic solder paste of Pb / Sn = 37/63,
It is preferable to wash the BGA circuit wiring board with isopropyl alcohol for 10 minutes after the solder reflow. In addition,
The circuit wiring board 2 having the external dimensions of 15 mm × 15 mm used in the first embodiment has the solder resist 24 having the front and rear surfaces except for a bump connection portion having the same dimensions as the semiconductor chip having the external dimensions of 10 mm × 10 mm. Is coated. The BGA semiconductor device is manufactured by mounting the semiconductor chip having the above configuration on a circuit wiring board. The manufacturing method is as follows.

First, as shown in FIG. 2 (c), a bonding pad of a semiconductor chip and a bump electrode on a circuit wiring board are formed using a flip chip bonder having a half mirror, which is a known technique and performing alignment. Perform alignment. The semiconductor chip 1 is a collet 1 having a heating mechanism.
3 and preheated in a nitrogen atmosphere at 350 ° C. Next, as shown in FIG. 2D, in a state where the semiconductor chip and the circuit wiring board are in contact with each other, the heat tool 14 corresponding to the bonding pad 21 of the semiconductor chip 1 is heated to 350.degree. contacting the rear surface, while applying 2kg / mm ² ~5kg / mm ² pressure for 5 seconds, it connects the Au bumps of the circuit wiring board 2 and electrically and mechanically Al bonding pads of the semiconductor chip 1. Note that these connection conditions described in the first embodiment are known, and the pressure range, connection time, and the like for connecting the semiconductor chip on the circuit wiring board are not particularly limited. Thus, a BGA semiconductor device as shown in FIG. 3E is formed.

The shape of the heat tool for connecting a semiconductor chip described in the first embodiment is not particularly limited. For example, as long as the shape of the heat tool is such that the BGA ball can be inserted into the position prohibition area, 256 pieces may have independent convex shapes as shown in FIG.
As shown in (b), it may have a continuous shape corresponding to the bonding pad 14. In the first embodiment, 256 heat tools having independent convex shapes are used for convenience of explanation. The tip dimension is BGA
The diameter is 150 μmφ, which is smaller than the ball 4 placement prohibited area and larger than the bump diameter. As described above, the size of the gap formed between the semiconductor chip flip-chip mounted on the BGA circuit wiring board and the circuit wiring board has a bump height of 50 μm.
48 μm with dimensions 2 μm smaller on average than ± 2 μm
± 2 μm.

As shown in FIG. 3 (f), if necessary, a sealing resin 3, which is a known technique, can be disposed in this gap. As a resin to be sealed, for example, bisphenol-based epoxy, imidazole curing catalyst, acid anhydride curing agent and spherical quartz filler are mixed at a weight ratio of 45.
An epoxy resin containing wt% can be used. Further, for example, 100 parts by weight of a cresol novolac type epoxy resin (ECON-195XL; manufactured by Sumitomo Chemical Co., Ltd.), 54 parts by weight of a phenol resin as a curing agent, 100 parts by weight of fused silica as a filler, and benzyldimethylamine agent 3 as a catalyst It is also possible to use an epoxy resin melt obtained by pulverizing, mixing and melting parts by weight, and the material is not limited. By the above method, a BGA semiconductor device in which a semiconductor chip is flip-chip mounted on a BGA circuit wiring board and an epoxy resin is sealed in a gap portion as shown in FIG. 4 can be realized.

At this time, the solder balls formed on the back surface of the BGA are ± 100 μm around a virtual line of a bump electrode connecting the semiconductor chip to be mounted and the BGA circuit wiring board.
The layout is not arranged within the range of m. Specifically, A for connecting the semiconductor chip at this time is
The u-bump electrode layout is arranged 2 mm inside from the edge portion of the semiconductor chip, and the ball electrodes of the BGA semiconductor device also have a ball electrode arrangement prohibited area 2 mm inside from the end of the BGA circuit wiring board. Further, the bump diameter W and the ball electrode arrangement prohibition region width L are:
As shown in FIG. 4, a relationship of W <L is established.

Next, as shown in FIG. 3 (g), the BGA semiconductor device is mounted on the circuit wiring board 7 constituting the electronic circuit device. The BGA circuit wiring board 7 constituting this electronic circuit device is not particularly limited, but in the first embodiment, for convenience of explanation, the same SL as the BGA circuit wiring board is used.
A C substrate was used. The BGA mounting at this time also uses a bonder having a half mirror and performing alignment. In addition,
The heater under the circuit wiring board and the collet holding the BGA are heated to 180 ° C., but this temperature is lower than the eutectic temperature of the solder constituting the ball electrode, so that the BGA solder ball electrode 4 is not melted. . Further, the BGA ball electrode and the electrode terminal of the circuit wiring board of the electronic circuit device are aligned. As described above, the collet is further moved downward while the BGA and the circuit wiring board are in contact with each other, and the pressure is reduced to three.
0 kg / mm ² is applied, and the ball electrodes are brought into contact with the electrode terminals of the circuit wiring board on which the BGA is mounted under mechanical pressure. Further, in this state, the temperature is raised to 250 ° C. to melt the solder, and the electrode terminals of the circuit wiring board on which the BGA is mounted and the BGA ball electrodes are connected. At this time, the solder composition used for the BGA ball electrode is Pb / S
Since n = 37/63 eutectic solder, connecting the semiconductor chip in BGA mounting does not cause the Au bump to be melted and deformed.
A GA can be mounted. By performing the above steps, the semiconductor device illustrated in FIG. 1 can be realized.

Next, when the connection reliability of the semiconductor device according to the present invention was evaluated, the following results were obtained. 10 used for describing the first embodiment of the semiconductor device according to the present invention.
15mm × 15m semiconductor chip with dimensions of 10mm × 10mm
It is a result of evaluating connection reliability using a sample when mounted on a circuit wiring board having an m dimension. The case where the connection was opened at even one of the 256 pins was regarded as defective, and the vertical axis represents the cumulative failure rate and the horizontal axis represents the temperature cycle.
The number of samples is 1000, and the temperature cycle test conditions are
55 ° C (30min)-25 ° C (5min)-125 ° C
(30 min) to 25 ° C. (5 min)}. The test results are shown in FIG. In a conventional structure in which a ball electrode of a BGA type semiconductor device is arranged on a virtual line formed by a bump electrode connecting a semiconductor chip and a circuit wiring board, 1500
The connection failure occurred in the cycle, and the connection failure became 100% in 2500 cycles. When a BGA having a conventional structure is mounted on a BGA-mounted circuit wiring board and a semiconductor chip portion is sealed with a resin by a known method, connection failure does not occur up to 2500 cycles and connection reliability is improved. A connection failure of 50% occurs in 3000 cycles. These connection failures were destruction due to stress distortion of the bump electrodes connecting the semiconductor chip and the circuit wiring board. Therefore, in the conventional structure in which the ball electrode is arranged on the virtual line formed by the bump electrode, stress distortion can be reduced to some extent by sealing the semiconductor chip with resin.
This suggests that the local stress strain applied to the bump electrode by the stress strain inherent in the ball electrode cannot be reduced.

However, in the BGA using the ball arrangement in the structure according to the first embodiment of the present invention, it was confirmed that no connection failure occurred up to 3500 cycles, and the connection reliability was extremely improved. This is because the structure in the case where the semiconductor chip is not sealed by the method of arranging ball electrodes according to the present invention has the same connection reliability as the case where the semiconductor chip is sealed by the conventional method of arranging ball electrodes. It can be seen that the reliability has been significantly improved. FIG. 7 is a result showing a distribution of bump stress-strain of a semiconductor chip when the BGA type semiconductor device according to the first embodiment of the present invention is mounted on a BGA-mounted circuit wiring board constituting an electronic circuit device. The shape of the sample is as described in the method of manufacturing the semiconductor device in the first embodiment, and is the same as that used in the connection reliability test shown in FIG. As a comparative example, a bump stress distortion in a BGA semiconductor device having a conventional structure having no prohibited area for ball electrode arrangement is also shown. In order to clarify the value of the bump stress strain, a sample without resin sealing was used. As is clear from the graph, in the conventional structure in which the ball electrode of the BGA type semiconductor device is arranged on an imaginary line created by the bump electrode of the semiconductor chip, local stress strain occurs in the bump electrode due to the stress strain inherent in the ball electrode. It can be seen that the overall bump stress strain tends to be amplified. This is presumably because the stress strain in the ball electrode is transmitted to the bump electrode connecting the semiconductor chip through the BGA circuit wiring board.

However, no amplification effect of stress strain was measured on the bump electrode on the semiconductor chip mounted on the BGA type semiconductor device using the ball electrode arrangement structure according to the first embodiment of the present invention, and the effect was measured from the center of the semiconductor chip. It can be seen that the bumps have a gradual uniform increase in the direction of the maximum distance of the bumps. This is because the bump electrodes of the semiconductor chip are arranged to avoid the stress distortion transmitted from the BGA ball electrodes toward the BGA circuit wiring board. It is thought to be. Furthermore, the stress strain in this evaluation does not depend on the coefficient of thermal expansion of the circuit wiring board on which the semiconductor chip is mounted, and the smaller the circuit wiring board thickness, the smaller the stress strain value. The tendency to determine the stress-strain value was also confirmed in this evaluation. FIG. 8A is a graph showing the effect of the area of the BGA ball placement prohibited area on the bump stress strain. As the ball placement prohibited area effect, the vertical axis represents the bump stress distortion when (bump diameter / ball placement prohibited area) is plotted on the horizontal axis. As is clear from the graph, the bump stress strain shows a rapid change from (bump diameter / ball arrangement prohibited area) = 1. From this result, when the ball placement prohibited area is equal to or larger than the bump diameter (bump diameter / ball electrode placement prohibited area) <1, the stress distortion amplified by the bump electrode is extremely small, and the connection reliability of the semiconductor chip is significantly improved. I understand. Therefore, according to the first embodiment of the present invention, not only the connection reliability of the BGA semiconductor device is remarkably improved, but also a bare chip in a pellet state, which has been difficult until now, can be flip-chip mounted.
It was confirmed that a semiconductor device can be manufactured at low cost.

Next, a ball grid array semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. The semiconductor device according to the second embodiment differs from the semiconductor device according to the first embodiment in that the dimensions of the BGA circuit board 2 with respect to the semiconductor chip 1 are different. As shown in FIGS. 9A and 9B, the semiconductor chip 1 has a size of 10 mm × 10 mm as in the first embodiment, but the BGA circuit wiring board 2 on which the semiconductor chip 1 is mounted is mounted. Dimension is 11mm slightly larger than chip 1
× 11 mm. Other configurations are the same as those of the semiconductor device according to the first embodiment, and FIG.
(D) and the method of manufacturing the BGA type semiconductor device according to the second embodiment shown in FIGS. 11 (e) to (g) are also described using the semiconductor device according to the first embodiment described with reference to FIGS. Since the manufacturing method is the same as that of the manufacturing method, repeated description is omitted.

FIG. 13 shows a semiconductor chip having a size of 10 mm × 10 mm used for explaining a ball grid array type semiconductor device according to a second embodiment of the present invention.
It is a result of evaluating connection reliability using a sample when mounted on a circuit wiring board having a size of 11 mm. The case where the connection was opened at even one of the 256 pins was regarded as defective, and the vertical axis represents the cumulative failure rate and the horizontal axis represents the temperature cycle. The number of samples is 1000, and the temperature cycle test conditions are ｛-55 ° C (30 min) to 25 ° C (5 min) to 12
The test was performed at 5 ° C. (30 min) to 25 ° C. (5 min). First, test results will be described with reference to FIG. The BG is formed on the virtual line formed by the bump electrode 8 connecting the semiconductor chip 1 and the circuit wiring board 2 and in the outer region formed by the virtual line.
In the prior art structure in which the ball electrodes of the A-type semiconductor device are arranged, a connection failure occurs in 1500 cycles, and 200
In 0 cycles, the connection failure became 100%. This connection failure was mainly caused by connection failure of the Au bump electrode connecting the semiconductor chip and the BGA circuit wiring board. When a BGA having a conventional structure is mounted on a BGA-mounted circuit wiring board and a semiconductor chip portion is sealed with a resin by a known method, connection failure does not occur up to 2500 cycles and connection reliability is improved. 50% connection failure occurs in 3000 cycles. These connection failures correspond to electrode destruction due to stress and strain of the ball electrode located at the maximum distance from the BGA center position and to a different ball electrode position in the bump electrode connecting the semiconductor chip and the circuit wiring board. Destruction was caused by stress distortion of the bump electrode. Therefore, in the conventional structure in which ball electrodes are arranged on virtual lines formed by bump electrodes, stress distortion can be reduced to some extent by sealing the semiconductor chip with resin.
This suggests that the stress strain of the ball electrode located at the maximum distance from the center position and the local stress strain given to the bump electrode by the stress strain inherent in the ball electrode cannot be reduced. This is because the mounting structure in the case where the semiconductor chip is not resin-sealed by the ball electrode arrangement method according to the present invention does not cause a connection failure until 3000 cycles, and the ball electrode in the area outside the virtual bump line among the ball electrodes according to the present invention. Comparing the fact that the structure changed only when the electrodes are arranged causes connection failure in 2500 cycles, it is clear that the stress strain built into the ball electrodes causes the total breakdown of the bump electrodes. However, it was confirmed that the BGA having the structure in which the semiconductor chip was resin-sealed by the ball arrangement method according to the present invention did not cause a connection failure until 3,500 cycles, and the connection reliability was extremely improved. This is the structure when the semiconductor chip is not sealed by the ball electrode arrangement method according to the present invention.
Compared with the result of an experiment in which no connection failure occurs up to 3000 cycles, it can be seen that the connection reliability has been significantly improved.

FIG. 13B is a graph showing the distribution of the bump stress and strain of the semiconductor chip when the BGA type semiconductor device according to the present invention is mounted on a BGA mounting circuit wiring board constituting an electronic circuit device. The shape of the sample is as described in the method for manufacturing a semiconductor device according to the first embodiment,
This is equivalent to the one used in the connection reliability test shown in FIG. As a comparative example, a bump stress distortion in a BGA semiconductor device having a conventional structure having no prohibited area for ball electrode arrangement is also shown. In order to clarify the value of the bump stress strain, a sample not resin-sealed was used. As is clear from the graph, in the conventional structure in which the ball electrode of the BGA type semiconductor device is arranged on a virtual line of the bump electrode of the semiconductor chip, local stress strain occurs in the bump electrode due to the stress strain inherent in the ball electrode. Therefore, the overall bump stress strain tends to be amplified. This is presumably because the stress strain in the ball electrode is transmitted to the bump electrode connecting the semiconductor chip through the BGA circuit wiring board. However, the effect of amplifying stress strain is not measured on the bump electrode on the semiconductor chip mounted on the BGA type semiconductor device using the ball electrode arrangement structure according to the present invention, and the bump electrode gradually decreases from the center of the semiconductor chip toward the direction of the maximum distance of the bump. It can be seen that a uniform increase is shown. It is considered that this is because the bump electrodes of the semiconductor chip are arranged while avoiding the stress distortion transmitted from the BGA ball electrodes toward the BGA circuit wiring board. Furthermore, the bump stress strain transmitted from the ball electrode by this evaluation does not depend on the thermal expansion coefficient of the circuit wiring board on which the semiconductor chip is mounted, and the stress distortion value decreases as the circuit wiring board thickness decreases. This evaluation also confirmed the tendency that the bump stress-strain value was determined only by the wiring board thickness.

Further, the graph shown in FIG. 8 (a) in which the effect of the area of the BGA ball placement prohibited region on the bump stress strain is measured shows the same effect in the second embodiment.
As the ball placement prohibited area effect, the vertical axis represents the bump stress distortion when (bump diameter / ball placement prohibited area) is plotted on the horizontal axis. As is clear from the graph, (bump diameter /
Bump stress strain shows a rapid change from the ball arrangement prohibited area) = 1. From this result, when the ball placement prohibited area is equal to or larger than the bump diameter (bump diameter / ball electrode placement prohibited area) <1, the stress distortion amplified by the bump electrode is extremely small, and the connection reliability of the semiconductor chip is significantly improved. I understand. Further, in the second embodiment,
The stress strain generated in the ball electrode in the area outside the virtual line of the bump electrode in the BGA hole arrangement prohibited area was measured, and the result is shown in FIG. 8B. As the ball electrode arrangement prohibited area effect, (outermost bump distance / maximum ball arrangement distance)
Is plotted on the vertical axis, where the stress on the ball electrode is plotted on the horizontal axis. As is clear from the graph, (the outermost bump distance /
The ball stress / strain shows a rapid change at the boundary of (the ball maximum distance) = 1. From this result, when the ball electrode is not arranged outside the virtual line of the bump (outermost peripheral bump distance / maximum ball arrangement distance) <1, the stress distortion generated in the ball electrode becomes extremely small, and the BGA connection reliability is remarkably improved. I understand. This is probably because the displacement of the BGA circuit wiring board is rate-determined by the semiconductor chip mounted on the BGA circuit wiring board, and no stress distortion occurs in the ball electrodes.

Next, a ball grid array type semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. The semiconductor device according to the third embodiment is the first device.
The semiconductor device according to the second embodiment differs from the semiconductor device according to the second embodiment in that the size of the BGA circuit wiring board 2 is smaller than that of the semiconductor chip 1. The same is true. In addition, FIG.
(D), the method of manufacturing the semiconductor device according to the third embodiment shown in FIGS. 16 (e) to 16 (g) also describes the manufacturing method of the first embodiment in FIGS. Since (e) to (g) are the same, redundant description is omitted. The difference is that the semiconductor chip 1 has a size of 9 mm × 9 mm. On the other hand, on a BGA circuit wiring board on which a semiconductor chip is mounted,
For example, a printed circuit board SLC (Surface Lamina) of a system in which an insulating layer and a conductor layer are mutually built up on U.S. Pat.
rCircuit) substrates can be used. Therefore, it is possible to use a known flexible substrate having a copper wiring formed on the surface using, for example, a polyimide resin as a main material of the substrate. Au formed on the surface of the BGA circuit wiring board
The method of forming the bumps and the like is the same as in the first embodiment, and a description thereof will be omitted.

The solder balls formed on the back surface of the BGA
Although the layout is not arranged within the range of ± 100 μm around the virtual line of the bump electrode connecting the mounted semiconductor chip and the BGA circuit wiring board, the layout is the same as in the first embodiment. The arrangement is slightly different. The Au bump electrode layout is arranged 2 mm inward from the edge of the semiconductor chip and is 1 mm smaller than the semiconductor chip.
9mm x 9mm BGA with 1mm smaller sides
The ball electrodes on the back surface of the circuit wiring board are also arranged in areas except for the area of ± 100 μm centered on the imaginary line of the bump electrode arranged 1 mm inside from the end of the BGA circuit wiring board. Further, the bump diameter W and the width L of the ball electrode disposition prohibition region formed by the virtual bump line have a relation of W <L shown in FIG.

The connection failure that has occurred in the configuration of the prior art is caused by ball electrode destruction caused by a ball electrode stress strain located at a maximum distance from the BGA center position, and ball electrode destruction in a different destruction mode than the conventional one. Bump destruction occurred at a location corresponding to the ball electrode position due to stress strain transmitted to the electrode. Therefore, in the conventional structure in which the ball electrode is arranged on the virtual line formed by the bump electrode in the region outside the virtual line, the bump stress strain can be reduced to some extent by sealing the semiconductor chip with resin, but the maximum from the BGA center position can be reduced. This suggests that stress strain of the ball electrode located at a distance and stress strain inherent in the ball electrode cannot alleviate local stress strain directly applied to the bump electrode. This is one of the components of the present invention.
With a structure in which ball electrodes are not placed on virtual lines of bump electrodes,
A mounting structure (M ₁ <N) when a semiconductor chip is mounted on a conventional BGA circuit wiring board in which the outside dimension (N ₁ ) of the circuit wiring board is larger than the outside dimension (M ₁ ) of the semiconductor chip.
₁ ) does not cause a connection failure up to 2500 cycles, and the outer package size (N1) smaller than the semiconductor chip outer size (M1), which is one of the constituent requirements of the present invention, in the above mounting structure.
When the mounting structure (M ₁ > N ₁ ) in which the semiconductor chip is mounted on the circuit wiring board having ₁ ) does not cause a connection failure until 3000 cycles, the stress strain inherent in the ball electrode is reduced by the bump electrode. It is evident that the connection connection reliability can be improved by adjusting the dimensions of the BGA circuit wiring board to the dimensions of the semiconductor chip.

Further, in the ball arrangement method according to the present invention, B
It has been confirmed that a BGA having a structure in which a semiconductor chip is mounted on a GA circuit wiring board and a gap portion thereof is sealed with a resin does not cause connection failure until 3,500 cycles, and connection reliability is extremely improved. This indicates that the connection reliability of the structure according to the present invention when the semiconductor chip is not sealed is extremely improved, as compared with an experimental result in which no connection failure occurs up to 3000 cycles. The effect of this improvement in reliability is that the sealing resin on the circuit wiring board side has a structure that is shorter than the sealing resin on the semiconductor chip side and has a structure opposite to that of the related art. Since the structure is such that the stress strain in the part can be extremely reduced, the circuit layer wiring layer, which has been generated at the contact end of the BGA circuit wiring board due to the local stress strain of the sealing resin, is prevented from being destroyed. It is due to

When the BGA-type semiconductor device according to the third embodiment of the present invention is mounted on a BGA-mounted circuit wiring board constituting an electronic circuit device, the results showing the bump stress-strain distribution of the semiconductor chip are shown in the first embodiment. This is the same as FIG. The shape of the sample is as described in the method of manufacturing the semiconductor device according to the third embodiment, and is the same as that used in the connection reliability test shown in FIG. As a comparative example, a BG having a conventional structure having no prohibited area for ball electrode arrangement
The bump stress strain in the A semiconductor device is also shown. In order to clarify the value of the bump stress strain, a sample not resin-sealed was used. As is clear from the graph, similarly to the first embodiment, B is plotted on a virtual line formed by the bump electrodes of the semiconductor chip.
In the conventional structure in which ball electrodes of a GA type semiconductor device are arranged, local stress strain is generated in the bump electrodes due to stress strain inherent in the ball electrodes, and the overall bump stress strain tends to be amplified. This is because the stress strain in the ball electrode is B
It is considered that the signal is transmitted to the bump electrode connecting the semiconductor chip through the GA circuit wiring board.

However, the amplification effect of stress strain is not measured on the bump electrode on the semiconductor chip mounted on the BGA type semiconductor device using the ball electrode arrangement structure according to the third embodiment of the present invention. It can be seen that the bumps have a gradual uniform increase in the direction of the maximum distance of the bumps. This is because the bump electrodes of the semiconductor chip are arranged to avoid the stress distortion transmitted from the BGA ball electrodes toward the BGA circuit wiring board. It is thought to be. Furthermore, the bump stress strain transmitted from the ball electrode by this evaluation does not depend on the thermal expansion coefficient of the circuit wiring board on which the semiconductor chip is mounted, and the stress distortion value decreases as the circuit wiring board thickness decreases. This evaluation also confirmed the tendency that the bump stress-strain value was determined only by the wiring board thickness.

FIG. 8A used in the first embodiment also shows a graph in which the effect of the imaginary line of the bump electrode on the stress distortion of the bump electrode in the area of the BGA ball placement prohibited area is the same as FIG. It will be described with reference to FIG. As the BGA ball placement prohibited area effect, the vertical axis represents the bump stress distortion when (bump diameter / bump electrode virtual line ball placement prohibited area) is plotted on the horizontal axis. As is clear from the graph, the bump stress strain shows a sharp change from (bump diameter / bump electrode virtual line ball placement prohibited area) = 1. From this result, when the bump electrode ball placement prohibited area is equal to or larger than the bump diameter (bump diameter / bump electrode virtual line ball electrode placement prohibited area) <1, the stress distortion amplified by the bump electrode becomes extremely small, and the semiconductor chip It can be seen that the connection reliability is significantly improved.

FIG. 18B shows the result of measuring the effect that the stress strain generated at the sealing resin end depends on the external dimensions of the semiconductor chip. The effect of the difference between the semiconductor chip outer dimensions and the circuit wiring board dimensions is (BGA circuit wiring board outer dimensions /
The vertical axis represents the stress-strain at the end of the sealing resin when the external dimension of the semiconductor chip is plotted on the horizontal axis. As is clear from the graph, the initial gradient is set to (BGA circuit wiring board outer dimension / semiconductor chip outer dimension) = 1.1, but (BGA circuit wiring board outer dimension / semiconductor chip outer dimension) = 1 as a boundary. On the other hand, the stress strain at the sealing resin end shows a sharp decrease. From this result, when the external dimensions of the circuit wiring board are smaller than the external dimensions of the semiconductor chip, (the external dimensions of the BGA circuit wiring substrate / the external dimensions of the semiconductor chip) <1, the stress distortion generated at the sealing resin end becomes extremely small, It can be seen that destruction of the circuit wiring layer on the surface of the BGA circuit wiring board can be prevented, and the BGA connection reliability is significantly improved. This is because the sealing resin on the circuit wiring board side has a dimension arrangement structure which is shorter than the sealing resin dimension on the semiconductor chip side and is opposite to the conventional one, so that the displacement generated on the BGA circuit wiring board is reduced, In particular, it is considered that the stress strain maximized at the end where the sealing resin contacts the circuit wiring board is reduced. From the above results, by using the third embodiment of the present invention, the BGA
Not only can the connection reliability of the semiconductor device be significantly improved compared with the conventional structure, but it is also possible to easily mount a bare chip in a pellet state, which has been difficult until now, by flip chip mounting, and manufacture a BGA semiconductor device at low cost. It was confirmed that it was possible.

The semiconductor devices according to the above-described first to third embodiments differ only in the magnitude relationship between the semiconductor chip 1 and the BGA circuit wiring board 2, and each of them uses a square similar shape. However, the present invention is not limited to this, and uses a rectangular and similar semiconductor chip 1 and a BGA circuit wiring board 2 like the BGA type semiconductor device of the fourth embodiment shown in FIG. May be. in this case,
The bump electrodes 8 do not need to be provided on the entire outer peripheral side of the semiconductor chip 1, but are provided in two rows so as to sew between the arrangements of the ball electrodes 4 along the long side as shown in the figure. The bump electrodes 8 are not provided along the peripheral edge of the semiconductor chip 1 as described above, but can maintain sufficient strength only by arranging them in a specific area of the semiconductor chip 1. Therefore, the "predetermined arrangement" used in the item of means for solving the problem is an area arrangement in the case of the fourth embodiment. The other detailed configuration of the BGA-type semiconductor device according to the fourth embodiment shown in FIG. 19A is the same as the configuration of the BGA semiconductor device according to the first to third embodiments, and thus redundant description will be omitted. In addition, the present invention provides FIG.
A bump electrode 8 provided between a semiconductor chip 1 and a BGA circuit wiring board 2 as in the fifth embodiment shown in FIG.
May not be provided in a line along the periphery of the semiconductor chip 1 but in a staggered arrangement. FIG.
In (b), the semiconductor device according to the fifth embodiment includes a semiconductor chip 1 having a size shown in FIG. 9 and a BGA circuit wiring board 2. Therefore, the “predetermined arrangement” used in the item of the means for solving the problem is the staggered arrangement in the fifth embodiment. Between the semiconductor chip 1 and the BGA circuit wiring board 2, bump electrodes 8 are staggered in a region 6 of length L where the pads of the ball electrodes 4 are not arranged between the board 7 and the BGA circuit board 2. Except for this point, the other configuration is the same as the configuration of the BGA type semiconductor device according to the second embodiment, and thus redundant description will be omitted.

The present invention is not limited to the above embodiments, and can be variously modified without departing from the gist of the invention. For example, the shape of the bump electrodes connecting the semiconductor chip and the circuit wiring board does not need to be circular as shown in the present embodiment, and even if the shape of the bump structure is a trapezoid or a cone having a triangle or the like, it does not matter. The effect is unchanged. Further, the ball electrode structure of the BGA is not particularly limited.
Any structure may be used as long as ball electrodes are formed in an array on the back surface of the A substrate. Naturally, the dimensions of the semiconductor chip mounted on the BGA circuit wiring board are not limited, and the dimensions of the ball electrodes, the thickness of the sealing resin, and the material configuration such as the sealing resin are not particularly limited. Also, in the present invention, one representative type of ball electrode arrangement has been described as an example, but the present invention is characterized in that ball electrodes are not arranged on virtual lines formed by bump electrodes connecting a semiconductor chip and a circuit wiring board. Therefore, when the bump layout has the area arrangement, the area where the ball electrode is not arranged may be the area arrangement. Furthermore, although the BGA mounting circuit wiring board has been described using a typical ball placement method as an example, there is no problem if the metal penetrates from the bump electrode to the BGA ball electrode side. When using a bump via structure penetrating the circuit wiring standard from the bump electrode,
The effects of the present invention are significantly improved.

[0044]

As described above in detail, according to the present invention, an array is formed on the back surface of a circuit wiring board of a BGA type semiconductor device in which a semiconductor chip is flip-chip mounted on a seed surface of the circuit wiring board with bump electrodes. Since the BGA ball electrodes arranged in a shape having a region that is not arranged on the imaginary line where the bump electrodes are located, a large chip is
In this case, it is possible to prevent the bump electrode of the semiconductor chip from being destroyed due to the local stress and strain of the ball electrode, which has been a problem when the semiconductor device is formed. In particular, the region where the ball electrode is not arranged is arranged so as to have an area larger than the diameter of the bump adjacent to the semiconductor chip with respect to the imaginary line. Therefore, the stress distortion generated in the ball interconnecting the circuit wiring board and the BGA can be extremely reduced,
The mounting connection reliability of the GA can be improved to a value sufficient to guarantee the reliability of the electronic circuit device.

Further, the bump electrode constituting the semiconductor device is a metal selected from Al, Au, W, Cu, Ni, Cr, Pt, and Pd or an alloy containing these metals as a main component. Pb, Sn, Ag, Sb,
Since a metal selected from Zn and Bi or an alloy containing these metals as a main component, when a BGA semiconductor device is mounted on a circuit wiring board, the bump electrode becomes a metal having a higher melting point than the ball electrode, and the BGA semiconductor When the device is mounted on a circuit wiring board, the bump electrodes are not deformed by the connection of the BGA ball electrode portion, and it is possible to maintain a height dimension sufficient to alleviate the bump stress distortion. Furthermore, BG
A: A circuit wiring board constituting a semiconductor device has a bump electrode on a main surface of a virtual line portion where a bonding pad of a semiconductor chip is located, and has a region on a back surface of the virtual line portion where a ball electrode is not arranged. Due to the structure, when flip-chip mounting an arbitrary semiconductor chip, only the layout of the bump electrodes for connecting the semiconductor chip on the BGA circuit wiring board is changed without changing the terminal layout of the mounting board that constitutes the electronic device By doing so, an arbitrary semiconductor chip can be mounted, and the manufacturing cost of the electronic device can be easily reduced.

Further, according to the present invention, there is provided a method of manufacturing a semiconductor device in which a semiconductor chip is flip-chip mounted on a main surface of a circuit wiring substrate by bump electrodes, and ball electrodes are arranged in an array on the back surface of the circuit wiring substrate. Forming a circuit wiring board having a bump electrode on a main surface of a virtual line portion where a bonding pad of a semiconductor chip is located and a region on a back surface of the virtual line portion where a BGA ball electrode is not arranged; Aligning the electrodes with the bump electrodes of the semiconductor chip, and aligning a pointed jig having at least one of a heating mechanism and a vibration mechanism in a region where the ball electrodes are not disposed on the back surface of the circuit wiring board, thereby heating or vibrating the substrate. The process of joining bump electrodes using at least one of the mechanisms Also easily allows the flip chip mounting as target semiconductor chip pellet form having no flop electrode. Furthermore, since the forbidden region where the ball electrode is not disposed has an area larger than at least the bump diameter for connecting the semiconductor chip, and the pointed jig has an area larger than the area not in contact with the adjacent ball electrode, The pointed jig can be easily brought into contact with the circuit wiring board, and the ball electrode around the pointed jig is not damaged by the bonding. As described above, according to the present invention, the mounting connection reliability of a BGA semiconductor device can be significantly improved at low cost.

[Brief description of the drawings]

FIG. 1A is a sectional view and FIG. 1B is a plan view showing a configuration of a BGA type semiconductor device according to a first embodiment as a basic principle of the present invention.

FIG. 2A illustrates a method of manufacturing the semiconductor device according to the first embodiment;
Sectional drawing shown in the process of (d).

3A to 3G are cross-sectional views showing steps subsequent to FIG. 2 in steps (e) to (g).

FIG. 4 is a partially enlarged cross-sectional view showing the semiconductor device according to the first embodiment.

FIG. 5 is a plan view illustrating the semiconductor device according to the first embodiment.

FIG. 6 is a characteristic diagram for explaining effects of the semiconductor device according to the first embodiment.

FIG. 7 is a characteristic diagram illustrating the effect of the semiconductor device according to the first embodiment.

FIG. 8A is a characteristic diagram illustrating the effect of the semiconductor device according to the first to third embodiments, and FIG. 8B is a characteristic diagram illustrating the effect of the semiconductor device according to the first and second embodiments.

FIGS. 9A and 9B are a cross-sectional view and a plan view illustrating a configuration of a BGA semiconductor device according to a second embodiment of the present invention; FIGS.

FIGS. 10A to 10D are cross-sectional views illustrating a method of manufacturing the semiconductor device according to the second embodiment in steps (a) to (d).

FIG. 11 is a sectional view showing a step following FIG. 10 by (e) to (g).

FIG. 12 shows a semiconductor device according to a second embodiment (a).
Partial enlarged sectional views, (b) and (c) plan views.

FIG. 13A is a characteristic diagram for explaining the effect of the semiconductor device according to the second embodiment, and FIG. 13B is a characteristic diagram for explaining the effect of the first to third embodiments.

FIGS. 14A and 14B are a cross-sectional view and a plan view illustrating a configuration of a BGA semiconductor device according to a third embodiment of the present invention.

FIGS. 15A to 15D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the third embodiment in steps (a) to (d).

FIG. 16 is a sectional view showing a step following FIG. 15 by (e) to (g).

FIG. 17 shows a semiconductor device according to a third embodiment (a).
Partial enlarged sectional views, (b) and (c) plan views.

FIG. 18A is a characteristic diagram for explaining the effect of the semiconductor device according to the third embodiment, and FIG. 18B is a characteristic diagram for explaining the effect of the third embodiment.

19A is a plan view showing a BGA type semiconductor device according to a fourth embodiment of the present invention, and FIG. 19B is a plan view showing a BGA type semiconductor device according to a fifth embodiment of the present invention.

FIG. 20 shows a conventional flip-flop mounting structure and BG
FIG. 3 is a cross-sectional view illustrating an A-type semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor chip 2 BGA circuit wiring board 3 sealing resin 4 ball electrode 5 virtual line where sealing resin contacts BGA circuit wiring board 6 ball electrode disposition prohibited area 7 circuit wiring board constituting electronic circuit device 8 bump electrode 11 semiconductor Chip connection terminal 12 Ball forming terminal 13 Heater 14 Heat tool 15 Bump diameter 21 Bonding pad 22 Barrier metal 23 Semiconductor chip connection terminal 24 Solder resist 25 Passivation film 31 Maximum shear strain 32 Cover plate 33 Stiffener 34 TAB inner lead 35 TAB tape 36 Stress Relaxed wiring

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Atsuko Iida 33, Shin Isogo-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Inside Toshiba Production Technology Research Institute Co., Ltd. 33 Isogo-cho, Toshiba Production Technology Laboratory Co., Ltd. (72) Inventor Kazuki Tateyama 33, Shin-Isoko-cho, Isogo-ku, Yokohama-shi, Kanagawa Pref.

Claims (4)

[Claims] 1. A semiconductor chip having a plurality of bonding pads, and a circuit wiring board on which a semiconductor chip is flip-chip mounted on a main surface by bump electrodes and a pad for a ball electrode is disposed on a back surface. In the semiconductor device, wherein the ball electrode pad is arranged in a region other than the back surface region corresponding to the region where the bump electrode is arranged on the main surface, wherein a ball grid array type semiconductor is provided. apparatus. 2. The semiconductor device according to claim 1, wherein the circuit wiring board has an outer dimension larger than an outer shape of the semiconductor chip, and the bump electrodes are provided in a predetermined arrangement between the semiconductor chip and a main surface of the circuit wiring board. 2. The ball according to claim 1, wherein the ball electrode pad is arranged in a region other than a region on a back surface of the circuit wiring board corresponding to a region on the main surface where the bump electrode is arranged. 3. Grid array type semiconductor device. 3. The bump electrode is provided in a predetermined arrangement between the semiconductor chip and a main surface of the circuit wiring board, and the ball electrode pad is provided with the bump electrode on the main surface. 2. The ball grid array type semiconductor device according to claim 1, wherein the semiconductor device is arranged in an array inside the region on the back surface corresponding to the region. 4. The circuit wiring board has an outer dimension smaller than that of the semiconductor chip, and the bump electrodes are provided in a predetermined arrangement between the semiconductor chip and a main surface of the circuit wiring board. 2. The ball grid array type semiconductor device according to claim 1, wherein the ball electrode pads are arranged in a region other than the region on the back surface side of the substrate corresponding to the region where the bump electrodes are arranged. .