JP2000076142A - Diagnostic device for ram - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely shift to a fail-safe processing in the case of detecting a fault in a RAM diagnosis. SOLUTION: A RAM is diagnosed by a read-write system and a diagnosed result is written double in the mutually different two addresses of the RAM as a flag. Then, the flags (NG flag 1 and NG flag 2) of the diagnosed result written double are read (S21 and S22) and the fail-safe processing is performed (S23, S24 and S25) when at least one of them is the flag of fault presence (NG flag 1=1 or NG flag 2=1). Also, the bit allocation of the flags provided double is separated so as to cope with a bit line fault and the address allocation of the flags provided double is arranged by shifting it for a prescribed interval so as to cope with a word line fault.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diagnostic device for a RAM used in a microcomputer for controlling various electronic control devices in an automobile engine or the like.

[0002]

2. Description of the Related Art Conventionally, in an automobile engine control device, in addition to self-diagnosis of a CPU of a control microcomputer,
Diagnosis of ROM, RAM, etc. is performed by the CPU. R
In the AM diagnosis, a read / write check is performed on a diagnosis target RAM of, for example, 4 bytes each at a predetermined diagnosis timing, and when a failure (NG) is detected, a diagnosis result is set as a flag in a predetermined RAM of the RAM. Writing to the address.

[0003] Then, the flag of this diagnosis result is read, and when a flag indicating that there is a failure, the power supply O
Fail-safe processing such as FF is performed.

[0004]

However, in such a conventional RAM diagnostic device, when the flag itself of the diagnostic result fails, even if the failure is detected by the RAM diagnosis, the process shifts to fail-safe processing. There was a problem that it was not possible. The present invention has been made in view of such a conventional problem,
It is an object of the present invention to reliably shift to fail-safe processing when a failure is detected by AM diagnosis.

[0005]

According to the first aspect of the present invention, as shown in FIG.
M diagnostic means, diagnostic result writing means for doubly writing diagnostic results as two flags to two different addresses in the RAM, and a double-written diagnostic result flag which is read and at least one of which is a failure flag And a fail-safe processing means for performing the fail-safe processing at the time of (1) to constitute a diagnostic device for the RAM.

Further, in order to cope with a bit line failure, it is preferable that the bit assignment of the double flag is performed separately. For this reason, the invention according to claim 2 is characterized in that the diagnosis result writing means double-writes bits at different positions in the RAM at two different addresses. Further, in order to cope with a word line failure, it is preferable that the address assignment of the double flag is shifted by a predetermined interval. Therefore, the invention according to claim 3 is characterized in that the diagnosis result writing means double-writes at two different addresses of the RAM and at an address having an interval other than the address interval of the word line. .

[0007]

According to the first aspect of the present invention, the diagnostic result of the RAM diagnosis is doubled, and the diagnostic result of the doubled diagnostic result is doubled.
Since the process shifts to the fail-safe process by R, the effect that the process can be reliably shifted to the fail-safe process when a failure is detected by the RAM diagnosis is obtained.

According to the invention of claim 2, it is possible to cope with a bit line failure. According to the invention of claim 3, it is possible to cope with a word line failure.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. FIG. 2 is a flowchart of the RAM diagnosis executed by the CPU of the control microcomputer, and shows the contents of the diagnosis performed on the diagnosis target RAM of, for example, 4 bytes. This flow corresponds to RAM diagnosis means.

In step 1 (referred to as S1 in the figure, the same applies hereinafter), a diagnosis target RAM address is referred to. The diagnosis target RAM address is obtained by diagnosing the diagnosis target RAM of 4 bytes for each flow and finally determining the R address.
It is separately set so that diagnosis is performed for all addresses of the AM (after the initial setting, it is incremented for each flow).

In step 2, the data in the RAM to be diagnosed based on the address of the RAM to be diagnosed is saved in a buffer. In step 3, for example, AAAA is stored in the diagnosis target RAM.
AAAAh (4 byte data) is stored. Step 4
Then, the data of the diagnosis target RAM is copied to a temporary (temporary register on the CPU side).

In step 5, the temporary data is bit-inverted. Thereby, in the case of AAAAAAAAh, it becomes 55555555h. In step 6, the temporary data is stored again in the diagnosis target RAM. In step 7, the data of the diagnosis target RAM and the temporary data are compared.

As a result of this comparison, if there is a difference,
In step 8, the NG flag 1 (= 1) is set to the first predetermined address of the RAM as the AM diagnosis NG, and
In step 9, the NG flag 2 (= 1) is set to the second predetermined address of the RAM. In step 10, the data in the buffer is restored to the diagnosis target RAM. Step 11
Then, the data of the RAM to be diagnosed is compared with the data of the buffer.

If there is a difference as a result of this comparison, R
In step 12, the NG flag 1 (= 1) is set to the first predetermined address of the RAM as the AM diagnosis NG, and in step 13, the NG flag 1 is set to the second predetermined address of the RAM.
G flag 2 (= 1) is set. Here, in particular, the steps 8, 9, 12, and 13 correspond to a diagnosis result writing unit.

FIG. 3 is a flowchart of the fail-safe process executed by the CPU of the control microcomputer. This flow corresponds to the fail-safe processing means. In step 21, the NG flag 1 is read from the first predetermined address of the RAM. In step 22, the NG flag 2 is read from the second predetermined address of the RAM. In step 23,
It is determined whether NG flag 1 = 1 (there is a failure).

In step 24, it is determined whether or not the NG flag 2 = 1 (there is a failure). As a result of these determinations, NG
When at least one of the flag 1 and the NG flag 2 is 1 (fault flag), the routine proceeds to step 25, where the fail-safe processing is performed. As the fail-safe process, the power of the control target device is turned off and the like. For example, when the electronically controlled throttle valve is controlled by the control device of the automobile engine, the relay of the power supply circuit for the motor of the electronically controlled throttle valve is turned off. When the relay is turned off, the electronically controlled throttle valve is fixed to the fail-safe opening on the relatively low opening side by the action of the return spring, and the engine output is regulated, but the minimum limp home operation becomes possible.

As described above, the two different addresses (the first address) of the RAM are determined by using the diagnosis result of the RAM diagnosis as a flag.
And a second predetermined address).
In order to perform the fail-safe processing when at least one of the flags of the diagnosis result written is read and at least one of the flags indicates a failure, when the RAM diagnosis detects NG,
It is possible to surely shift to the fail-safe processing.

Here, in order to cope with a bit line failure, 2
The bit assignment of the duplicated flag shall be different. In other words, the diagnostic result of the RAM diagnosis is written as a flag at two different addresses of the RAM in two different bits at different positions. Specifically, referring to FIG. 4, when NG flag 1 (= 1) is placed in bit 1 of address 0000h, for example, even if NG flag 2 (= 1) is placed in another address, Since there is a high possibility that a line failure will occur at the same time, a different bit of another address, for example, bit 7 is arranged.

Further, in order to cope with a word line failure, the address assignment of the double flag is arranged at a predetermined interval. In other words, the diagnosis result of the RAM diagnosis is used as a flag to overlap two addresses different from each other in the RAM and having an interval other than a word line address interval (an address interval where the same failure occurs in the case of a word line failure). Write.

More specifically, referring to FIG.
For example, when (= 1) is arranged at the address 0000h,
Even if the NG flag 2 (= 1) is arranged at another address, if the address interval coincides with the address interval of the word line (depending on the microcomputer, for example, 80h), simultaneously in the case of a word line failure. Since the possibility of failure is high, when the address interval of the word lines is 80h, it is arranged at addresses 0002h, 0082h, etc. so that the intervals are other than the address intervals of the word lines.

Incidentally, the RAM diagnosis method itself is not limited to the method shown in FIG. 2, but may be, for example, a read / write check in which step 3 is omitted. That is, the address of the diagnosis target RAM is referred to (S1), the data of the diagnosis target RAM based on the address is saved in a buffer (S2), the data of the diagnosis target RAM is temporarily copied (S4), and the temporary data is Invert (S5), the temporary data is stored in the diagnosis target RAM (S6), and the data of the diagnosis target RAM and the temporary data are compared (S7).
NG flag 1 and NG flag 2 as RAM diagnosis NG
Is set (S8, S9), the buffer data is restored to the diagnosis target RAM (S10), and the data in the diagnosis target RAM and the buffer data are compared (S11). NG flag 1 as diagnosis NG
And the NG flag 2 may be set (S12, S13).

[Brief description of the drawings]

FIG. 1 is a functional block diagram showing a configuration of the present invention.

FIG. 2 is a flowchart of a RAM diagnosis according to the embodiment of the present invention;

FIG. 3 is a flowchart of a fail-safe process according to the embodiment;

FIG. 4 is a diagram for explaining a setting position of an NG flag.

Continued on the front page (72) Inventor Tatsushi Okubo 1370 Onna, Atsugi-shi, Kanagawa Prefecture Inside Unisex Gex Co., Ltd. (72) Inventor Masahiro Iriyama 2 Takaracho, Kanagawa-ku, Yokohama-shi, Kanagawa Prefecture Nissan Motor Co., Ltd. (72) Invention Person Kenichi Goto 2 Takaracho, Kanagawa-ku, Yokohama-shi, Kanagawa F-term in Nissan Motor Co., Ltd. (reference) 3G084 DA26 DA31 EB02 EB07 5B018 GA03 GA06 HA01 HA03 KA01 MA23 NA01 NA04 QA13 5L106 AA00 DD24

Claims (3)

[Claims] 1. A diagnostic means for diagnosing a RAM, a diagnostic result writing means for writing a diagnostic result as a flag to two different addresses of the RAM doubly, and a diagnostic result flag written twice. A fail-safe processing means for reading and performing fail-safe processing when at least one of them is a flag indicating that there is a failure; 2. The RAM according to claim 1, wherein said diagnosis result writing means double-writes bits at mutually different positions at two different addresses of the RAM.
Diagnostic device. 3. The method according to claim 1, wherein said diagnosis result writing means double-writes at two different addresses of the RAM and at an address having an interval other than the address interval of the word line. 2. The diagnostic device for a RAM according to 2.