JP2000066899A - Execution object optimizing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an execution object optimizing device capable of reducing a cache error caused by cache line competition and improving processing performance. SOLUTION: Object files 4 and 5 are processed by a linker locator 7 according to an instruction file 6 and a map file 9 including an executable object file 8 and arrangement addresses of functions is generated. Then, the executable object file 8 is downloaded to a target system 10 and the number of times of function calls in the target system 10 to the executable object file 8 is measured by a function calling time measuring means 31. Then, the cache line competition at the time of function calling is investigated from the number of times of function calls and the arrangement addresses of respective functions included in the map file 9 and the instruction file 6 is updated by dividing the respective functions into groups through a grouping processing means 33.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microprocessor having a direct map or a set associative cache, and an execution object for reducing a cache miss (cache thrashing) due to competition of a cache line (cache index address). The present invention relates to an execution object optimizing device having a function of rearranging an execution object.

[0002]

2. Description of the Related Art FIG. 4 is a functional block diagram showing a conventional execution object generating apparatus and data correlation. In the conventional execution object generation device shown in FIG. 4, a source file is created using a text editor or the like. In FIG. 4, it is assumed that there are two source files, source file 1 and source file 2, which include functions 11 to 13, functions 21 and 22, respectively. When the source files 1 and 2 are processed (compiled) by the compiler 3, object files 4 and 5 which are relocatable objects including machine language are generated.

[0003] On the other hand, an instruction file 6 created by a text editor or the like contains information on link relocators such as the order and addresses of the object files 4 and 5 to be combined. The object file 4 and the object file 5 are processed by the linker / locator 7 in accordance with the instruction file 6, so that an executable object file 8 and a map file 9 including arrangement address information of each function are generated. The executable object file 8 is downloaded to the target system 10, and the function call is executed.

FIG. 5 shows a memory arrangement of a program stored in the executable object file 8.
In this example, function 11, function 12, function 13, function 2
1, and a function 22 are arranged in this order. The arrows between the functions
4 shows an example of a function calling relationship. Function 11 calls function 12 and function 13, and function 12 and function 13 call function 22. The function 13 calls the function 21. If there is no branch processing, function 1
1 → Function 12 → Function 22 → Function 12 → Function 11 → Function 1
3 → Function 21 → Function 13 → Function 22 → Function 13 → Function 1
Transitions to 1.

FIG. 6 shows the structure of a direct map cache memory. The lower part of the address (here, bit 13
To 16) The tag section 16 of the selection section 14 indexed by 0)
And the upper address of the address (here, bits 31 to 14) are input to the comparator 15, and a match / mismatch is determined. If they match, the data stored in the cache memory is in a correct hit state and the data in the data section 17 can be used. If they do not match, the stored data is incorrect, so the correct data is copied from the main storage device and the tag section 16 is updated.

[0006] During the process of mishit, access to the cache memory cannot be performed, and the process is stopped. That is, it is important to devise a hit to the cache memory as much as possible to improve the performance of the microprocessor. In the map file 9 of FIG. 5, the unit of the cache memory (in this example,
16K bytes) is shown on the right.

[0007]

In such a cache memory, an operation called cache thrashing may occur. A simple example will be described with reference to FIG. Call instruction of function b included in function a (ca
This is a case where the cache index address of the (ll instruction) and the cache index address of the function b are the same. When executing this call instruction, the call instruction has hit the cache.

When the call instruction is executed, the control is transferred to the function b, a cache miss is detected, the cache is updated to the instruction of the function b, and then the function b is executed. When the execution of the function b is completed, the control returns to the function a, but the return destination is occupied by the function b. At this time, the function a is in a cache miss state. Also, here, the function a is updated. A state in which a cache mishit occurs when control is transferred to and from the same cache index is called thrashing. In particular, if thrashing is included in the loop control, cache misses occur frequently, and the problem of extremely poor performance occurs.

The cause of the problem is that the linker does not consider the call correlation of each function and the mapping address to the cache when creating the executable object from the relocatable object.
In order to suppress the occurrence of this thrashing, there is a method of using a set associative configuration in which the cache memory is provided in a plurality of banks, but the control circuit is accordingly complicated,
The circuit operation speed may be limited. Also,
Even in the set associative, when the function call correlation becomes complicated, the same thrashing as described above occurs.

In order to prevent a cache memory mis-hit, Japanese Patent Laid-Open No. 05-265770 discloses that
It is disclosed that, when dividing blocking-capable array data, an object program is generated by determining a division value that is divisible by the loop rotation number and is large enough to fit in the cache memory. Also, Japanese Patent Application Laid-Open No. 07-287
No. 02 discloses that the hit efficiency of the cache memory is improved for a plurality of data to be accessed which are executed in a portion which is repeatedly executed in a program. Further, Japanese Patent Application Laid-Open No. H03-184126 discloses that an object program is created by compiling a code sequence obtained by compiling a sentence with a large number of executions into one area, thereby narrowing an access range to a main storage device when the object program is executed. To increase the probability that the code to be accessed exists in the instruction cache.

However, the technical ideas disclosed in these publications also suggest relocation of functions in order to reduce the time for cache replacement due to a cache miss due to a cache line collision of the instruction cache at the time of function call. Absent.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to provide an execution object optimizing apparatus capable of reducing cache misses due to cache line contention and improving processing performance. Aim.

[0013]

In order to achieve the above object, an execution object optimizing apparatus according to the present invention comprises:
An instruction file containing relocate information, and an address corresponding to a data cache line generated or downloaded by processing the predetermined object file with a linker locator according to the instruction file and downloaded to a target system, or And a map generated by processing the object file by the linker locator according to the instruction file and including location data of a function or data of an address corresponding to a data cache line. A file, a number measuring means for measuring the number of function calls or the number of accesses to the address data from the target system, and the executable object measured by the number measuring means. Grouping processing means for grouping and updating the linker / relocate information of the instruction file from the number of function calls to the file or the number of accesses to the address data and the location address information or the address data of the functions in the map file. It is characterized by.

According to the present invention, an executable object is generated by processing the object file by the link locator, and a map file including the allocation address information of the function or the linker locator is generated. The file is downloaded to the target system and the number of function calls performed by the target system on the executable object file or the number of data accesses of the address corresponding to the data cache line is measured by the number measuring means. The function or address data of the designated file is grouped and updated by the grouping processing means from the allocation address information of the file function or the data of the address corresponding to the data cache line.

Therefore, according to the present invention, the cache replacement time due to a cache miss due to a cache line collision can be reduced at the time of calling a function or accessing an address corresponding to a data cache line,
Cache misses can be reduced, and processing performance can be improved.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an execution object optimizing device according to the present invention will be described below with reference to the drawings. FIG. 1 is a functional block diagram showing the correlation between the configuration and data of the first embodiment of the execution object optimizing device according to the present invention. In FIG. 1, FIG.
The same parts as those of the conventional example shown by the same reference numerals are denoted by the same reference numerals to avoid redundant description of the configuration, and the parts which are different from FIG. 4 and which are features of the first embodiment will be mainly described.

As is clear from the comparison of FIG. 1 with FIG. 4, the first embodiment shown in FIG. 1 newly measures the number of function calls from the target system in addition to the conventional configuration shown in FIG. A function call frequency measuring means 31 as a function frequency measuring means, a function call database 32 collecting the function call frequency measured by the function call frequency measuring means 31, and a grouping processing means 33 are added. The contents of the instruction file 6 are updated by the grouping processing means 33 from the number of function calls collected in the function call database 32 and the map file 9.

Next, the operation of the first embodiment will be described. The function call count is measured by monitoring the actual operation in which the execution object file 8 is downloaded to the target system 10 by the function call count measuring unit 31 and the target system 10 calls the function to the execution object file 8. The number of calls between each function is counted, and the function call database 3
Create 2. The function call database 32 stores the name of the function to be called, the name of the function to be called, and the number of calls.

Next, the grouping processing means 3 will be described with reference to FIG.
3 will be described. FIG. 2 shows a procedure for creating a group. Grouping is performed by examining cache line conflicts at the time of function call from the function call database 32 and the map file 9. The map file 9 stores a function name, a source name including the function, an address where the function is located, and a function size. Grouping is performed in ascending order of degree of coupling (the number of function calls is large).

The group size is a cache size in the case of the direct map system, and one set size in the case of the set associative system. After grouping the functions, small-sized groups are put together to make the free space in the groups as small as possible.

FIG. 3 shows that thrashing does not occur (or hardly occurs) between the groups created in FIG.
Thus, the procedure for rearranging within a group is shown. In collision avoidance between groups, functions are exchanged within each group. Of the function call databases 32, those compiled by grouping already have no possibility of collision. The remaining data is processed in descending order of the number of calls. For each pair for which a collision has been avoided or for which a collision has not originally occurred, each function is marked so that the collision does not recur in later processing.

The function replacement is performed by replacing the function in which the collision occurs.
This is performed by shifting the number by n in the direction of the upper address or the lower address. FIG. 3 shows a case where the positions of the function a1 of the group a and the function a2 are reversed. If the collision is avoided by shifting to the upper address,
In the subsequent processing, a mark is made so as not to be shifted in the lower address direction. When the collision is avoided by shifting in the lower address direction, a mark is made so as not to be shifted in the higher address direction in the subsequent processing.

The instruction file 6 describes the arrangement order and alignment of the grouped functions by the grouping processing means 33. When the instruction file 6 is updated, the linker reads the instruction file 6 again and creates an execution object whose function arrangement order and alignment are changed.

The problem of finding a function arrangement to avoid instruction cache contention is NP complete, and it takes a lot of memory and time to find a complete solution.
Therefore, in the first embodiment, the priority based on the number of function calls is used to preferentially process a program that greatly contributes to the reduction in the execution speed of the entire program, thereby reducing the time required for the rearrangement process and the execution speed improvement effect. Balanced. As described above, in the first embodiment, the functions are rearranged so that the cache replacement time due to the cache miss due to the cache line collision of the instruction cache can be reduced when the function is called, so that the cache miss can be reduced and the processing performance can be reduced. There is an effect that can be improved.

Next, a second embodiment of the present invention will be described. In the second embodiment, regarding the configuration,
Same as the first embodiment, except that a data cache can be used instead of an instruction cache. In this case, the count of the number of function calls is the count of the number of data accesses of the address corresponding to each data cache line. In the second embodiment, the executable object file is downloaded to the target system 10 to generate the function call database. However, the database may be generated using a simulator. Further, here, for the sake of simplicity, a direct map cache is assumed, but by changing the grouping processing means 33,
It can also be applied to set associative cash.

[0026]

As described above, according to the present invention, the number of times a function is called from the target system or the number of times of accessing address data corresponding to a data cache line is measured by the number-of-times measuring means. Since the function of the instruction file or the address data is grouped and updated by the grouping processing means from the file arrangement address information, the cache line collision occurs at the time of calling the function or accessing the address corresponding to the data cache line. The cache replacement time caused by the cache miss can be reduced, the cache miss can be reduced, and the processing performance can be improved.

[Brief description of the drawings]

FIG. 1 is a functional block diagram showing a correlation between data and a configuration of a first embodiment of an execution object optimizing apparatus according to the present invention.

FIG. 2 is an explanatory diagram of group creation of link / relocate information of an instruction file by a grouping processing unit in the execution object optimizing apparatus of FIG. 1;

FIG. 3 is an explanatory diagram of a relocation procedure in a group of link / relocate information of an instruction file in the execution object optimizing apparatus of FIG. 1;

FIG. 4 is a functional block diagram showing a correlation between a configuration of a conventional execution object generation device and data.

FIG. 5 is an explanatory diagram showing a function arrangement and an inter-number call relation in an execution object in a conventional execution object generation device.

FIG. 6 is an explanatory diagram showing the structure of a direct map cache memory applied to a conventional execution object generation device.

FIG. 7 is an explanatory diagram for explaining a relationship between a function call of an execution object and a thrashing generation mechanism in a conventional execution object generation device.

[Explanation of symbols]

1, 2, ... source file, 3 ... compiler, 4, 5
…… Object file, 6 …… Instruction file, 7…
... Linker locator, 8 ... Executable object file, 9 ... Map file, 10 ... Target system, 11-13, 21, 22 ... Function, 31 ... Function call frequency measuring means, 32 ... Function call Database, 33 ... Grouping processing means.

Claims (19)

[Claims] 1. An instruction file including an order of linking with a plurality of object files or linker relocating information, and a predetermined object file generated by processing with a linker locator according to the instruction file and downloaded to a target system And an executable object file for accessing data at an address corresponding to a data cache line when the function is called, and the object file is generated by being processed by a linker locator according to the instruction file. Measures the number of function calls or the number of access to the address data from the target system and the map file containing the location address information or the data of the address corresponding to the data cache line The number of times the function file is called or the number of times the address data is accessed for the executable object file measured by the number of times measurement means, and the location address information of the function in the map file or the address data. An execution object optimizing device, comprising: grouping processing means for grouping and updating linker / relocate information. 2. A function call database is created by counting the number of calls between functions by monitoring the actual operation of calling a function to the executable object file by the target system. 2. The execution object optimizing device according to claim 1, wherein: 3. The function call database according to claim 1, wherein a function name called from said executable object file, a function name called from said target system, and a function call count from said count measuring means are stored. Item 3. The execution object optimizing device according to Item 2. 4. The execution object optimization method according to claim 1, wherein said grouping processing means performs function grouping by checking a cache line conflict at the time of function call from said function call database and said map file. Device. 5. The execution object optimizing apparatus according to claim 1, wherein said grouping processing means groups together the functions from the executable object file in descending order of the number of calls. 6. The execution object optimization method according to claim 1, wherein the grouping processing means sets a group size of the function when performing the grouping of the function to a cache size in the case of a direct map method. Device. 7. The execution according to claim 1, wherein the grouping processing means sets a group size of the function when performing grouping of the function to one set size in the case of a set associative method. Object optimization device. 8. The execution object according to claim 1, wherein after grouping the functions, the grouping processing unit collects small-sized groups to reduce a free area in the groups as much as possible. Optimizer. 9. The execution object optimization method according to claim 1, wherein said grouping processing means performs function replacement within each group after grouping of said functions to avoid collision between groups. apparatus. 10. The data processing apparatus according to claim 1, wherein the grouping processing unit performs a collision avoidance process in descending order of the number of calls among the data regarding the ungrouped functions stored in the function call database. 1
An execution object optimizing apparatus according to the above. 11. The grouping processing means may mark a function name so that a collision among functions stored in the function call database that avoids collision or has no possibility of collision does not recur. 2. The execution object optimizing apparatus according to claim 1, wherein the execution object is attached. 12. The execution object according to claim 1, wherein said grouping processing means shifts a function in which a collision of the grouped functions occurs by a predetermined number in an upper address or lower address direction to avoid the collision. Optimizer. 13. The grouping processing means, when shifting a function in which a collision of the grouped functions occurs by a predetermined number in the direction of an upper address to avoid the function, a mark is provided so as not to shift to a lower address in the subsequent processing. 13. The execution object optimizing device according to claim 12, wherein the execution object optimizing device is attached. 14. The grouping processing means, when shifting a function in which a grouped function causes a collision by a predetermined number in the lower address direction to avoid the same, sets a mark so as not to shift to the upper address in the subsequent processing. 13. The execution object optimizing device according to claim 12, wherein the execution object optimizing device is attached. 15. The execution object optimization method according to claim 12, wherein said grouping processing means performs a grouping process by giving a priority to the number of times the executable object calls a function to said target system. Device. 16. The execution object optimizing apparatus according to claim 1, wherein the map file stores a function name, a source name including the function, an address where the function is located, and a function size. . 17. The execution object optimizing apparatus according to claim 1, wherein the instruction file describes the arrangement order and alignment of the grouped functions by the grouping processing unit. 18. The execution method according to claim 1, wherein, when the instruction file is updated, the linker locator reads the instruction file again to create an execution object in which a function arrangement order and an alignment are updated. Object optimization device. 19. The execution object optimizing apparatus according to claim 1, wherein the function call database is generated using a simulator.