JP2000048182A - Image information processor and method therefor, and entertainment device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a game machine for quickly executing repeated conversion and decoding based on a plotting command or data loaded from a storage medium. SOLUTION: The plotting command, fractal conversion parameter, or data loaded from a storage medium 5 are stored in a main memory 3, and the repeated conversion and decoding of plotting textures developed in VRAM 8 and 9 is operated by plotting processing parts 6 and 7 according to the plotting command or the fractal conversion parameter transferred under the control of CPU 1 and 2. Thus, it is possible to quickly attain the repeated conversion and decoding of the textures, and to obtain a restored image with high quality while realizing the repeated conversion and decoding by largely reducing calculated amounts.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image information processing apparatus and method, and an entertainment apparatus, and more particularly, to an image information processing apparatus and method for generating an image by iterative transformation decoding, and an entertainment apparatus. .

[0002]

2. Description of the Related Art As a conventional typical image compression method, I
The so-called JPEG standardized by SO (Joint Ph
The otographic Coding Experts Group) method is known. This JPEG method uses DCT (discrete cosine transform:
It is known that when a relatively high bit is assigned using Discrete Cosine Transform, good encoded / decoded images are provided. However, if the number of coded bits is reduced to some extent, block distortion peculiar to DCT becomes remarkable, and deterioration is subjectively noticeable.

[0003] Apart from this, recently, iterative conversion schemes (IF
An image compression method using S (Iterated Function Systems) has been receiving attention. This method is based on the premise that if a part of the image is extracted from the whole image, another image very similar to the extracted image exists in the image in a different size. This is based on the self-similarity of images. This iterative conversion method is based on J
Since block distortion unlike PEG is not noticeable, and since self-similarity between blocks of different sizes in an image is used, there is an advantage that decoding does not depend on resolution. This iterative transform coding is also called fractal coding, and is expected to be applied to various areas.

The technique described in Japanese Patent Application Laid-Open No. 5-57062 is a technique in which a function of restoring an image with a small amount of information of a fractal is applied to a game machine. FIG.
It is a block diagram showing this technique. 16, a system bus 62 to which the CPU 50 is connected includes a work VRAM 51, a ROM 52, an external interface (I / F) 53, a fractal drawing unit 55, a GDC (graphics display controller) 57, and a keyboard (KB). The I / F 60 is connected. External I
/ F53 is provided with a game ROM 54. VR is used for the fractal drawing unit 55 and the GDC 57.
An AM (video RAM) 56 is connected, and a GRT 57 is connected to a CRT (cathode ray tube) 5 via a graphic I / F 58.
9 is connected. A keyboard 61 is connected to the KBI / F 60.

Next, the operation will be described. External I / F5
When the game ROM 54 is mounted on the CPU 3 and the power is turned on by operating the power switch, the CPU 50 executes the game RO.
A certain amount of the head portion of the game software is read from M54, stored in the work VRAM 51, and the initial screen contained therein is transferred to the GDC 57. The GDC 57 develops the transferred initial screen on the VRAM 56, reads it out at a fixed period, transfers it to the graphic I / F 58, and outputs it to the CRT 59. CPU 50
From the keyboard 61 to the KB (keyboard) I / F 60
When a command input by a user is received through the VRAM 51, the corresponding graphic data is read from the work VRAM 51 and transferred to the GDC 57 in accordance with the command.
By issuing a command to move the display graphic to the DC 57, the display screen is updated.

The game software read from the game ROM 54 via the external I / F 53 and stored in the work VRAM 51 includes a fractal figure drawing command and program in addition to the conventional control program and figure data. . The fractal graphic drawing command and program are composed of mathematical formulas (algorithms) defining rules for graphic generation and initial values relating to the starting position of the generated graphic. If the data read from the work VRAM 51 in accordance with a command input from the keyboard 61 is not graphic data but a fractal graphic drawing command, the CPU 50 transfers the command to the fractal drawing unit 55 instead of the GDC 57. Fractal drawing unit 5 receiving this
In step 5, graphic elements such as line segments are sequentially generated in accordance with the initial values and the mathematical expressions, and are developed on the VRAM 56, so that various figures, for example, natural objects such as mountains, trees, leaves, and the like, characters, and the like. Draw a shape. As described above, a complicated figure having a large data amount can be drawn according to the fractal drawing command having a small data amount.

[0007] Japanese Patent Application Laid-Open No. 5-57062 does not specifically describe what kind of fractal drawing command is given and what kind of figure is drawn.

[0008]

In the above-mentioned prior art example, since a fractal figure is drawn and outputted by a drawing command, the figures which can be drawn are limited, and a general natural image / texture is compressed / decompressed. There was a problem that it had no function.

On the other hand, apart from the above technique, the JPEG method is used as a compression encoding method of texture (image) when texture mapping is performed on an object shape frequently used on a personal computer or a game machine at present. Therefore, when the object shape is zoomed, the apparent resolution of the texture is increased, so that the block distortion peculiar to DCT is enlarged and the image is remarkably deteriorated, or a blurred image is displayed due to a loss of sharpness of the image. Had the drawback that

The present invention has been made to solve this problem, and as described above, it is possible to obtain a decoded image in which the image quality of the texture is hardly degraded when the texture-mapped object shape is zoomed. It is an object of the present invention to provide a simple image information processing apparatus and method, and an entertainment apparatus.

[0011]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention uses main storage means for storing data including fractal conversion parameters and fractal conversion parameters stored in the main storage means. It has drawing processing means for generating an image by performing iterative conversion decoding processing, image storage means for developing an image generated by the iterative conversion decoding, and at least one control means for controlling processing by the drawing processing means It is characterized by:

Here, the above-mentioned drawing processing means and control means are defined as 2
More than one, a specific drawing processing means is used for each target object, or a dedicated CPU is provided for each drawing processing unit. Is provided.

Further, according to the present invention, when performing iterative transformation decoding processing using the fractal transformation parameters stored in the main storage means, an initial image is reconstructed, and the fractal transformation parameter is reconstructed based on the reconstructed initial image. An image is generated by performing iterative transform decoding using. In order to restore the initial image, use of a texture decoder for decompressing and expanding the texture may be used. By performing iterative transform decoding based on the restored initial image, an iterative transform decoded image can be generated at high speed with a small number of iterations.

Further, the entertainment apparatus according to the present invention includes a CPU for controlling the whole, a main memory for storing and holding data, a chipset for controlling the CPU, and a graphic connected to the chipset via a high-speed bus. A chip and a video memory built in or external to the graphic chip, and a means for performing iterative conversion decoding of an image in accordance with a drawing command read from the main memory using the graphic chip and generating a texture. It is characterized by.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments according to the present invention will be described below with reference to the drawings. FIG.
FIG. 1 is a block diagram illustrating a schematic configuration of an entertainment device such as a game machine equipped with a fractal decoding function, that is, a function of iterative transform decoding of an image, as an image information processing device according to a first embodiment of the present invention.

In the apparatus shown in FIG. 1, for example, two Cs are used as at least one control means for controlling the entire apparatus.
PUs 1 and 2 and a storage medium 5 such as a so-called CD-ROM or ROM cartridge storing drawing commands and data.
A main memory 3 serving as main storage means for storing data including fractal conversion parameters; a cache memory 4 connected to the main memory 3 for temporarily storing drawing commands, fractal conversion parameters and data; One or more (for example, two) drawing processing units 6 and 7 that generate a texture by being repeatedly executed;
The system includes VRAMs 8 and 9 as video memories for storing and holding texture data, a controller 11 for a user to perform operation input, and an interface unit 10 for the controller 11. In addition, if necessary, a display unit such as a CRT (cathode ray tube) on which the generated image is displayed and a graphics interface unit for displaying an image on the display unit are provided.

Next, the operation will be described. In FIG. 1, upon receiving instruction information 104 issued from the controller 11, the interface unit 10 transfers this to the CPU 1 or CPU 2 via the main bus 100 as control information. CPU 1 or 2 receives this,
The rendering command and the fractal conversion parameter recorded in the storage medium 5 are read out through the main bus 100.

The drawing commands and fractal conversion parameters read from the storage medium 5 are stored in the CPU 1 or the CPU
2, the main memory 3 through the main bus 100
Alternatively, it is temporarily stored and held in the attached cache memory 4. Further, when a cache memory is attached to the CPU 1 or the CPU 2 and the amount of data can be accommodated in the cache memory, the fractal conversion parameter can be directly stored and held in the cache memory attached to the CPU 1 or the CPU 2. Subsequently, the fractal conversion parameters are transferred to the drawing processing unit 6 or the drawing processing unit 7 under the control of the CPU 1 or the CPU 2.

Here, a description will be given on the assumption that the processing is performed by the drawing processing unit 6. First, a work area for iterative decoding is secured in the VRAM 8 which is a video memory connected to the drawing processing unit 6. An image is generated by subjecting the image secured in the work area to iterative conversion decoding (fractal decoding) in accordance with the drawing command. FIG.
1 specifically illustrates the above operation. FIG. 1
1, the outer frame of the bold line is the work area W of the entire video memory.
_0, upper left region shows a work area W ₁ which is reserved for iterated function decoding. Therefore, conversion from the reference block image D _k to the decoding target block image R _k is performed in the work area W ₁ .

The texture processing unit 6 has a texture
If a cache unit is provided, the drawing texture 102 is stored and held in the texture cache unit, and the iterative conversion decoding can be performed on the drawing texture 102. Therefore, higher speed can be expected. The operations in the drawing processing unit 6 and the VRAM 8 may be realized by the drawing processing unit 7 and the VRAM 9.

Here, the basic concept of the iterative transform decoding performed by the drawing processing unit 6 (or 7) and the encoding related thereto will be described with reference to FIG.

The basic structure of the above iterative transform coding is described in, for example, Arnaud E. Jacq
uin) 's paper "Image coding based on a fra."
ctal theory of Iterated Contractive Image Transfor
mations ", IEEE Transactions on Image Processing, Vo
l.1, No.1, pp.18-30).

In the iterative transform decoding, usually, a domain block image (D _{k in} FIG. 2) is converted to a range block image (R _{k in} FIG. 2).
_This is a method of generating a restored image by converging the entire image by repeatedly performing the reduced image mapping conversion to _k ) on all the range block images constituting the screen. On the encoder side, the position information and the conversion parameter of the domain block that most closely approximates each range block may be encoded.

In FIG. 3, the block size of the range block R _k is m × n, and the block size of the domain block D _k is M × N. FIG. 3 shows that there are L × L range blocks in the entire screen. The block sizes of the range block and the domain block are factors that greatly affect the coding efficiency, and the size determination is important.

The block image conversion by the image conversion / generation unit 19 shown in FIGS. 6 and 7 described below is a conversion from D _k to R _k , and the mapping function for the block R _k is w _k Assuming that the number of domain blocks required to perform the mapping conversion of the entire screen is P, the image f is represented by the following mapping function W: W (f) = w ₁ (f) ∪w ₂ (f) ∪ ∪ w _P (f)... (1) Therefore, W is represented by the following equation.

[0026] _{^{W = ∪ P k = 1 w}} k ...... (2) Here, the mapping function w is, it is sufficient convergence be selected what kind of things, generally contraction mapping in order to ensure convergence Is often used. Furthermore, affine transformation is often used because of simplification of processing. The case where D _k is mapped to R _k by the affine transformation is expressed by the following equation when the actual conversion function is set as v _i .

[0027]

(Equation 1)

By the equation (3), all conversions such as rotation, translation, reduction, and enlargement between two blocks can be expressed. The image conversion / generation unit 19 shown in FIG. 6 incorporates a circuit for performing, for example, rotation, translation, reduction, enlargement, and the like represented by Expression (3).
Is subjected to conversion processing using the conversion parameter information 109 to obtain a domain block image 115 after conversion.

Although the above example shows the transformation with respect to the spatial coordinates of the block, it is also possible to similarly perform the mapping transformation using the affine transformation with respect to the pixel values, for example, the gradation values such as luminance and color difference information. it can. In this case, for the sake of simplicity, for example, a relational expression in which the pixel value d _i in the domain block D _k is mapped to the pixel value r _i in the range block R _k is as follows.

V _i (d _i ) = s × d _i + b (4) where s is the contrast (Contrast Sca in the above paper)
ling), b for brightness (Luminance Sh in the above paper)
ift). In this case, the parameters s and b may be calculated so that the sum of squared differences between the error and the pixel value r _i in the range block R _k is minimized. That is, Σ (s × d _i + b−r _i ) ² → minimum value (5) may be set.

FIG. 4 is an explanatory diagram of a method using pixel averaging when the domain block size is twice the vertical and horizontal size of the range block size, that is, when it corresponds to half reduced image conversion. That is, as shown in FIG.
For example, assuming that an average value of four pixels as a conversion unit of the domain block D _k is d _i , v _i is calculated using the above equation (4), and this is used as a pixel value at a position to be converted of the corresponding range block R _k An operation of replacing (overwriting) is necessary. Therefore, it is necessary to calculate (3 additions and 1 division) + (1 addition and 1 multiplication) = (4 additions, 1 division and 1 multiplication).

Next, a second embodiment of the present invention will be described. In the above-described first embodiment of the present invention, the drawing processing unit 6 and the VRAM 7 connected to the drawing processing unit 6 are used.
Has been described, the iterative transform decoding is performed in the work area developed in the VRAM 7 to generate the texture.

Further, as a second embodiment of the present invention,
In consideration of the fact that entertainment devices, game machines, and the like often draw a plurality of objects simultaneously, a plurality of drawing processing units (for example, two drawing processing units 6 and 7) are provided as shown in FIG. A drawing processing unit is individually assigned to each character object such as a background object and a person. That is, two or more drawing processing units are provided, and a specific drawing processing unit is used for each target object.
For example, the drawing processing unit 6 and the drawing processing unit 7 in the configuration of FIG. 1 are used by sharing one role for drawing a person, a character or an object, and the other for drawing a background such as a building or a landscape. Further, the number of drawing processing units can be increased, and a drawing processing unit can be assigned to each object. In this case, each drawing processing unit may be provided with a dedicated video memory.

Therefore, unless it is not feasible to provide the drawing processing unit and the video memory as many as the number of target objects due to hardware restrictions, the drawing processing unit and the video memory are used for each target object, and the repetition is performed as necessary. Performs conversion decoding to generate a texture. In this case, the processing speed of the entire system is improved because the processing of each object is assigned to a separate drawing processing unit.
Needless to say. Therefore, since the speed of drawing can be increased, an entertainment device or a game machine with a very realistic feeling can be obtained.

The above description relates to the drawing processing unit and the video memory. However, it is also possible to provide a plurality of CPUs and distribute the processing of the plurality of CPUs to each target object. This means that a dedicated CPU is provided for each drawing processing unit. It is obvious that the processing speed of the entire system is improved by distributing the load of calculation and control imposed on the CPU.

Next, a third embodiment of the present invention will be described. In the third embodiment, one or more CPUs that perform overall control, a storage medium that stores data including drawing commands and fractal conversion parameters, and a method that temporarily stores drawing commands, fractal conversion parameters, and texture data are used. , A drawing processing unit that generates a texture by repeatedly executing a drawing command, and an arithmetic processing unit that performs a geometric calculation of shape information. The drawing processing unit and the arithmetic processing unit may be realized by one image processing unit or image processing processor, or may include a texture decoder for decompressing and expanding the texture.

FIG. 5 shows an example of the third embodiment of the present invention. The device shown in FIG. 5 includes a CPU 1 that performs overall control, a large-capacity external memory 12,
A cache memory 4 connected to the CPU 1 and a storage medium 5 such as a CD-ROM or a memory cartridge in which data including a drawing command and fractal conversion parameters are stored.
, An image processing unit 13 including an arithmetic processing unit 14 and a drawing processing unit 15, an interface unit 10, and a controller 11 that is manually operated.

Next, the operation will be described. In FIG. 5, the interface unit 10 receives instruction information 104 issued from the controller 11, and the interface unit 10 uses the received information as control information.
0 to CPU1. In response to this, the CPU 1 reads out data including a drawing command and fractal conversion parameters recorded on the storage medium 5 via the main bus 100.

The drawing command and the fractal conversion parameter read from the storage medium 5 are transmitted to the external memory 12 or the CPU 1 by the CPU 1 through the main bus 100.
Are temporarily stored and held in the cache memory 4 attached to the. The drawing command is controlled by the CPU 1
The data is transferred to the drawing processing unit 15 in the image processing unit 13. The operation of the iterative transform decoding in the same part may be the same as that already described. On the other hand, the arithmetic processing unit 14 performs geometric calculations such as coordinates and shapes of three-dimensional polygons to which textures generated by ordinary decoding are mapped. Therefore, the information 105 of the three-dimensional polygon calculated by the arithmetic processing unit is input to the drawing processing unit, and texture mapping is performed by the same. Note that it is easy to realize the drawing processing unit and the arithmetic processing unit with the same processor.

Next, a fourth embodiment of the present invention will be described. The fourth embodiment is provided with an iterative transform decoding unit that performs an operation of converting an image in a block into an image in another block a plurality of times in the drawing processing unit described above. It is a thing.

FIG. 6 is a block diagram showing a configuration example in which iterative transformation decoding in a drawing processing unit which is a main part of the fourth embodiment is actually performed. The iterative transform decoding unit shown in FIG. 6 performs an operation of converting an image in a block into an image in another block a plurality of times, and includes a demultiplexing unit 17, a domain block generation unit 18, an image It comprises a conversion / generation unit 19, an image memory unit 20, a control unit 21, and an initial decoded image generation unit 22.

Next, the operation will be described. The domain block generation unit 18 to which the domain block information 108 output from the demultiplexing unit 17 is input outputs a domain block image 111. This domain block image 1
Reference numeral 11 denotes an image conversion / generation unit 19 according to the first embodiment.
Conversion parameter 10 corresponding to the drawing command described in
According to 9, processing such as rotation, parallel movement, enlargement and reduction is performed. The converted domain block image 115 is stored and held at the position of the range block in the image memory unit 20. This operation means the above-described operation of iteratively transforming and decoding with a drawing command and storing and holding it on the video memory. The control unit 21 shown in FIG.
Are added to the components as part of the control of. The above is the configuration and operation of the iterative transform decoding in the drawing processing unit.

Next, an example of the configuration of the iterative transform encoder corresponding to the iterative transform decoder of FIG. 6 will be described with reference to the block diagram of FIG. The iterative transform encoder shown in FIG. 7 includes a first block generation unit 23, a second block generation unit 24, a control unit 25, an approximation measurement / threshold processing unit 26, a block information storage unit 27, an initial decoded image It comprises a generating unit 28, a switch 29, and an encoding / multiplexing unit 30.

Next, the operation will be described. The image conversion / generation unit 19 shown in FIG. 7 has a built-in circuit for performing a series of affine transformations such as rotation, translation, reduction, enlargement, and the like represented by the above equation (3). To perform position conversion within the screen. At the same time, as a method of converting the gray value of a pixel in a block, this can also be realized by using affine transformation. For the second block image 123, the conversion coefficients (a _i , b _i , c
_i , d _i , e _i , f _i ) are changed in several ways, and the converted block images 126 can be obtained by performing the conversion processing. And those converted block images 1
26 and the degree of approximation of the first block image 120
The threshold processing is performed by the approximation degree measurement / threshold processing unit 26, and the second block image having the smallest error is selected.
Block image information 110, second block image information 1
08, and outputs the conversion parameter 109 (meaning the conversion coefficient in the above equation (3)), multiplexes it in the encoding / multiplexing unit 30, and sends it out. The above is the operation of the iterative transform coding.

Next, a fifth embodiment will be described. In the fourth embodiment, the configuration and operation of the actual iterative transform decoding have been described with reference to FIG. 6. However, the configuration changes depending on where the video memory or cache memory used during the iterative transform decoding operation is located. come. Note that the video memory or the cache memory is the image memory unit 20 in FIG. As described in the above-described first, second, and third embodiments, in addition to the configuration in which a video memory and the like are built in the rendering processing unit, the configuration is such that an external video memory and the like are added to the rendering processing unit. It is also possible. Although these advantages and disadvantages cannot be determined unconditionally depending on the hardware configuration, a configuration in which a video memory or the like is built-in can achieve higher speed, but an external video memory or the like has the advantage that the capacity can be increased. is there. Therefore, it is important to balance the two according to the specifications of the system.

Next, a sixth embodiment will be described. In the sixth embodiment, in the above-described iterative decoding unit, the image restored by the initial decoded image restoring unit in the drawing processing unit is used as the first initial image when converting the image in the block. Things.

In FIG. 6, when the encoded information 107 of the initial decoded image is sent out of the data separated by the multiplexing / demultiplexing unit 17, the initial decoded image restoring unit 22 performs initial decoding. The image 117 is restored. The initial decoded image 117 is developed in a predetermined work area of the image memory unit 20 and used for the next conversion decoding. Therefore, the above operation can be performed by adding the initial decoded image restoring unit 22 in FIG. 6 to the drawing processing unit as a component. Note that the encoding information 107 of the above initial decoded image is:
It is generated by the initial decoded image generation unit 28 in FIG.

FIG. 8 is a diagram specifically showing this. In this case, the encoded information 107 is output from the input image 119 by simple downsampling (pixel thinning). On the other hand, the initial decoded image restoration unit restores the resolution of the original image by upsampling (pixel interpolation),
An initial decoded image 117 is output. In the specific example of the sixth embodiment, a simple method is taken as an example for simplification of the description, but it goes without saying that a more efficient compression method can be used.

Next, a seventh embodiment of the present invention will be described. As already described with reference to FIG. 2 in the above-described first embodiment, in the normal iterative transform decoding operation, writing and reading of texture are repeatedly performed on the same work area in the video memory. Done. On the other hand, it is possible to adopt a configuration in which textures subjected to iterative transform decoding are separately developed for a plurality of work areas in the video memory. This configuration is effective, for example, when the texture is zoomed one after another. The details will be described below.

When the texture is zoomed, the normal operation is to perform iterative transformation decoding on the texture developed in the video memory by repeatedly using the fractal transformation parameters to converge the texture.

However, when the texture is continuously zoomed, the zoom ratio of the most recently generated texture (r _{n-1 in} FIG. 9) and the current zoom ratio (r _{n in} FIG. 9) are extremely large. It is likely to be close (r _{n-1 in} FIG. 9).
<R _n). In this case, as shown in the figure, it may be generated texture I _n running iterated function decoding using direct fractal transformation parameters for the previous decoding texture I _n-1 zoom ratio. Thus, it is obvious that the fractal conversion parameter is repeatedly executed from the beginning on the drawing texture, but the processing amount can be greatly reduced. In addition, since the texture In _-1 developed on the video memory can be overwritten, the work area of the video memory can be effectively used.

Next, an eighth embodiment of the present invention will be described. According to the eighth embodiment of the present invention, when performing iterative transform decoding with zoom, an image generated from a decoded image generated at the latest zoom rate and a decoded image generated at the current zoom rate are combined. Thus, the decoded image at the current zoom rate is obtained. That is, as shown in FIG. 10, the texture of the decoded texture I _n-1 is generated by pixel interpolation magnification of r _n, generated by repeatedly converting decrypted with zoom I _n-1 to the magnification of the r _n those taking the average of the texture I _n, a new decoding texture I _n. At this time, a work area for generating the texture by interpolating the pixels and a work area for generating the texture by performing the direct repetitive conversion decoding are separately prepared.

FIG. 11 is a diagram showing this in detail. Work areas W ₁ and W ₂ are separately secured for the zoom ratios T 1 and T ₂ , and a texture is generated in these areas. it can. It should be noted that it is obvious that the work area allocated to the texture that is no longer used by the generated texture can be released.

In the above technique, both textures are synthesized at a ratio of half each, so it can be said that the texture is translucent synthesis. On the other hand, a new texture can be generated by multiplying the two textures by an appropriate magnification. For example, if (texture 1) × 0.7 + (texture 2) × 0.3 = new texture, 70
% And 30%, the two textures are combined, and the same effect is achieved.

Next, a ninth embodiment of the present invention will be described. According to a ninth embodiment of the present invention, in the above-described iterative decoding unit, means for converting an image obtained by sub-sampling an image in a block of a reference source into an image in another block, Means for changing the position of the pixel to be subsampled in the image in the block according to the number of repetitions, or a part of the image in the block of the reference source is replaced with the image in another block. Means for copying the data.

That is, in the first embodiment, the conversion of the pixel value is realized by the method shown in the above equation (4). In this case, one multiplication and one multiplication of the contrast and the brightness are performed. Must be added. However, when this is to be realized by hardware (a graphics chip or the like), if one multiplication and one addition are performed at the same time, the processing speed increases, which may become impractical. Also, depending on the hardware, it may not be possible to respond.

To cope with this, the problem can be solved by reducing the multiplication and addition of the two parameters in the above equation (4) to one. It is important how to achieve this while minimizing deterioration of image quality.

FIG. 12A shows a case where the domain block size is twice the vertical and horizontal size of the range block size (corresponding to half reduced image conversion) as in FIG. First, without taking the average of the four pixels as the conversion unit in the domain block D _k ,
Some of the pixels in the pixel, for example, the hatched pixels in the drawing, i.e. the pixel located at the lower left of the 4 pixels to be converted units as d _i it is overwritten in a position to be converted of the range block R _k . In this case, c =
1, it is equal to b = 0, addition, division, multiplication without any need, you have copied the lower left pixel as it is within range block R _k in the four pixels to be converted unit of the domain block D _k above Operation is the only thing, and calculation is unnecessary.
This is the simplest of the sub-sample approaches. Accordingly, it can be seen that the processing amount is much smaller than that in the case of FIG.

In the specific example of FIG. 12A, the lower left pixel position among the four pixels as the conversion unit of the domain block _Dk is used, but it is apparent that another pixel position may be used. As another example, the control unit 21 of FIG. 6 controls the number of iterations of the iterative decoding loop of FIG. 6 (in FIG. 1, the CPU controls through the drawing processing unit).
A method of circulating the position of a pixel in an area serving as a conversion unit of the domain block _Dk according to the number of repetitions may be used.

That is, FIG. 12B shows four pixels a, b, c, and d in an area serving as an arbitrary conversion unit in the domain block D _k , and the four pixels a, b, c, and d depend on the number of iterations of the iterative decoding loop. Then, one pixel may be cyclically extracted as a → b → c → d → a →... And copied to the range block _Rk . According to this method, the image quality of an image generated by iterative transform decoding is improved as compared with the case where pixels at the same position in the transform unit are used as shown in FIG.

In the present embodiment, as described above, in the iterative transform decoding, an operation corresponding to c = 1 and b = 0 in the above equation (4) is performed, so that it is described in the aforementioned article by Jacquin. Image restoration from an arbitrary image, which can be realized by basic fractal decoding, cannot be performed. Because, in the method of the above-described embodiment, when the initial image is a black image (all pixel values are 0), the contrast c is 1 and the brightness b is 0. Because it will remain. Therefore, as described above, this is solved by providing an initial decoded image restoring unit and using a predetermined decoded image as an initial image.

That is, as shown in FIG. 6, for example, an initial decoded image restoring unit 22 is provided, the initial decoded image is restored in this unit, and iterative transform decoding is performed on the image. Even if a high-speed processing method such as copying the value of one pixel in the transform unit in the domain block D _k to the corresponding range block R _{k described} in the embodiment is used, a decoded image with excellent image quality can be obtained. Next, a tenth embodiment of the present invention will be described. In the tenth embodiment of the present invention, a texture restored by a texture decoder is developed in a cache memory built in a drawing processing unit or an external video memory.

That is, in FIG. 13 and FIG. 14, the texture decoder 16 is provided in the constituent parts. This allows
For example, an encoded bit stream (eg, an MPEG or JPEG bit stream) written on a storage
The data is read out according to the instruction of the PU, and is decoded by the texture decoder to restore the texture. The restored texture is immediately stored and held in a predetermined work area of a cache memory built in the drawing processing unit or an external video memory.

Next, an eleventh embodiment of the present invention will be described. FIG. 15 is a block diagram showing a specific example of the entertainment apparatus according to the eleventh embodiment.

The entertainment apparatus shown in FIG. 15 includes a CPU 33 for controlling the entire system, a main memory (system memory) 36 for storing and holding data,
And a chip set 35 for controlling the
5, a graphic chip 34 connected via a high-speed bus 128, a video memory 32 built in or external to the graphic chip 34, and a graphic chip 34
A display unit 31 for displaying image data from a PC (Peripheral Component Component) connected to the chipset 35
interconnect) a bus 37, and iteratively converts and decodes an image in accordance with a drawing command read from the main memory 36 using the graphic chip 34 to generate a texture.

Next, the operation will be described. The graphics chip 34 is connected to an internal or external video memory 32, and the video memory stores and holds the texture drawn by the graphic chip 34. Further, a part called a chipset 34 for controlling the CPU is connected to the CPU 33, and this chipset is connected to the graphic chip 34 via a high-speed bus AGP (Advanced Graphics Port) 128. . This AGP is a term frequently used in the technical field of computers,
It is much faster than the I bus.

Since the chip set 34 is connected to the system memory 36, the graphic chip 34 is connected to the system memory 36 via the chip set 35.
And direct data transfer can be performed at high speed. Therefore, texture drawing can be performed at a much higher speed than in the past.

As described in the previous embodiment, the drawing command for iterative transformation decoding is stored in the system memory 36 in the case of FIG. Then, it is read out from the same part, and the chipset 35 and the A
The data is transferred to the graphic chip 34 via the GP 128. Subsequently, iterative transform decoding is performed in the graphic chip 34, and the generated decoded texture is stored and held in the video memory 32. The texture generated at the same time is output to the display unit 31 and displayed on the screen. The above is the basic operation.

The present invention is not limited to the above-described configuration. For example, a configuration in which a part of the system memory 36 is shared as the texture memory or the video memory 32 is also possible. In this case, a video card (or video board)
Can reduce the capacity of the expensive high-speed video memory 32 mounted on the system, while maintaining high performance without sacrificing the speed of the entire system at all.
This has the effect of reducing costs. Further, when the size of the texture generated by iterative conversion decoding by the graphic chip is large and exceeds the allowable capacity of the video memory 32, by using a part of the system memory 36 as the texture memory or the video memory 32, Since the resources can be effectively used, the performance of the entire system is improved.

The configuration of the specific example described above is based on the latest P
C (personal computer) is a standard equipment. Therefore, the device of the present invention can be realized on an existing PC without adding any special components.

As described above, the entertainer and its method equipped with the image repetitive transform decoding function according to the embodiment of the present invention have, as a basic configuration, a CD-ROM storing an encoded bit stream. A storage medium such as a ROM, a memory for temporarily storing and holding drawing commands and data, a video memory for storing and holding texture data, and a drawing processing unit for generating a texture by repeatedly executing drawing commands And the CP that controls the whole
U.

In such a configuration, the CPU reads the information (bit stream) for iterative conversion decoding written in the storage medium and, for example, according to a command from an attached controller, performs the iterative conversion decoding. The zooming rate and the like are sent to the drawing processing unit. It also has the effect of temporarily storing and holding the command in the memory and updating it at any time according to the processing. The drawing processing unit receives a command group from a memory or a cache connected to the memory, and performs iterative transform decoding described later based on the texture developed in the video memory. The decoded texture is expanded again on the video memory. The video memory is an image memory that stores and holds image data.
Writing is performed from time to time. As a result, it is possible to perform iterative conversion decoding of an image such as a texture at a high speed according to the operation.

The embodiment of the present invention as described above can be applied to an entertainment device such as a game machine. In addition to the game machine, a process for decoding fractal-transform encoded data at a high speed can be performed. The present invention can be applied to required image information processing applications. in this case,
A process of decoding a code word subjected to iterative transformation coding to restore a texture and mapping the restored texture to a polygon having a three-dimensional shape (texture mapping) is performed by expensive hardware using a high-speed CPU or the like. Can be performed at a high speed without using a game, and when applied to an entertainment device such as a game machine, it is possible to realize comfortable responsiveness with better image quality when zooming in on an object shape, for example, The degree of transfer can be increased, and the game can be more enjoyed.

[0074]

According to the present invention, an image is generated by performing an iterative transformation decoding process using the fractal transformation parameters stored in the main storage means, and the image generated by the iterative transformation decoding is stored in the image storage means. , It is possible to generate an image such as texture by performing iterative conversion decoding at high speed.

Further, by providing a plurality of control means (CPU), a video memory, and a drawing processing means and individually allocating them to a plurality of target objects, it is possible to realize a high-speed system as a whole.

Further, by configuring the arithmetic processing unit and the drawing processing unit in one image processing unit, the transfer of texture data is performed in the same processing unit, thereby realizing high speed.
Also, the hardware scale can be reduced by adopting a configuration in the same processing unit.Also, the converted block image is stored and held in a cache memory built in the drawing processing unit each time, and is used for the next conversion processing. By converting the block image read from the cache memory, high speed can be realized.

In addition, since the texture that has been subjected to the iterative transformation decoding is stored and held in a video memory external to the drawing processing unit, a large-capacity video memory can be provided. Can handle any texture.

The image restored by the initial image restoring unit in the drawing processing unit is used as the initial decoded image at the time of the iterative transform decoding. Can be obtained, and the amount of calculation can be significantly reduced.

Further, by overwriting the same work area in the video memory with the texture that has been subjected to the iterative transform decoding, memory consumption can be reduced.

Further, separate work areas in the video memory are prepared in accordance with the zoom ratio of the texture, and the textures subjected to the iterative transformation decoding are stored and held in these work areas, whereby a predetermined zoom ratio is obtained. When using the texture, it can be immediately read from the video memory and used.
Therefore, high-speed drawing / display can be realized.

Further, by synthesizing decoded images of different textures with different zoom rates, a higher quality texture can be generated.

Further, since a decoded image is generated by converting an image obtained by sub-sampling the domain block image, the amount of calculation is small and high speed can be realized. Furthermore, by circulating and changing the pixel position to be subsampled according to the number of repetitions, the image quality of the decoded image can be improved.

Further, by performing iterative transform decoding on the initial decoded image, the number of repetitions required to restore a predetermined image from the conventional pure black initial image can be greatly reduced as compared with the case where iterative transform decoding is performed. Less. This leads to a reduction in processing time, so that the speed is increased.

Further, by providing a high-speed graphics port between the graphic chip and the chipset,
In addition to reading the data in the system memory at high speed, the texture generated by the graphic chip can be written to the video memory or texture memory shared as a part of the system memory at high speed. Therefore, the two advantages of effective use of expensive video memory resources and maintenance of high speed can be utilized.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of an image information processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing that iterative transform decoding is performed on a work area developed in a video memory.

FIG. 3 is a diagram illustrating mapping conversion between a domain block and a range block.

FIG. 4 is a diagram illustrating an example in which the pixel average of a domain block is set to the pixel value of a range block.

FIG. 5 is a block diagram showing a schematic configuration of an apparatus according to a third embodiment of the present invention.

FIG. 6 is a block diagram illustrating a schematic configuration of an iterative transform decoding unit used for a main part of an apparatus according to a fourth embodiment of the present invention.

FIG. 7 is a block diagram illustrating a schematic configuration of an iterative transform encoder corresponding to the iterative transform decoder of FIG. 6;

FIG. 8 is a diagram illustrating a case where an initial image is generated by thinning out pixels.

FIG. 9 is a diagram showing a generated texture of adjacent magnifications.

FIG. 10 is a diagram illustrating that a new texture is generated by combining textures generated at adjacent magnifications.

FIG. 11 is a diagram illustrating that iterative transform decoding is performed on a plurality of work areas developed in a video memory in accordance with different zoom rates.

FIG. 12 is a diagram illustrating an example in which one pixel value in a conversion unit of a domain block is set as a pixel value of a range block.

FIG. 13 is a block diagram illustrating a schematic configuration of an apparatus according to a tenth embodiment of the present invention.

FIG. 14 is a block diagram showing another schematic configuration of the device according to the tenth embodiment of the present invention.

FIG. 15 is a block diagram showing a schematic configuration of an entertainment device according to an eleventh embodiment of the present invention.

FIG. 16 is a block diagram showing a configuration example of a conventional technique.

[Explanation of symbols]

1, 2 CPU, 3 main memory, 4 cache memory, 5 storage medium, 6, 7 drawing processing unit,
8,9 VRAM, 10 Interface, 11
Controller, 12 external memory, 13 image processing unit, 14 arithmetic processing unit, 15 drawing processing unit, 1
6 texture decoder, 17 demultiplexer,
18 domain block generation unit, 19 image conversion / generation unit, 20 image memory unit, 21 control unit, 22
Initial decoded image restoration unit, 23 first block generation unit, 24 second block generation unit, 25 control unit,
26 similarity measurement / threshold processing unit, 27 block information storage unit, 28 initial decoded image generation unit

Claims (26)

[Claims] A main storage unit for storing data including a fractal conversion parameter; a drawing processing unit for generating an image by performing an iterative conversion decoding process using the fractal conversion parameter stored in the main storage unit; An image information processing apparatus comprising: an image storage unit that expands an image generated by the iterative transform decoding; and at least one control unit that controls a process performed by the drawing processing unit. 2. The image information processing apparatus according to claim 1, further comprising a plurality of the drawing processing units, wherein one of the plurality of image processing units is selected and used for each target object. 3. The image information processing apparatus according to claim 1, wherein said drawing processing means includes a dedicated video memory. 4. An image information processing apparatus according to claim 1, further comprising dedicated control means corresponding to each of said drawing processing means. 5. Decompressing an initial image for iterative transformation decoding
2. The image information processing apparatus according to claim 1, further comprising a texture decoder for developing. 6. The image according to claim 1, wherein said drawing processing means includes an iterative transformation decoding means for performing an operation of transforming an image in a block into an image in another block a plurality of times. Information processing device. 7. The iterative transform decoding means stores and holds the converted block image in a cache memory built in the drawing processing means or an external video memory each time, and performs the next conversion processing. The image information processing apparatus according to claim 6, further comprising means for converting a block image read from the cache memory or the video memory. 8. The iterative transform decoding means, when storing and holding the converted block image in a cache memory or an external video memory built in the drawing processing unit, stores the converted block image in the same work area of the memory. The image information processing apparatus according to claim 7, further comprising a unit that overwrites the converted block image. 9. The iterative transform decoding means, when storing and holding the converted block image in a cache memory or an external video memory built in the drawing processing unit, adjusts the block image in accordance with the zoom ratio of the image to be decoded. 8. The image information processing apparatus according to claim 7, further comprising means for writing the converted block image into separate work areas in the memory. 10. The method according to claim 1, wherein said iterative transform decoding means uses an image restored by an initial decoded image restoring unit in a drawing processing unit as a first initial image when transforming an image in a block. 7. The image information processing apparatus according to 6. 11. The iterative transform decoding means, when performing iterative transform decoding with zoom, compares an image generated from a decoded image generated at the most recent zoom rate with a decoded image generated at the current zoom rate. 7. The image information processing apparatus according to claim 6, further comprising: a unit that combines the decoded image with a current zoom ratio. 12. The apparatus according to claim 6, wherein said iterative transform decoding means includes means for transforming an image obtained by sub-sampling an image in a reference source block into an image in another block. The image information processing apparatus according to any one of the preceding claims. 13. The iterative transform decoding means calculates a position of a pixel to be subsampled in an image in the reference source block,
13. The image information processing apparatus according to claim 12, further comprising means for changing the number according to the number of repetitions. 14. The image information processing apparatus according to claim 6, wherein said iterative transform decoding means includes means for copying a part of an image in a reference block to an image in another block. . 15. A texture decoder for decompressing and expanding a texture, wherein the texture restored by the texture decoder is expanded to a cache memory built in a drawing processing unit or an external video memory. 7. The image information processing apparatus according to 6. 16. A step of storing data including a fractal conversion parameter in a main storage means, and a drawing processing step of generating an image by performing an iterative conversion decoding process using the fractal conversion parameters stored in the main storage means. An image information processing method comprising: a step of expanding an image generated by the iterative transform decoding in an image storage unit; and a step of controlling processing by the drawing processing unit. 17. A main storage unit for storing data including a fractal conversion parameter; a drawing processing unit for generating an image by performing an iterative conversion decoding process using the fractal conversion parameter stored in the main storage unit; An image information processing apparatus comprising: an arithmetic processing unit that performs geometric calculation of shape information; and at least one control unit that controls processing performed by the drawing processing unit. 18. The image information processing apparatus according to claim 17, wherein said drawing processing means and said arithmetic processing means are realized by one image processing means or image processing processor. 19. The image information processing apparatus according to claim 17, further comprising a texture decoder for decompressing and expanding the texture. 20. The drawing processing means according to claim 17, wherein said drawing processing means includes an iterative transformation decoding means for performing an operation of transforming an image in a block into an image in another block a plurality of times. Image information processing device. 21. The iterative transformation decoding means stores and holds the transformed block image in a cache memory built in the drawing processing means or an external video memory each time, and performs the next transformation processing. And means for converting a block image read from the cache memory or the video memory.
0. The image information processing apparatus according to 0. 22. The iterative transform decoding means uses an image restored by an initial decoded image restoring unit in a drawing processing unit as a first initial image when transforming an image in a block. 20. The image information processing apparatus according to 20. 23. A step of storing data including a fractal conversion parameter in a main storage unit, and a drawing processing step of generating an image by performing an iterative conversion decoding process using the fractal conversion parameter stored in the main storage unit. An image information processing method, comprising: performing geometric calculation of shape information; and controlling processing by the drawing processing unit. 24. A CPU for performing overall control, a main memory for storing and holding data, a chipset for controlling the CPU, a graphic chip connected to the chipset via a high-speed bus, and a built-in or An external video memory; and a means for performing iterative transform decoding of an image in accordance with a drawing command read from the main memory using the graphic chip to generate a texture. apparatus. 25. The entertainment apparatus according to claim 24, further comprising means for sharing a part of said main memory as a texture memory or a video memory. 26. The system according to claim 26, wherein the main memory and a video memory built in or external to the graphic chip are provided.
3. The apparatus according to claim 2, further comprising means for dispersing the data.
4. The entertainment device according to 4.