JP2000039337A - Abnormality detection device detecting abnormality of rotation angle detection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accurately detect abnormality of a rotation angle detection device of rotating machine based on the modulation signal obtained by detecting resolver output. SOLUTION: The zero points of a reference signal supplied from an oscillator 10 to the primary coil 16 of resolvers 12 and 14 are obtained by a comparator 30. A CPU 34 obtains the period TREF of the reference signal from the interval of the zero points and calculates the TREF/4 point from the zero point as a peak point of the reference signal. At the positions with the same distance at the front and back of the peak P+1 after rising of the zero point signal of the output of the comparator 30, the output S1 and C1 of the resolver 12 are sampled, and at the front and back of the peak P-1 after falling, the output S2 and C2 of the resolver 14 are sampled. By this, 4 resolver signals are sampled in the vicinity of the peak of the reference signal in a channel of A/D converter circuit 40 and so modulated signals sinθ and cosθ with small error are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for detecting an abnormality of a rotation angle detecting device based on a modulation signal contained in an output signal from a resolver, which is a modulation component corresponding to a rotation angle of a rotating machine. The present invention relates to high-precision detection of a modulation signal and improvement in abnormality detection accuracy.

[0002]

2. Description of the Related Art A resolver for detecting a rotation angle of a rotor of a rotating machine is known. The rotation angle detected by the resolver is
It is used for controlling the current of the rotating machine. When a signal of a sine wave sinωt is input to the primary winding of the resolver as a reference signal, output signals modulated according to the rotor rotation angle θ are respectively applied to two secondary windings arranged with a phase difference of 90 °. sinωtsinθ and sinωtcosθ are obtained. For example, an R / D converter (resolver / digital converter) has a reference rotation angle φ controlled by a voltage controlled oscillator.
Is calculated from the signals sinφ, cosφ according to the above and the resolver output signal including the rotor rotation angle θ, and the count corresponding to φ is set so that the phase difference (θ−φ) becomes zero. A PLL (Phase Locked Loop) control for increasing or decreasing the value is performed. Then, φ in a state where the PLL control is converged, that is, in a state of (θ−φ) = 0, is detected and output as a value of the rotor rotation angle θ.

In order to detect an abnormality in the rotation angle detection device for detecting the rotation angle θ by the R / D converter, an abnormality detection device for separately processing the output signal of the resolver is provided.

In this abnormality detecting device, in order to extract information on θ contained in the output signal of the resolver, a reference signal component is removed and a modulated signal sin which amplitude-modulates the reference signal is obtained.
Detection for extracting θ and cos θ is performed. Basically, between these two modulated signals, sin ² θ + cos ²
The relationship of θ = 1 holds. Conventionally, the sum of squares of sin θ and cos θ extracted by detection is calculated, and a fluctuation such that the sum of squares falls below a predetermined threshold occurs, thereby detecting an abnormality such as a break in the harness of the resolver output signal. Was.

Further, there is the following method as a method of approximately utilizing the constant sum of squares relation. In this method, instead of the sum of squares, each modulated signal is subjected to full-wave rectification to obtain an absolute value of each, added together, and then a low-pass filtered signal is used. The signal obtained by adding this absolute value (| sin
θ | + | cos θ |) falls below a predetermined threshold, whereby the above-described abnormality is detected.

Here, the modulation signals sin θ and cos θ are extracted by sequentially sampling the values of the output signal corresponding to the peak position of the reference signal.

Conventionally, in order to sample the value of the output signal at the peak position of the reference signal, a threshold value is set at a level whose absolute value is somewhat smaller than the amplitude of the reference signal, and the point at which the reference signal exceeds the threshold value is set. (When catching the negative peak,
The threshold value is set to a negative value, and the point where the reference signal falls below the threshold value) is approximately set as the peak position. Then, at that timing, the sampling operation of the A / D converter (analog-digital converter) is started, the output signal is sampled and converted into a digital value, and this is used as the value at the peak position.

[0008]

The closer the threshold value is to the peak value of the reference signal, the more accurately the peak position can be determined. However, the amplitude of the reference signal can fluctuate within the range. That is, since the threshold value cannot be sufficiently close to the peak value, the peak position obtained by the conventional method includes an error, which degrades the accuracy of the modulation signal and, consequently, the accuracy and reliability of abnormality detection. There was a problem that there was a possibility.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an abnormality detecting device capable of improving the accuracy of detecting an abnormality in a rotation angle detecting device of a rotating machine by detecting a peak position of a reference signal more accurately. .

[0010]

According to the present invention, there is provided an abnormality detecting apparatus for detecting a zero point of a reference signal, determining the peak position based on an interval between the zero points, and determining the sampling timing. And timing determining means.

The voltage of the reference signal fluctuates symmetrically around a neutral point (zero point), and the zero point appears every half cycle of the reference signal (every 180 degrees in phase). The peak of the reference signal appears at a predetermined position within the interval between adjacent zeros. The predetermined position depends on the signal waveform of the reference signal, but is a middle point between zero points in a generally used sine waveform. According to the present invention, the zero point detecting means detects a zero point of the reference signal, and the timing determining means allocates an interval between the zero points according to the reference signal waveform, and determines a difference between the zero point of the reference signal and the peak position of the reference signal. Find the time interval. The sampling means can accurately sample the peak of the reference signal by sampling the voltage value of the reference signal at a timing delayed from the zero point by the time interval determined in this way.

In the abnormality detecting device according to the present invention, the timing determining means periodically measures and updates the interval between the zero points. According to the present invention, the interval between the zero points is re-measured and updated, so that the peak position can be accurately determined even if the reference signal generation circuit has instability.

In another abnormality detecting apparatus according to the present invention, the timing determining means may adjust the sampling timing for each of the two types of output signals simultaneously output from the resolver in a longitudinally symmetric manner with respect to the peak position. It is characterized in that it is determined according to a pair of timings that are positions.

When the resolver outputs two types of output signals, for example, an output signal modulated by a sine signal sinθ and an output signal modulated by a cosine signal cosθ, it is desirable that the output signals be sampled basically simultaneously. But,
In some cases, such as when there is only one signal processing system such as sampling means, simultaneous sampling cannot be performed. According to the present invention, in such a case, the two types of output signals are processed in a time division manner near the peak position of the reference signal. In addition, the sampling of the voltage value of one output signal is performed a predetermined time before the peak position, and the sampling of the voltage value of the other output signal is performed approximately the same time after the peak position.
By sampling the two types of output signals at the timing sandwiching the peak and equally spaced apart on both sides of the peak, instead of sampling the output signal on either side before or after the peak, Both output signals are sampled at a timing close to the peak position, and the error of the sampling value from the voltage value at the peak position is equalized and suppressed.

In the abnormality detection apparatus according to the present invention, the timing determination means may associate two different peaks in the one cycle of the reference signal with different resolvers, and perform the sampling of the two resolvers. It is characterized in that timing is determined.

In one cycle of the reference signal, two peaks, normal and reverse, appear: a peak whose voltage value is larger than the zero point and a peak whose voltage value is smaller than the zero point. Further, when there are two resolvers that commonly use one reference signal, the sampling of their output signals can be performed at different timings. According to the present invention, the sampling of the output signal of one resolver is performed corresponding to the peak position on the positive side obtained from the interval of the zero point, and the output signal of the other resolver is sampled corresponding to the peak position on the opposite side. Is sampled. The output signal sampled corresponding to each peak position may be one type or two types. By performing sampling at different peak positions, processing for two resolvers can be performed by one signal processing system.

In the abnormality detecting device according to the present invention, the zero point detecting means rises at a first zero point in one cycle of the reference signal and has a second phase shifted by 180 ° from the first zero point. A rectangular wave falling at a zero point is generated, and the timing determining means determines rising and falling of the rectangular wave, and selects the resolver to be sampled based on the determination result. .

According to the present invention, the timing determining means comprises:
The identification of the first zero point and the second zero point, that is, the identification of the two peaks of normal and reverse, can be performed only by observing the direction of the edge of the rectangular wave output by the zero point detecting means. That is,
The timing determination means itself does not need to perform special processing to identify the first and second zeros, and can share the processing performed on the first and second zeros.

Further, the abnormality detecting device according to the present invention is characterized in that it has an abnormality determining means for monitoring the interval between the zero points and judging an abnormality in the reference signal generating circuit based on a change in the interval.

The reference signal generating circuit outputs a reference signal whose frequency is kept within a certain range in a normal state. The reciprocal of that frequency is the period of the reference signal, which is the interval between zeros (accurately, the interval between zeros corresponds to a half period of the reference signal).
Corresponding to According to the present invention, when the interval between the zeros deviates from the value corresponding to the normal frequency by an allowable limit or more, it is determined that the reference signal generation circuit is abnormal.

[0021]

Embodiments of the present invention (hereinafter referred to as embodiments) will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of a rotation angle detection device for a rotating machine according to the present embodiment. Here, the abnormality detection device according to the present invention is configured as an abnormality detection circuit in the rotation angle detection device. The oscillator 10 outputs a reference signal sinωt, which is applied to the primary coil 16 of each of the resolvers 12 and 14. 90 ° between resolvers 12 and 14
Secondary coils 18, 2 arranged with a phase difference of
0, voltages sinωt sinθ and sinωtcosθ in which the reference signal is modulated by the rotation angle θ of a rotating machine such as an electric motor are generated, and these are output signals (resolver signals) from the resolver.
Is output as In the processing of the resolver signal, only the phase poses a problem. Therefore, the reference signal and the resolver signal will be described with an amplitude of 1.

Each resolver signal from the resolver 12 is sent to an abnormality detection circuit 22. Each resolver signal from the resolver 14 is sent to the abnormality detection circuit 22 and the R / D converter 24.

In the R / D converter 24, the processing described in the prior art is performed. That is, the resolver signal sin
ωt sin θ and sin ωt cos θ are multiplied by cos φ and sin φ, respectively, and subtracted to generate sin ωt sin (θ−φ). This is detected based on the reference signal sinωt, and a modulation component sin (θ−φ) is extracted. The R / D converter 24 performs feedback control to increase or decrease the digital count value φ so that the phase (θ−φ) becomes 0. When the feedback control is completed, the count value φ is set as a digital value representing the rotation angle θ, for example, Output to control device.

On the other hand, the abnormality detecting circuit 22 includes a comparator 30 serving as a zero point detecting means, an A / D converter 32 serving as a means for sampling a resolver signal, and a CPU (Central Processing Uniform) for performing various arithmetic processing such as timing determination.
t) 34.

The A / D converter 32 has a function of A / D conversion for one channel.
It comprises a D conversion circuit 40 and a switch circuit 42 for switching an input to the D conversion circuit. Two types of resolver signals of the resolvers 12 and 14 are supplied to four input terminals ch1 to ch4 of the switch circuit 42, respectively. Specifically, the resolver signals sinωtsinθ and sinωtcosθ of the resolver 12 (these signals are S1 and C1) for ch1 and ch2, respectively, and the resolver signals sinωtsinθ and sinω of the resolver 14 for ch3 and ch4, respectively.
tcos θ (these are S2 and C2, respectively) are input. The switch circuit 42 selects one of these A / D
Connect to the conversion circuit 40. That is, the A / D converter 32
Processes the four resolver signals in a time-division manner.

The reference signal output from the oscillator 10 is input to one of two input terminals of the comparator 30, and the other end is grounded. The comparator 30 compares a reference signal that fluctuates positively and negatively about 0 V with a ground potential (0 V), which is a reference potential, and outputs a H (High) level and L (Low) level potential according to the comparison result. Output any rectangular wave. For example, the rectangular wave rises from the L level to the H level at a zero point where the reference signal changes from negative to positive, maintains the H level during the positive period of the reference signal, and the zero point at which the reference signal changes from positive to negative. From H level to L
Level, and the reference signal is maintained at the L level during the negative period, and the rectangular wave is referred to as a zero point signal.

The zero point signal is input to the CPU 34. CP
U34 controls the A / D converter 32 based on the zero point signal, detects a modulated signal from the resolver signal based on the A / D converted value from the A / D converter 32, and further converts the modulated signal. A monitoring process is performed to calculate and detect an abnormality of the rotation angle detecting device.

A major feature of this apparatus lies in a method of detecting a modulated signal. FIG. 2 is an explanatory diagram for explaining the principle of the detection processing in the abnormality detection circuit 22, and shows the waveform of each signal. FIG. 2A shows the reference signal sinωt,
The signal basically has a constant period and amplitude. FIG. 4B shows a zero-point signal output from the comparator 30. The reference signal shown in FIG. 4A is a rectangular wave having an H level during a positive period and an L level during a negative period. The falling timing corresponds to the zero point timing of the reference signal. The CPU 34 can detect the rising edge and the falling edge of the zero signal, count the interval between the zero points by a clock, and measure the time. Thereby, the CPU 34 can obtain the period T _{REF of the} reference signal from the interval between the zero points. By the way, the time from the rise of the zero point signal to the fall is T _REF
/ 2, and the time from the rise of the zero point signal to the next rise is T _REF . For example, T _REF is 100 to 20
It is about 0 μS.

In principle, the midpoint of the interval (T _REF / 2) between a certain zero and its adjacent zero is the peak position of the reference signal. The present invention takes advantage of this fact, and
_Sets the timing at which T _REF / 4 has elapsed from each zero point as the peak position of the reference signal, and performs sampling of the resolver signal based on the peak position. The detection is performed by sampling the voltage value of the resolver signal at the peak position of the reference signal (that is, sinωt = ± 1) in each cycle. For example, the resolver signal sinωtsin shown in FIG.
θ is calculated from the zero point of each cycle (ie, every other zero point) by T
If sampling is performed at a timing after _REF / 4, sin θ (or (−sin
θ)) is obtained. That is, the data sequence obtained by sampling is a signal representing a time change of sin θ (or (−sin θ)). Thus, the resolver signal sinω
A modulated signal sinθ is detected and extracted from tsinθ. Although not shown, the modulation signal cosθ can be detected from the resolver signal sinωtcosθ in the same manner.

Here, one cycle of the reference signal includes sinωt
= 1 and becomes a peak P ₊₁ and sin .omega.t = -1 to become peaks P
There is a _-1, FIG. 2 (c), for example, the peak resolver signal sinωtsinθ from the secondary coil 18 of the resolver 12 P
_The case of sampling at ₊₁ is shown. Also,
FIG. 4C shows an example in which the rotation angle θ of the rotor of the resolver increases in proportion to time.

As described in the prior art, in abnormality detection, the sum of squares (sin ² θ + cos ² θ) and (| sin θ | + | cos
θ |) is used, the modulated signal sin θ
In addition, it is necessary to extract the modulation signal cosθ from the resolver signal sinωtcosθ from another secondary coil 20. Here, the A / D conversion unit 32 is a 2-channel A
/ D conversion circuit, each A / D converter
The conversion circuit can simultaneously sample sin θ and cos θ at the peak P _{+ 1} .

When the A / D converter 32 has a four-channel A / D converter, the sin θ and cos θ of the two resolvers 12 and 14 are simultaneously sampled at the peak P _{+ 1} . be able to. However, the sampling of the resolver signals S1 and C1 for the resolver 12 and the sampling of the resolver signals S2 and C2 for the resolver 14 need not always be performed simultaneously. That is,
As described above, since one peak of the reference signal has two peaks P ₊₁ and P _-1 , the resolver 1
2 and the sampling of the resolver 14 can be allocated. For example, simultaneous sampling of S1 and C1 may be performed at P ₊ 1, and simultaneous sampling of S2 and C2 may be performed at P- ₁ . According to such a configuration, the sampling process for the two resolvers 12 and 14 can be performed only by the two-channel A / D conversion circuit, and the abnormality of the system related to each resolver can be detected.

The abnormality detection circuit 22 according to the embodiment shown in FIG. 1 is configured to sample the four resolver signals in a time-division manner with the one-channel A / D conversion circuit 40 as described above. I have. As a result, the comparator 30 and the A / D converter 3 that constitute the abnormality detection circuit 22
2. The CPU 34 can be common to each channel, and the configuration is simplified. FIG. 3 is an explanatory diagram illustrating a detection process in the abnormality detection circuit 22 using the one-channel A / D conversion circuit 40. FIGS. 3 (a) and 3 (b) are diagrams showing the reference signal sinωt and the zero point signal, respectively, as in FIGS. 2 (a) and 2 (b), and almost one cycle is shown.

When the CPU 34 detects the rising edge and the falling edge of the zero point signal, it counts a predetermined delay time _Td with a delay timer. Specifically, the delay timer is configured to set a count value corresponding to a delay time in a counter, decrement the count value, and activate a predetermined operation at a timing when the value becomes zero. FIG. 3C shows how the count value of the counter constituting the delay timer changes. In this device, at the timing when _{Td has} elapsed from the zero point of the reference signal,
The CPU 34 outputs a channel selection signal and an A / D activation signal to the A / D conversion unit 32. The A / D conversion unit 32 controls the switch circuit 42 based on the channel selection signal.
The two resolver signals (for example, S1 or S2) are supplied to the A / D conversion circuit 40, and the sampling process (required time T _AD ) for the resolver signal is started by the A / D start signal. When the conversion is completed, the A / D converter 32 outputs a digital value as a conversion result to the CPU 34. CPU3
4 obtains the conversion result, outputs a channel selection signal to switch the switch circuit 42, and subsequently performs a sampling process (required time T) for another resolver signal (for example, C1 or C2) from the same resolver. _AD ) is started (see FIG. 3C).

FIGS. 3D to 3G show two resolvers 1.
4 resolver signals S1, C1, S
FIG. 2 is a diagram showing waveforms of C2 and C2 and sampling timing of the voltage. The delay time _Td is determined based on the following conditions. Hereinafter, the sampling timings of the voltages for the resolver signals S1 and C1 are represented by t _S1 and t _S1 , respectively.
The sampling timings of the voltages for t _C1 and the resolver signals S2 and C2 are set to t _S2 and t _C2 , respectively.

(1) t _S1 and t _C1 are distributed before and after the peak P ₊₁ located T _REF / 4 after the rise of the zero point signal. Similarly, t _S2 and t _C2 are divided by T from the fall of the zero point signal. it is distributed before and after the peak P _-1 located after _{REF / 4, (2) t} S1, the temporal distance between the position of t _C1 and the peak P ₊₁ that is as equal as possible to each other, similarly t _S2, t The temporal distance between _C2 and the position of the peak P- ₁ should be as equal to each other as possible.

The A / D converter circuit 40 in the sampling period T _AD, by receiving, for example, signals in a relatively short period of the initial capacitor voltage average value of the signal included in the initial period is obtained , _TAD are subjected to A / D conversion in the relatively long remaining period. For example, if the times t _S1 , t _C1 , t _S2 , and t _{C2 at} which sampling is performed are roughly considered to be simultaneously with the start of each sampling processing period, the present apparatus will use the resolver signals S1, S2 ((d) in FIG. The sampling processing period for (f)) is started at a timing preceding by T _AD / 2 from the peak position, and the resolver signals C1, C2
T _d = (T _REF / 4)-(T _AD / 2) so that the sampling processing period for (e) and (g) in FIG. 14 is started at a timing delayed by T _AD / 2 from the peak position. It is determined. Thus, when the rising timing of the zero point signal is set to the origin of time t, t _S1 = (T _REF / 4)-(T _AD / 2) t _C1 = (T _REF / 4) + (T _AD / 2) t _S2 = (3T _REF / 4)-(T _AD / 2) t _C2 = (3T _REF / 4) + (T _AD / 2)

In the present apparatus, for example, t _S1 and t _C1 are peaks P
The position of ₊₁ is before and after t = (T _REF / 4) (± T _AD / 2), and the errors of the modulation signals sin θ and cos θ due to the shift of the sampling timing from the peak position are equalized. Specifically, sin [theta, respectively symbols the error of cos [theta] [delta] _S, expressed in _{δ C, δ S = sinθ {} sin (π / 2-ωT AD / 2) -1} ≒ -sinθ · (ωT AD / _{^{2) 2/2 δ C =}} sinθ {sin (π / 2 + ωT AD / 2) -1} ≒ -sinθ · (ωT AD / 2) 2/2 becomes a δ _S = δ _C.

If, for example, no consideration is given to the sampling timing of the resolver signal as in the above-described apparatus, the error cannot be equalized, and the error of θ becomes large. As an example where the effect of this device cannot be obtained,
S1 is the peak position _{t = (T RE F / 4} ) samples at, A / D conversion processing for that S1 is completed t =
A case where C1 is sampled by (T _REF / 4) + T _AD will be described.

In this case, the errors δ ′ _S , δ ′ _C of sin θ and cos θ
Is a _{δ 'S = 0 δ' C} = sinθ {sin (π / 2 + ωT AD) -1} ≒ -sinθ · (ωT AD) 2/2 = 4δ C. That is, the error is decreased by [delta] _S with respect to sin [theta, with respect to cosθ increased three times min. Accordingly, (sin ² θ + cos ² θ) or (| sin θ | + | cos θ |)
The error of the value of the evaluation formula used for the abnormality determination also increases, and the abnormality determination accuracy deteriorates.

In the abnormality determination processing, the modulation signal
θ is determined from sin θ and cos θ, and the value is compared with the value of θ determined by the R / D converter. If they do not match with a predetermined accuracy, for example, the possibility of abnormality of the R / D converter is pointed out. It is also possible to perform such processing. In this case, θ
Calculates tan θ from the values of sin θ and cos θ,
It is determined by finding θ corresponding to the value of θ. When sampling is not performed at the same distance before and after the peak when obtaining θ in this manner, first, since the error of sin θ and the error of cos θ are not balanced, tan θ
And the error of θ also increases. Also si
The fact that the error of nθ and cos θ increases in proportion to the square of the distance from the peak position in the vicinity of the peak position also indicates that the error of θ is remarkable when the sampling timing is not considered as in the present apparatus. Cause

For example, when the frequency of the reference signal is 7
kHz, in which case T _REF is about 144 μS. On the other hand, T _AD, the number even in high-speed A / D converter circuit current 40 [mu] S, for example, requires 2～3Myuesu, which is sized to hardly ignored in the evaluation of the error.

On the other hand, the present apparatus performs the sampling under the conditions (1) and (2) to obtain sin θ, cos
The error of θ can be balanced and suppressed, the evaluation formula used for abnormality determination and the error of θ can be suppressed, and the abnormality determination can be performed with high accuracy.

FIG. 4 is a schematic diagram showing an example of a more detailed relationship between the sampling timing of the signal voltage and the sampling processing period. The drawing shows a sampling processing period T _S1 (= T _AD ) for _S1 and a subsequent sampling processing period T _C1 (= T _AD ) for _C1 .
Sampling processing period T by A / D conversion circuit 40
_AD can be divided into a sampling period T _SMP in which a capacitor is charged according to a signal and a period T _{CNV in} which the voltage of the charged capacitor is converted into a digital value. For example, when T _SMP = T _AD / 3, the sampling period T _SMP
After the elapse, the voltage value held in the capacitor is equal to the period T
The average voltage in _SMP , which is approximately T
_This is the voltage at the midpoint of _SMP . Therefore, the actual sampling times t _S1 and t _{C1 for S1} and _C1 are respectively t _S1 = T _AD / 6 and t _C1 = 7T with reference to the top of T _S1 .
_AD / 6. The CPU 34 determines a peak position based on the zero point of the reference signal, and determines the position of the peak P _{+ 1 as} the time t _S1 ,
The delay from the rising edge of the zero signal to the beginning of the sampling period T _S1 so that it is at the midpoint of t _C1 (ie, t _S1 is located a distance of T _AD / 2 before P ₊₁ ). Set the time _Td . In the example shown here, T
_Since the beginning of _S1 is located at a distance of _TAD / 6 before _{tS1, Td} = ( _TREF / 4)-( _TAD / 2)-( _TAD / 6) = ( _TREF / 4). ) − (2T _AD / 3).

As described above, when the CPU 34 detects the rise of the zero point signal from the comparator 30, the delay amount _Td according to the time until P _{+ 1} is set in the counter constituting the delay timer, and as a result of the decrement, When the count value becomes 0, detection processing of the two resolver signals S1 and C1 of the resolver 12 is performed. And
When detecting the falling of the zero point signal from the comparator 30, the CPU 34 sets the counter constituting the delay timer as a delay amount corresponding to the time to P ₋₁ , the same as the delay amount corresponding to the time to P _{+ 1. d} is set again, and as a result of the decrement, when the count value becomes 0, detection processing of the two resolver signals S2 and C2 of the resolver 14 is performed. As described above, when the CPU 34 is configured to detect the rise and fall of the zero point signal and determine the activation of the detection processing for the resolvers 12 and 14 in accordance with each, the processing in the CPU 34 relating to the use of the delay timer is performed. It becomes common and the configuration becomes simple.

Of course, excluding these advantages,
At the rise of the zero point signal, a delay amount (the amount obtained by adding T _REF / 2 to T _d in the above example) corresponding to the time until P _{−1 is set} in the counter constituting the delay timer, and the detection processing for the resolver 12 is performed. And the detection processing for the resolver 14 may be controlled by one continuous count. In this case, for example, a compare register in which a data value (a count value corresponding to T _REF / 2) corresponding to the time of P _{+ 1} is used. Then, the counter starts decrementing, and when the count value decreases by a value corresponding to _Td and reaches the value of the compare register, the detection process for the resolver 12 is started, and the counter continues to decrement and the count value becomes 0. The processing of the CPU 34 is configured to start the detection processing for the resolver 14 at the point in time. Such a configuration is one of the embodiments of the present invention in which the processing configuration is slightly more complicated than the above-described example, but the peak position is determined based on the interval between the zeros of the reference signal and the modulation signal is detected. As in the above example, even if the amplitude of the reference signal fluctuates, the modulation signal can be detected with high accuracy, and abnormality detection can be performed with high accuracy.

Further, the present apparatus has a feature that even if the oscillation frequency of the oscillator for generating the reference signal fluctuates, the modulation signal can be detected with high accuracy and high reliability, and the abnormality can be detected satisfactorily. are doing. The oscillator 10 has a simple C
When the R circuit is used, the oscillation frequency tends to fluctuate, so this feature of the present device is very effective. To realize this, the CPU 34 constantly or periodically measures the interval between the zero points of the reference signal, and monitors the frequency fluctuation of the oscillator 10. Then, when the zero interval of the measurement result is within a range corresponding to the frequency difference allowed for the oscillator 10, for example, the reference signal period T _REF used for the above-described resolver signal detection processing is determined based on the zero interval. Update.
This enables highly accurate θ measurement. On the other hand, if the measured zero point interval fluctuates more than the difference, the CPU 3
4 determines an abnormality of the oscillator 10 and gives a warning, for example. Further, measures such as stopping the system and control are taken. This realizes highly reliable abnormality detection processing.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating a schematic configuration of a rotation angle detection device for a rotating machine according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram illustrating the principle of detection processing in the abnormality detection circuit.

FIG. 3 is an explanatory diagram illustrating detection processing in an abnormality detection circuit that performs time-division processing on four resolver signals using a one-channel A / D conversion circuit.

FIG. 4 is a schematic diagram showing an example of a detailed relationship between a sampling timing of a signal voltage and a sampling processing period.

[Explanation of symbols]

Reference Signs List 10 oscillator, 12, 14 resolver, 16 primary coil, 18, 20 secondary coil, 22 abnormality detection circuit, 2
4 R / D converter, 30 comparators, 32 A
/ D conversion unit, 34 CPU, 40 A / D conversion circuit, 4
2 Switch circuit.

Claims (6)

[Claims] 1. A device for detecting an abnormality of a rotation angle detecting device including a resolver that outputs a signal whose reference signal is amplitude-modulated in accordance with the rotation angle of a rotating machine, wherein the output signal is a peak of the reference signal. Sampling at a timing according to a position, detecting a modulation signal of the amplitude modulation, and detecting an abnormality based on the modulation signal; an abnormality detection device, wherein: a zero point detection unit that detects a zero point of the reference signal; An abnormality detection device, comprising: timing determination means for determining the peak position based on the interval between zero points and determining the timing of the sampling. 2. The abnormality detection device according to claim 1, wherein the timing determination unit periodically measures and updates the interval between the zero points. 3. The abnormality detection device according to claim 1, wherein the timing determination means symmetrically sets the sampling timing for each of the two types of output signals simultaneously output from the resolver with respect to the peak position. The abnormality detection device is determined in accordance with a pair of timings, which are positions of the abnormality detection device. 4. The abnormality detection device according to claim 1, wherein the timing determination unit associates two resolver peaks in one cycle of the reference signal with different resolvers. And determining the sampling timing for each of the two resolvers. 5. The abnormality detection device according to claim 4, wherein the zero point detection means rises at a first zero point in one cycle of the reference signal, and has a phase of 180 ° with the first zero point.
A rectangular wave falling at the shifted second zero point is generated, and the timing determining means determines rising and falling of the rectangular wave, and selects the resolver to be sampled based on the determination result. An abnormality detection device characterized by the above-mentioned. 6. The abnormality detection device according to claim 1, wherein an interval between the zero points is monitored, and an abnormality of the reference signal generation circuit is determined based on a change in the interval. An abnormality detection device comprising: