JP2000032507A - Equalization correction method for subscriber's line characteristic - Google Patents

Equalization correction method for subscriber's line characteristic

Info

Publication number
JP2000032507A
JP2000032507A JP19591598A JP19591598A JP2000032507A JP 2000032507 A JP2000032507 A JP 2000032507A JP 19591598 A JP19591598 A JP 19591598A JP 19591598 A JP19591598 A JP 19591598A JP 2000032507 A JP2000032507 A JP 2000032507A
Authority
JP
Japan
Prior art keywords
line
frequency
subscriber line
amplitude
subscriber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19591598A
Other languages
Japanese (ja)
Inventor
Yukio Ogawa
行雄 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP19591598A priority Critical patent/JP2000032507A/en
Publication of JP2000032507A publication Critical patent/JP2000032507A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To inexpensively set amplitude gain characteristic and frequency characteristic of a subscriber's line at high speed by a simple method by obtaining an attenuation constant and a phase constant of a subscriber's line and equalization correcting the amplitude attenuation characteristics and the frequency characteristics. SOLUTION: A digital phase synchronizing circuit 18 detects/phase compares an information pattern from an output of a low band pass filter 13, controls a frequency division ratio of a fixed frequency oscillator 180 output, receives a clock signal and maintains reproduction. An amplitude attenuation amount and a delay time value of a line are detected white increasing the clock signal inputted to an amplitude detection circuit 20 and a delay time detection circuit 21 from a transducer 10 as a reference, are inputted to an equalization correction amount calculation table 24, the kind of line is specified, an attenuation constant and a phase characteristics are obtained in a use frequency, and the amplitude attenuation characteristics and frequency characteristics of the line are comppehuded. Then, after a variable gain DC amplifier 20 is reset, a high band-pass frequency of a variable high band-pass filter 21 is made to change and is controlled, so that its output voltage value becomes equal to an input voltage of the variable gain DC amplifier 20.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は加入者線路特性の等
化補正方法に関し、詳しくは加入者線路を使用してデジ
タル情報の伝送を行うシステムにおいて、加入者線路に
使用される線径即ち線種を検出することにより実際の線
路の振幅減衰特性と周波数特性とを把握し、簡易な回路
構成により安価にしかも高速に線路を等化補正すること
を可能とする加入者線路特性の等化補正方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for equalizing and correcting the characteristics of a subscriber line, and more particularly, to a system for transmitting digital information using the subscriber line. Equalization correction of subscriber line characteristics, which enables to understand the amplitude attenuation characteristics and frequency characteristics of the actual line by detecting the type, and to enable equalization correction of the line at low cost and high speed with a simple circuit configuration About the method.

【0002】[0002]

【従来の技術】近年、LANおよび事業者のデジタル通
信網を利用したパソコン通信網等の普及により既存の二
線式電話用アナログ加入者線路を使用して安価な双方向
のデジタル情報の伝送が行われている。この加入者線路
は4KHz程度までの音声通信には十分な品質を確保出
来る伝送特性を有しているが、通常10KHz以上の高
域周波数信号の伝送に使用すると、線路が長くなるほど
また周波数がより高くなるほど信号の振幅が減衰するた
め、高速の信号伝送を行うには実際の線路の振幅減衰特
性と周波数特性とを把握してそれを等化的に補正するこ
とが必要となる。
2. Description of the Related Art In recent years, with the spread of LANs and personal computer communication networks using digital communication networks of business operators, inexpensive two-way digital information transmission using existing analog subscriber lines for two-wire telephones has become possible. Is being done. This subscriber line has transmission characteristics that can secure sufficient quality for voice communication up to about 4 KHz, but when used for transmission of high frequency signals of 10 KHz or more, the longer the line, the higher the frequency. As the signal amplitude increases, the signal amplitude attenuates. Therefore, in order to perform high-speed signal transmission, it is necessary to understand the amplitude attenuation characteristics and frequency characteristics of an actual line and to equalize them.

【0003】図3(a)は、従来の加入者線路特性の等
化補正方法を実現するためのシステムの一例を示すブロ
ック図である。同図に示すように、このシステムは一般
の電話加入者とその加入者に直接接続される局との間に
敷設されているアナログの加入者線路を使用してデジタ
ル情報の伝送を行うもので、加入者線種としては線径
0.4mm,0.5mm,0.65mmおよび0.9m
mのものが使用されている。本システムは加入者線路の
局側端と加入者端とを宅内回線終端装置(以下、Did
ital Service Unit=DSU)により終
端し、DSUにそれぞれ局内装置と加入者端末とを接続
し構成している。以下、このシステムの動作を説明す
る。
FIG. 3A is a block diagram showing an example of a system for realizing a conventional method for correcting equalization of subscriber line characteristics. As shown in the figure, this system transmits digital information using an analog subscriber line laid between a general telephone subscriber and a station directly connected to the subscriber. , As subscriber line types, wire diameters of 0.4 mm, 0.5 mm, 0.65 mm and 0.9 m
m are used. The present system connects a station end of a subscriber line and a subscriber end to a home line terminal (hereinafter referred to as Did).
It is terminated by an ital Service Unit (DSU), and each DSU is connected to an in-station device and a subscriber terminal. Hereinafter, the operation of this system will be described.

【0004】DSUは加入者線路と加入者端末および局
内装置との間の信号の形式を変換し、その速度を調整す
るものである。さらに、DSUは内蔵するデジタル等化
部から対向するDSUのデジタル等化部との間でトレ−
ニングシ−ケンスによる信号の送受信を行って、図3
(b)に示すように実際の加入者線路の振幅減衰特性と
周波数特性とを把握し、デジタル伝送に適した特性に等
化補正する機能を備えている。
[0004] The DSU converts the form of a signal between a subscriber line and a subscriber terminal or a central office, and adjusts the speed. Further, the DSU performs a trace between the built-in digital equalizer and the opposing DSU digital equalizer.
By transmitting and receiving signals by the ninging sequence, FIG.
As shown in (b), the function is provided for grasping the actual amplitude attenuation characteristics and frequency characteristics of the subscriber line and performing equalization correction to characteristics suitable for digital transmission.

【0005】図4(a)は従来のDSUに内蔵するデジ
タル等化部1のブロック図である。同図に示すように、
このデジタル等化部1は加入者線路と接続されるトラン
ス10とアナログAGCアンプ11とA/D変換器12
と低域通過フィルタ(以下,LPF)13とこの等化部
1に必要なクロックを伝送情報の中から受信し再生する
デジタル位相同期回路(以下,DPLL)18を備えた
適応デジタルフィルタ(以下、ADF)14とインタ−
フェイス回路(以下、INTF)15とを直列に接続す
ると共に、アナログAGCアンプ11入力端とADF1
4出力端との間に送信信号駆動回路16を並列に挿入
し、LPF13出力とアナログAGCアンプ11入力と
の間にAGC制御回路17を挿入して構成したものであ
る。図4(b)は前記ADF14のブロックの一例を示
したもので、多数のレジスタ等の遅延器140を直列に
接続し所定の遅延器140から取り出した出力にタップ
係数141(重み付け)を乗じてそれらを加算する累積
加算器142の出力をADF14出力として識別判定回
路143に供給し得られた識別出力とADF14出力と
の間の誤差信号をタップ係数141にフィ−ドバックし
てその誤差量を制御して最小化するよう構成している。
図4(c)は前記DPLL18のブロックの一例を示し
たもので、固定周波数発振器出力180を可変分周器1
81入力に接続しADF14出力をパタン検出器182
と位相比較器183とル−プフィルタ184との直列回
路に供給しル−プフィルタ184の出力により可変分周
器181出力を制御して所定のクロック信号を受信し再
生するよう構成している。以下、図示した従来のデジタ
ル等化部1についてその動作を詳細に説明する。
FIG. 4A is a block diagram of a digital equalizer 1 incorporated in a conventional DSU. As shown in the figure,
The digital equalizer 1 includes a transformer 10 connected to a subscriber line, an analog AGC amplifier 11 and an A / D converter 12
And a low-pass filter (hereinafter, LPF) 13 and a digital phase-locked loop (hereinafter, DPLL) 18 for receiving and reproducing a clock necessary for the equalizer 1 from transmission information. ADF) 14 and interface
A face circuit (hereinafter referred to as INTF) 15 is connected in series, and an input terminal of the analog AGC amplifier 11 and the ADF 1
The transmission signal drive circuit 16 is inserted in parallel with the four output terminals, and the AGC control circuit 17 is inserted between the output of the LPF 13 and the input of the analog AGC amplifier 11. FIG. 4B shows an example of the block of the ADF 14. The delay unit 140 such as a large number of registers is connected in series, and an output extracted from the predetermined delay unit 140 is multiplied by a tap coefficient 141 (weighting). The output of the accumulator 142 for adding them is supplied as an ADF 14 output to the discrimination determination circuit 143, and the error signal between the obtained discrimination output and the ADF 14 output is fed back to the tap coefficient 141 to control the error amount. And minimize it.
FIG. 4C shows an example of the block of the DPLL 18, in which the fixed frequency oscillator output 180 is connected to the variable frequency divider 1
ADF14 output is connected to 81 inputs and pattern detector 182
, A phase comparator 183 and a loop filter 184, and the output of the loop filter 184 controls the output of the variable frequency divider 181 to receive and reproduce a predetermined clock signal. Hereinafter, the operation of the illustrated conventional digital equalizer 1 will be described in detail.

【0006】加入者線路を使用するデジタル情報伝送シ
ステムには、送受信信号を交互に時分割的に伝送するピ
ンポン伝送方式と、送受信信号を同時に伝送し、二線・
四線変換部における送信信号の回り込み分を打ち消すエ
コ−キャンセラ方式等があるが、ここでは二線の加入者
線路を用いたピンポン伝送方式を例にしてその動作を説
明する。対向するDSUのデジタル等化部1の送信信号
駆動回路16からは、加入者線路には信号の1”と0”
を正負両極パルスに対応させて1フレ−ム内のビット数
を偶数になるよう調整して直流成分の変動を除去した約
320KBPSのAMI(Altenate Mark
Inversion)符号化したトレ−ニングシ−ケン
スが伝送され、受信側DSUのデジタル等化部1のトラ
ンス10を通してアナログAGCアンプ11により増幅
後A/D変換器12にてデジタル信号化しLPF13で
波形整形後ADF14に供給する。ADF14はLPF
13の出力を受けてその信号振幅のピ−ク値を検出しそ
の両側が同じ振幅となるようにLPF13出力とアナロ
グAGCアンプ11入力との間に挿入したAGC制御回
路17を制御してLPF13出力を常に所定値に保持す
るよう加入者線路の振幅減衰特性に対して振幅利得特性
を粗調整する。このLPF13出力を多段構成の遅延器
140に入力し、それらの多段の遅延器140出力に所
定のタップ係数141を乗じた出力を累積加算して取り
出したADF14出力を予め設定した振幅利得特性と周
波数特性とに対して識別判定を行って得られた信号の
1”、0”識別出力とADF14出力との間で発生する
誤差信号をタップ係数141にフィ−ドバックしてその
誤差量が最小となるように制御して利得および周波数特
性の微調整を行うと共に、ADF14出力をDPLL1
8に供給して所定の情報パタ−ンを検出、位相比較しそ
の位相差をル−プフィルタ184から高精度の固定発振
器180出力が入力された可変分周器181に供給しそ
の分周比を制御して常に一定周期の所定のクロック信号
を維持する。このように、ADF14の遅延器140出
力のタップ係数141を順次変更して上記の動作を繰り
返すことにより、所望の利得および周波数特性を取得し
デジタル等化部1をそれに適応させることが出来る。上
記により、受信側DSUの等化補正が完了すれば、受信
側DSUのデジタル等化部1の送信信号駆動回路16に
より対向するDSUのデジタル等化部1にAMI符号化
したトレ−ニングシ−ケンスが送出され同様な手順によ
り等化補正を行う。
A digital information transmission system using a subscriber line includes a ping-pong transmission system in which transmission and reception signals are alternately transmitted in a time-division manner, and a two-wire transmission system in which transmission and reception signals are simultaneously transmitted.
Although there is an eco-canceller system or the like for canceling the wraparound of the transmission signal in the four-wire converter, the operation will be described here by taking a ping-pong transmission system using a two-wire subscriber line as an example. From the transmission signal drive circuit 16 of the digital equalizer 1 of the opposing DSU, signals 1 "and 0" are sent to the subscriber line.
Approximately 320 KBPS AMI (Alternate Mark) in which the number of bits in one frame is adjusted to be an even number in correspondence with the positive and negative bipolar pulses and the DC component fluctuation is removed.
Inversion) The encoded training sequence is transmitted, amplified by the analog AGC amplifier 11 through the transformer 10 of the digital equalizer 1 of the receiving side DSU, converted into a digital signal by the A / D converter 12, and subjected to waveform shaping by the LPF 13. Supply to ADF14. ADF14 is LPF
The AGC control circuit 17 inserted between the output of the LPF 13 and the input of the analog AGC amplifier 11 is controlled so that the peak value of the signal amplitude is detected in response to the output of the LPF 13 and the two sides have the same amplitude. Of the subscriber line is roughly adjusted with respect to the amplitude attenuation characteristic of the subscriber line so as to always maintain a predetermined value. The output of the LPF 13 is input to the delay unit 140 having a multi-stage configuration, and the output of the multi-stage delay unit 140 multiplied by a predetermined tap coefficient 141 is cumulatively added. The error signal generated between the 1 ", 0" discrimination output of the signal obtained by performing discrimination judgment on the characteristic and the output of the ADF 14 is fed back to the tap coefficient 141 to minimize the error amount. Control and fine adjustment of the gain and frequency characteristics as well as the output of the ADF 14 to the DPLL 1
8, a predetermined information pattern is detected, the phases are compared, and the phase difference is supplied from a loop filter 184 to a variable frequency divider 181 to which the output of a high-precision fixed oscillator 180 is input. By controlling, a predetermined clock signal having a constant period is always maintained. In this way, by sequentially changing the tap coefficient 141 of the output of the delay unit 140 of the ADF 14 and repeating the above operation, it is possible to obtain a desired gain and frequency characteristic and adapt the digital equalizer 1 to it. As described above, when the equalization correction of the receiving DSU is completed, the transmission sequence driving circuit 16 of the digital equalizing section 1 of the receiving DSU AMI-encodes the training sequence in which the digital equalizing section 1 of the opposing DSU has been encoded. Is transmitted and the equalization correction is performed by the same procedure.

【0007】[0007]

【発明が解決しようとする課題】しかしながら以上説明
したような従来の加入者線路の等化補正方法では、加入
者線路の振幅減衰特性と周波数特性とを正確に等化補正
するにはデジタル等化部1に加入者線路の特性に見合う
全ての振幅利得特性と周波数特性とを用意しなければな
らず、その結果ADF14を多段の遅延器140と多数
のタップ係数141との組み合わせにより実現する必要
があるためADF14が複雑で高価な回路となりしかも
加入者線路を所定の振幅利得および周波数特性に収束さ
せるまでの間、トレ−ニングシ−ケンスの送受信を繰り
返し行うことになり処理時間(対向分の等化補正を含め
て約数百ms以上)が遅くなるという問題点があった。
本発明は上述したような従来の加入者線路の等化補正方
法に係わる諸問題を解決するためになされたものであっ
て、機器及びまたはシステム構成を複雑にすることなく
簡易な方法により安価で高速に(対向分の等化補正を含
めて数十ms程度)加入者線路の振幅利得特性と周波数
特性とを設定することを可能とした加入者線路の等化補
正方法を提供することを目的とする。
However, in the conventional equalization correction method for the subscriber line as described above, digital equalization is required to accurately equalize the amplitude attenuation characteristic and the frequency characteristic of the subscriber line. All amplitude gain characteristics and frequency characteristics matching the characteristics of the subscriber line must be prepared in the section 1. As a result, it is necessary to realize the ADF 14 by combining a multi-stage delay unit 140 and a large number of tap coefficients 141. For this reason, the ADF 14 becomes a complicated and expensive circuit, and the transmission and reception of the training sequence are repeated until the subscriber line converges to the predetermined amplitude gain and frequency characteristics. There is a problem that the delay is about several hundred ms or more including the correction).
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems associated with the conventional subscriber line equalization correction method, and is inexpensive by a simple method without complicating the equipment and / or system configuration. An object of the present invention is to provide an equalization correction method for a subscriber line that enables the amplitude gain characteristic and frequency characteristic of the subscriber line to be set at high speed (about several tens of ms including equalization correction for the opposing part). And

【0008】[0008]

【課題を解決するための手段】上述の目的を達成するた
め本発明においては、加入者線路の局側端と加入者端に
対向配置されたDSU内のデジタル等化部により、加入
者線路の振幅減衰特性と周波数特性とを等化補正してデ
ジタル情報の伝送を行うシステムの加入者線路の等化補
正方法において、加入者線路における振幅減衰量と遅延
時間値とを検出して加入者線路の線種を特定することに
より加入者線路の減衰定数と位相定数とを求め、これら
に基づき振幅減衰特性と周波数特性とを等化補正するこ
とを特徴とする加入者線路特性を等化補正することが出
来る手段である。
In order to achieve the above-mentioned object, according to the present invention, a digital equalization unit in a DSU disposed opposite to a station side end of a subscriber line and a subscriber end is provided. In a method of equalizing correction of a subscriber line in a system for transmitting digital information by equalizing and correcting amplitude attenuation characteristics and frequency characteristics, a subscriber line is detected by detecting an amplitude attenuation and a delay time value in the subscriber line. The line type is specified to determine the attenuation constant and the phase constant of the subscriber line, and based on these, the amplitude attenuation characteristic and the frequency characteristic are equalized and corrected. It is a means that can do.

【0009】[0009]

【発明の実施の形態】以下、図示した実施の形態に基づ
いて本発明を詳細に説明する。図1(a)(b)は、本
発明の加入者線路の等化補正方法を実現するためのDS
Uに内蔵する簡易等化部2の一実施例を示すブロック図
である。但し、図1(a)(b)に示す回路で図4
(a)〜(c)と同一のものには図4(a)〜(c)に
付与したのと同じ符号を使用する。図1(a)に示すよ
うに、加入者線路を適正なインピ−ダンスに終端するト
ランス10と可変利得直流アンプ20と可変高域通過フ
ィルタ21とA/D変換器12とLPF13とINTF
15とを直列に接続したものに可変利得直流アンプ20
入力端とLPF13出力端との間に送信信号駆動回路1
6を並列に挿入し、トランス10の出力端に振幅検出回
路22および遅延時間検出回路23の入力端を並列に接
続しそれぞれの出力を等化補正量算出テ−ブル24に入
力しその出力信号により可変利得直流アンプ20と可変
高域通過フィルタ21とを制御するよう接続し、LPF
13出力をDPLL18に供給してクロック信号を再生
し振幅検出回路22と遅延時間検出回路23に供給する
よう構成している。図1(b)は可変利得直流アンプ2
0と可変高域通過フィルタ21の一実施例の回路を示し
たものでR2とR4を電子制御ボリュ−ム等を用いて制
御することにより直流アンプ20の利得と高域通過フィ
ルタ21の遮断周波数を変化させ実際の線路特性を等化
補正するものである。本発明の簡易等化部2は使用周波
数が高い場合、実際線路の周波数に対する減衰特性が図
3(b)に示すように約10KHz以上では√f特性で
表わされこの特性は高域通過フィルタ21の遮断周波数
を定めることにより補正可能であることを利用してなさ
れたものである。以下、図示した実施例についてその動
作を詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on illustrated embodiments. FIGS. 1A and 1B show a DS for realizing the subscriber line equalization correction method of the present invention.
FIG. 4 is a block diagram showing one embodiment of a simplified equalization unit 2 incorporated in U. However, the circuit shown in FIGS.
4 (a) to 4 (c) are denoted by the same reference numerals as in FIGS. 4 (a) to 4 (c). As shown in FIG. 1A, a transformer 10, a variable gain DC amplifier 20, a variable high-pass filter 21, an A / D converter 12, an LPF 13, an INTF for terminating a subscriber line to an appropriate impedance.
15 and a variable gain DC amplifier 20 connected in series.
Transmission signal driving circuit 1 between input terminal and LPF 13 output terminal
6 are connected in parallel, the input terminals of the amplitude detection circuit 22 and the delay time detection circuit 23 are connected in parallel to the output terminal of the transformer 10, and the respective outputs are input to the equalization correction amount calculation table 24, and the output signal is output. Connected to control the variable gain DC amplifier 20 and the variable high-pass filter 21 by the
13 is supplied to the DPLL 18 to reproduce a clock signal, and to supply the clock signal to the amplitude detection circuit 22 and the delay time detection circuit 23. FIG. 1B shows a variable gain DC amplifier 2
The circuit of one embodiment of 0 and the variable high-pass filter 21 is shown. By controlling R2 and R4 using an electronic control volume or the like, the gain of the DC amplifier 20 and the cut-off frequency of the high-pass filter 21 are controlled. Is changed to equalize and correct the actual line characteristics. When the used frequency is high, the simplified equalizer 2 of the present invention has an attenuation characteristic with respect to the frequency of the actual line as a Δf characteristic at about 10 kHz or more as shown in FIG. This is performed by utilizing the fact that the correction can be performed by setting the cutoff frequency of 21. Hereinafter, the operation of the illustrated embodiment will be described in detail.

【0010】対向するDSU簡易等化部2の送信信号駆
動回路16からは、前述の約320KBPSのAMI符
号化したトレ−ニングシ−ケンスが伝送され、受信側D
SU簡易等化部2のトランス10を通し初期設定した振
幅利得値と高域通過周波数とを持つ可変利得直流アンプ
20と可変高域通過フィルタ21とを通過してA/D変
換器12によりデジタル信号化しLPF13で波形整形
後DPLL18に供給される。DPLL18はLPF1
3の出力を受けてデジタル化したトレ−ニングシ−ケン
スを受信して所定の情報パタ−ンを検出、位相比較して
その位相差を用いて高精度の固定発振器180出力の分
周非比を制御して常に約320BPSのクロック信号を
受信し再生を維持する。一方、トレ−ニングシ−ケンス
は同時にトランス10から振幅検出回路20と遅延時間
検出回路21に入力されDPLL18のクロック信号の
立ち上がりを基準として線路の振幅減衰量と遅延時間値
とを検出して等化補正量算出テ−ブル24に入力し、予
め加入者線として使用される線種の線径毎に容易した線
路の振幅減衰量と遅延時間値とを対比させたテ−ブルか
らその線路の線種を特定し、さらに別のテ−ブルより使
用周波数における減衰定数α(dB/Km)と位相特性
β(rad/Km)とを求めることにより使用する線路
の振幅減衰特性と周波数特性とが把握出来、初期設定し
た振幅利得値を実際の線路の特性に合わせて可変利得直
流アンプ20に再設定後可変高域通過フィルタ21の高
域通過周波数を変化させてその出力電圧値が可変利得直
流アンプ20の入力電圧値に等しくするよう制御すれば
加入者線路の等化補正が完了する。この等化補正完了以
後は受信した信号をINTF15から加入者端末または
局内装置に供給しこの相互間においてデジタル情報の伝
送が可能となる。上記により受信側のDSUの等化補正
が完了すれば、受信側DSUの簡易等化部2の送信信号
駆動部16により対向するDSUの簡易等化部2にAM
I符号化したトレ−ニングシ−ケンスが送出され同様な
手順により等化補正を行う。次に、本発明の実施例であ
る簡易等化部2の振幅検出回路22と遅延時間検出回路
23の動作、および可変利得直流アンプ20と可変高域
通過フィルタ21への利得と周波数特性の設定方法につ
いて、本発明に係わる加入者線路の減衰量と遅延時間の
検出を説明するための図2(a)〜(d)を用いて詳細
に説明する。
From the transmission signal drive circuit 16 of the opposite DSU simple equalizer 2, the above-mentioned AMI-encoded training sequence of about 320 KBPS is transmitted, and
The signal passes through a variable gain DC amplifier 20 having an initially set amplitude gain value and a high-pass frequency and a variable high-pass filter 21 through a transformer 10 of the SU simple equalizing unit 2 and is digitalized by an A / D converter 12. The signal is converted into a signal, and is supplied to the DPLL 18 after waveform shaping by the LPF 13. DPLL18 is LPF1
3 and receives the digitized training sequence, detects a predetermined information pattern, compares the phases, and uses the phase difference to determine the frequency non-ratio of the output of the fixed oscillator 180 with high accuracy. It controls to constantly receive a clock signal of about 320 BPS and maintain reproduction. On the other hand, the training sequence is simultaneously input from the transformer 10 to the amplitude detection circuit 20 and the delay time detection circuit 21 to detect and equalize the amplitude attenuation and the delay time value of the line with reference to the rising edge of the clock signal of the DPLL 18. A correction amount calculation table 24 is input to a table for comparing the amplitude attenuation amount and the delay time value of the line for each line type of the line used as the subscriber line in advance. The amplitude attenuation characteristic and the frequency characteristic of the line to be used are grasped by specifying the type and obtaining the attenuation constant α (dB / Km) and the phase characteristic β (rad / Km) at the operating frequency from another table. After that, the initially set amplitude gain value is reset to the variable gain DC amplifier 20 according to the characteristics of the actual line, and then the high pass frequency of the variable high pass filter 21 is changed so that the output voltage value becomes If the control is performed so as to be equal to the input voltage value of the variable gain DC amplifier 20, the equalization correction of the subscriber line is completed. After the completion of the equalization correction, the received signal is supplied from the INTF 15 to the subscriber terminal or the intra-office device, and digital information can be transmitted between them. When the equalization correction of the DSU on the receiving side is completed as described above, the transmission signal driving unit 16 of the simple equalizing unit 2 on the receiving side transmits the AM to the simple equalizing unit 2 of the opposite DSU.
The I-coded training sequence is sent out, and equalization correction is performed in the same procedure. Next, the operation of the amplitude detection circuit 22 and the delay time detection circuit 23 of the simplified equalizer 2 according to the embodiment of the present invention, and setting of the gain and frequency characteristics for the variable gain DC amplifier 20 and the variable high-pass filter 21 The method will be described in detail with reference to FIGS. 2A to 2D for describing the detection of the attenuation and the delay time of the subscriber line according to the present invention.

【0011】図2(a)の入力信号は図1(a)の振幅
検出回路22および遅延時間検出回路23の入力信号で
あり、その波形と図1(a)のDPLL18のクロック
出力とのタイミングを図2(b)に示す。振幅検出回路
22は入力される受信信号波形をA/D変換したデジタ
ル値からピ−ク電圧値Vrpを計測し対向するDSUか
ら加入者線路に送出したトレ−ニングシ−ケンスのピ−
ク電圧値Vspと比較してその比Vsp/Vrpから線
路の振幅減衰量を算出し、またこのデジタル値を用いて
Vrpを発生する点の時刻Trpと受信信号波形値がゼ
ロとなるVro点の時刻Troを計測しその差Trp−
Troから線路の遅延時間値を算出し、図2(c)に一
例を示すように、予め作成してある加入者線の線径をパ
ラメ−タとした振幅減衰量と遅延時間値とのテ−ブルを
参照して該当する線種の線径が求まり、さらに図2
(d)から加入者線路を二線平衡ケ−ブルの分布定数回
路とした時の使用周波数におけるその線種特有の二次定
数である減衰定数α(dB/Km)と位相特性β(ra
d/Km)とを求めて可変利得直流アンプ20の利得特
性を設定後可変高域通過フィルタ21の遮断周波数特性
を変化させてその出力電圧値が可変利得直流アンプ20
の入力電圧値に等しくなるよう調整して等化補正するの
である。例えば、 振幅減衰量=Vsp/Vro=100(40dB) 遅延時間値=Trp−Tsp=1.5μs の時、図2(c)より線径0.5mmの線種と特定され
るので、図2(d)より使用周波数約300KHzの減
衰定数α=11.0dB/Km、位相定数β=11.0
rad/Kmが求められ、線路長=40/11=3.6
4Kmが得られる。即ち、この加入者線路は線径0.5
mmの線種であり、線路長3.64Kmの点において、
使用周波数約300KHz時の振幅減衰量=40dBと
位相変化量=40radとを等化補正する必要があり、
図1(b)の可変利得直流アンプ20のR2により利得
を40dBに設定し、可変高域通過フィルタ21のR4
を変化させてその出力値=Vrpになればこの線路の等
化補正が完了する。尚、線種のちがいにより同一使用周
波数における周波数特性に利得の増減が生じるため、R
4だけでこの増減がカバ−出来ない場合はR5を半固定
化して線種毎に利得の増減分を設定後にR4を変化させ
て上記の等化補正をすればよい。
The input signal of FIG. 2A is the input signal of the amplitude detection circuit 22 and the delay time detection circuit 23 of FIG. 1A, and the timing between the waveform and the clock output of the DPLL 18 of FIG. Is shown in FIG. The amplitude detection circuit 22 measures a peak voltage value Vrp from a digital value obtained by A / D conversion of an input received signal waveform, and outputs a peak of a training sequence transmitted from the opposite DSU to the subscriber line.
The amplitude attenuation of the line is calculated from the ratio Vsp / Vrp in comparison with the voltage Vsp, and using this digital value, the time Trp at which Vrp is generated and the point Vro at which the received signal waveform value becomes zero are obtained. Time Tro is measured and the difference Trp−
The delay time value of the line is calculated from Tro, and as shown in an example in FIG. 2 (c), a table of the amplitude attenuation amount and the delay time value with the diameter of the subscriber line prepared in advance as a parameter. 2, the wire diameter of the corresponding wire type is determined with reference to FIG.
From (d), when the subscriber line is a distributed constant circuit of a two-wire balanced cable, the attenuation constant α (dB / Km) and the phase characteristic β (ra), which are secondary constants specific to the line type at the operating frequency, are used.
d / Km), the gain characteristic of the variable gain DC amplifier 20 is set, the cutoff frequency characteristic of the variable high-pass filter 21 is changed, and the output voltage value is
Is adjusted so as to be equal to the input voltage value of Eq. For example, when the amplitude attenuation amount = Vsp / Vro = 100 (40 dB) and the delay time value = Trp−Tsp = 1.5 μs, the line type is specified as 0.5 mm in FIG. From (d), the attenuation constant α = 11.0 dB / Km and the phase constant β = 11.0 at the operating frequency of about 300 kHz.
rad / Km is obtained, and the line length = 40/11 = 3.6.
4 km is obtained. That is, this subscriber line has a wire diameter of 0.5
mm, and at a line length of 3.64 km,
It is necessary to equalize and correct the amplitude attenuation amount at the use frequency of about 300 KHz = 40 dB and the phase change amount = 40 rad.
The gain is set to 40 dB by R2 of the variable gain DC amplifier 20 shown in FIG.
Is changed and the output value becomes equal to Vrp, the equalization correction of this line is completed. It should be noted that a gain may increase or decrease in the frequency characteristic at the same use frequency due to the difference in line type.
If the increase / decrease cannot be covered by only 4, the above-mentioned equalization correction can be made by changing R4 after semi-fixing R5 and setting the gain increase / decrease for each line type.

【0012】[0012]

【発明の効果】本発明は既存のアナログ加入者線路の線
径をトレ−ニングシ−ケンスを用いて特定することによ
り、実際線路の特性を推定して等化補正するもので、簡
易な回路構成でしかも高速動作が可能であり、従来の加
入者線路特性の等化補正方法と比較してその効果は大で
ある。
According to the present invention, the line diameter of an existing analog subscriber line is specified by using a training sequence to estimate the characteristics of the actual line and perform equalization correction. In addition, high-speed operation is possible, and the effect is large as compared with the conventional equalization correction method for the subscriber line characteristics.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係わる加入者線路の等価補正方法を実
現するための簡易等化部のブロック図である。
FIG. 1 is a block diagram of a simplified equalizer for realizing a subscriber line equivalent correction method according to the present invention.

【図2】本発明に係わる加入者線路の振幅減衰量と遅延
時間値の検出を説明するための図である。
FIG. 2 is a diagram for explaining detection of an amplitude attenuation amount and a delay time value of a subscriber line according to the present invention.

【図3】従来の加入者線路を使用するデジタル情報伝送
システムの一例を示すブロックである。
FIG. 3 is a block diagram showing an example of a conventional digital information transmission system using a subscriber line.

【図4】従来の加入者線路特性の等化補正方法を実現す
るためのデジタル等化部のブロック図である。
FIG. 4 is a block diagram of a digital equalizer for realizing a conventional equalization correction method for subscriber line characteristics.

【符号の説明】[Explanation of symbols]

1…デジタル等化部、2…簡易等化部、3〜9…欠番、
10…トランス,11…アナログAGCアンプ、12…
A/D変換器,13…低域通過フィルタ(LPF)、1
4…適応デジタルフィルタ(ADF)、15…、インタ
−フェイス回路(INTF)、16…送信信号駆動回
路、17…AGC制御回路、18…デジタル位相同期回
路(DPLL)、19…欠番、20…可変利得直流アン
プ、21…可変高域通過フィルタ、22…振幅検出回
路、23…遅延時間検出回路、24…等化補正量算出テ
−ブル、140…遅延器、141…タップ係数、142
…累積加算器、143…識別判定回路、180…固定周
波数発振器、181…可変分周器、182…パタン検出
器器、183…位相比較器、184…ル−プフィルタ、
1: Digital equalizer, 2: Simple equalizer, 3-9: missing number,
10 Transformer 11 Analog AGC amplifier 12
A / D converter, 13 ... Low-pass filter (LPF), 1
4: Adaptive digital filter (ADF), 15: Interface circuit (INTF), 16: Transmission signal drive circuit, 17: AGC control circuit, 18: Digital phase-locked loop (DPLL), 19: Missing number, 20: Variable Gain DC amplifier, 21: variable high-pass filter, 22: amplitude detection circuit, 23: delay time detection circuit, 24: equalization correction amount calculation table, 140: delay unit, 141: tap coefficient, 142
···········································································································································

フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H04B 3/48 H04B 3/48 H04L 12/02 H04L 11/02 Z Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat II (Reference) H04B 3/48 H04B 3/48 H04L 12/02 H04L 11/02 Z

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】加入者線路の局側端と加入者端に対向配置
された宅内回線終端装置内のデジタル等化部により、前
記加入者線路の振幅減衰特性と周波数特性とを等化補正
してデジタル情報の伝送を行うシステムに対する加入者
線路特性の等化補正方法において、前記加入者線路にお
ける振幅減衰量と遅延時間値とを検出して前記加入者線
路の線種を特定することにより前記加入者線路の減衰定
数と位相定数とを求め、これらに基づき前記振幅減衰特
性と周波数特性とを等化補正することを特徴とする加入
者線路特性の等化補正方法。
1. A digital equalizer in a home line terminal disposed opposite to a station end of a subscriber line and a subscriber end to equalize and correct an amplitude attenuation characteristic and a frequency characteristic of the subscriber line. In the method for equalizing and correcting the subscriber line characteristic for a system for transmitting digital information, the method includes detecting an amplitude attenuation and a delay time value in the subscriber line and specifying a line type of the subscriber line. A method for equalizing and correcting subscriber line characteristics, wherein an attenuation constant and a phase constant of a subscriber line are obtained, and the amplitude attenuation characteristic and the frequency characteristic are equalized and corrected based on the attenuation constant and the phase constant.
JP19591598A 1998-07-10 1998-07-10 Equalization correction method for subscriber's line characteristic Pending JP2000032507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19591598A JP2000032507A (en) 1998-07-10 1998-07-10 Equalization correction method for subscriber's line characteristic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19591598A JP2000032507A (en) 1998-07-10 1998-07-10 Equalization correction method for subscriber's line characteristic

Publications (1)

Publication Number Publication Date
JP2000032507A true JP2000032507A (en) 2000-01-28

Family

ID=16349112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19591598A Pending JP2000032507A (en) 1998-07-10 1998-07-10 Equalization correction method for subscriber's line characteristic

Country Status (1)

Country Link
JP (1) JP2000032507A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6922842B2 (en) * 2000-12-12 2005-07-26 Teac Corporation Optical pick-up device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6922842B2 (en) * 2000-12-12 2005-07-26 Teac Corporation Optical pick-up device

Similar Documents

Publication Publication Date Title
JP3310664B2 (en) Equalization method and equalization system for data communication system
AU663442B2 (en) Method and apparatus for transmission path delay measurements using adaptive demodulation
US5533048A (en) Apparatus and method for compensating for limiter induced non-linear distortion in a wireless data communication system
JP4727303B2 (en) Mixed-mode adaptive analog reception architecture for data communication
JP3490712B2 (en) Apparatus and method for controlling transmission power of a modem
JP4672229B2 (en) Method and apparatus for performing a training phase of adaptive channel equalization on a digital communication path
JP2005503093A (en) Transmission amplitude independent adaptive control equalizer
US20080096500A1 (en) Method for Calibrating Automatic Gain Control in Wireless Devices
JPH02172333A (en) Communication system and communication method
EP0334867A1 (en) Duplex data transmission.
CA1215487A (en) Digital voice transmission having improved echo suppression
JP2001332999A (en) Training circuit, model device and communications equipment for adaptive equalizer
CA1104694A (en) Method and apparatus for regenerating a modified duobinary signal
US5381475A (en) Arrangement for suppressing echoes in a digital portable telephone
EP1000469B1 (en) Cable interface for data and power supply
EP0592747B1 (en) Adaptive equalizing apparatus and method for token ring transmission systems using unshielded twisted pair cables
US20040124996A1 (en) Data transmission apparatus and method
US4435825A (en) Clock signal extracting circuit
JPS5938780B2 (en) How to synchronize digital modems
JP3527270B2 (en) Multipath transmission compensation method in TDMA system
JP2000032507A (en) Equalization correction method for subscriber's line characteristic
JP2003528542A (en) Apparatus and method for adjusting input gain for multiple signal formats in a data network
JP5081356B2 (en) Method and apparatus for digital modem and analog modem activation procedures using PCM
JPS60141033A (en) Acoustic coupler
WO2002011377A9 (en) Current mode transmission