JP2000020445A - Computer system provided with memory control unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the useless processing of a channel and memory control unit(MCU) by reducing the cancel of a reconnection request to channel paths composing of a path group. SOLUTION: This computer system is composed of an MCU 301 connected with a host computer 101 through plural channel paths 201-204 and a storage device 601 for storing input/output data. In this case, the MCU is provided with plural processors 501-504 and a shared memory 505, reconnection request managing information is held in the shared memory, the priority of channel reconnection request is determined among the processors based on the reconnection request managing information, only the processor, to which priority is applied, can preferentially perform the channel reconnection request and the processor, to which priority is not applied, does not perform the channel reconnection request.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system, and more particularly, to a computer using a technique of a channel reconnection method between a host computer having a plurality of channel paths and a storage controller for inputting and outputting data to and from the host computer. About the system.

[0002]

2. Description of the Related Art In a recent computer system, a storage controller is required for I / O processing from a host computer.
Until the data transfer starts, the connection with the host computer is disconnected, and another I / O process is received from the host computer. Thus, the storage control device can receive I / O processing in a multiplexed manner. However, even if an attempt is made to make a reconnection request to the channel from the storage control device, another I / O process is being performed for multiplexing, and the reconnection request may not be made. In this case, the processing sinks, and the performance of the entire system deteriorates.

As a means for solving such a problem, for example, in the technique disclosed in Japanese Patent Application Laid-Open No. 54-146541, the number of connection paths with a host computer is made plural and these are made into a path group. In addition, it is possible to perform a channel reconnection for starting data transfer to a channel path different from the channel path whose activation has been received from the host computer. As a result, by reconnecting to an arbitrary earliest channel in the path group and restarting the I / O processing, the reconnection waiting time for the channel can be reduced, and an improvement in the throughput of the entire system can be expected.

However, the technique disclosed in the above publication focuses on improving the throughput as viewed from the host computer. The storage controller performs a reconnection request for the same I / O simultaneously to all the channel paths of the channel path group including the channel path for which the initial activation has been received, thereby reconnecting to the channel with the fastest response. To restart the I / O processing,
On the other hand, a channel path other than the channel path for actually reconnecting is a useless reconnection request. At this time,
As the reconnection request is repeated, both the channel and the storage controller perform wasteful processing, which causes a decrease in the response of the entire system.

If multiple storage devices are processed,
By simultaneously requesting reconnection of a certain storage device, processors other than the processor that handles the path actually reconnected to the channel among the processors in the storage control device perform the process of passing the channel reconnection request. And
Even if there is another storage device requiring a reconnection request at the same time, the reconnection request can be made only after the channel reconnection request repetition processing is completed.

On the other hand, if a reconnection request is issued to all paths from the storage controller while the channel is about to issue an initial activation to another storage device, the channel is processed to cancel the reconnection request. Until the end of
The initial startup cannot be issued.

[0007]

In the above-mentioned prior art, a plurality of channel paths are connected between a host computer and a storage controller, and these are made into path groups, so that storage devices are processed in a multiplexed manner. Also, the I / O processing can be resumed by reconnecting to an arbitrary path in the path group. In this way, the throughput of the entire system is improved.

However, when the channel performs multiplex processing with a certain number or more of storage devices, the storage control device
Immediately after a channel reconnection request for a certain storage device is made, a case may arise where a channel reconnection request for another storage device becomes possible. In this case, if a channel reconnection request is issued for all channel paths in order to give the channel superiority, the cancellation of the reconnection request will be canceled for channel paths other than the channel path that actually reconnected. The processing is performed, during which the another channel reconnection request is to be waited.

Similarly, when a channel reconnection request is issued from all paths from the storage controller when the channel is about to issue an initial activation to another storage device, the channel is similarly set to the channel reconnection request. Until the withdrawal processing is completed, the initial startup cannot be issued and the user has to wait.

SUMMARY OF THE INVENTION An object of the present invention is to reduce the cancellation of a channel reconnection request in response to a channel reconnection request for a channel from a storage controller in a storage subsystem having a plurality of channel paths. The purpose is to reduce the state and improve the response of the entire system.

[0011]

In order to solve the above problems, the present invention mainly employs the following configuration.

A host computer; a storage controller connected to the host computer via a plurality of channel paths; and a storage device connected to the storage controller and storing input / output data of the host computer. In the computer system, the storage control device selects at least one path for performing a channel reconnection request from among a plurality of channels of the host computer, transmits a channel reconnection request only to the selected path, and A computer system having a function of preventing a channel reconnection request from being made to a channel, and having a storage control device for improving a total response to the plurality of channels.

A host computer, a storage controller connected to the host computer via a plurality of channel paths, and a storage device connected to the storage controller and storing input / output data of the host computer;
In the computer system configured from the above, the storage control device comprises a plurality of processors and a shared memory shared between the processors, the shared memory holds reconnection request management information for each storage device, The priority of the channel reconnection request is determined between the processors based on the reconnection request management information, so that only the processor to which the priority has been given can perform the channel reconnection request with priority, and the priority is given. A computer system having a storage controller in which a processor that cannot be made does not make a channel reconnection request.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
This will be described in detail below with reference to FIG. FIG. 1 is a diagram showing an embodiment of a computer system according to the present invention. In the computer system of FIG. 1, the storage control device 301 is configured to control the channels 102, 103, 104,
Are connected to the host computer 101 via channel paths 201 to 204 respectively coming out of the host computer 101 and required for a plurality of storage devices 601, 602, 603,.
/ O processing is controlled.

[0015] The storage control device 301 is connected to the channel port 4
01, 402, 403, 404, I / O processing control units (processors) 501, 502, 503, 504, individual memories 506 to 509 for each processor, shared memory 505 between processors, cache memory (not shown), It has. I / O processing control units 501 to 504
Performs data input / output with respect to a plurality of storage devices 601.

The shared memory 505 includes channels 102 to
A reconnection request processor information table 512, a reconnection request priority processor information table 513, and a priority right acquisition time table 51 for controlling a channel reconnection request to 105
4 (see FIG. 2) and the processors 501 to 501
504 each issue a channel reconnection request according to the reconnection request management information 510 in the shared memory 505.

In the configuration shown in FIG.
204 form a path group, and the storage controller 3
01 can once disconnect the I / O processing from a certain channel, issue a channel reconnection request to another channel path, and continue the I / O processing.

For example, when a command for data transfer from the channel 102 to the storage device 601 is issued to the processor 501 via the channel port 401 and data transfer is not ready (as an example, the cache memory If there is no data to transfer),
The processor 501 disconnects the connection with the channel 102 once. Thereafter, when the preparation for data transfer is completed, another processor 504 can issue a reconnection request to the channel 105 via the channel port 404 to continue the I / O processing.

Normally, the processors 501 to 504 operate independently in the storage control device 301. Therefore, when a reconnection request to a channel can be made, each processor simultaneously transmits via the channel port 401 to 404, respectively. Makes a channel reconnection request to the storage device 60.
Only the channel connected to the processor that has secured 1 can continue the I / O process, and the other channels are rejected by the processor in the storage controller 301 for the reconnection request. Through the reconnection request, the operation of the channel and the processor in the storage controller 301 is wasted, and a channel reconnection request for data transfer of another storage device or a request for another storage device from the channel is made accordingly. The initial startup is delayed, leading to a reduction in the response of the entire storage subsystem.

FIG. 2 shows a reconnection request management information table 510 managed in units of storage devices on the shared memory 505 in the storage controller 301. In the reconnection request management information table 510, the reconnection request processor information 512, for making a reconnection request exclusively between processors,
The reconnection request priority processor information 513 is managed. That is, 512 represents a processor requesting reconnection,
Reference numeral 513 denotes one priority processor when the number of priority processors is one, and if the channel response to the reconnection request is slow, the priority processor is cleared and the next priority processor is represented, as described later.

An initial priority acquisition time 516 for storing a time when a processor first acquires a priority.
(The time is held unchanged during the I / O processing), a priority acquisition time table 514 storing the time when the priority is temporarily acquired (the time is updated every time the priority processor changes). Be). Further, it has a priority processor number 515 that determines the number N of processors that can perform a channel reconnection request.

FIG. 3 shows reconnection request information 520 managed on the individual memories 506 to 509 of the processors 501 to 504. This reconnection request information table 52
0 indicates whether the own processor has acquired the priority based on the channel path route 523 to be reconnected, the storage device number 522, and the reconnection request priority processor information 513 (see FIG. 2) on the shared memory 505. Priority information 5
21.

FIG. 4 is a diagram showing a determination of whether or not to temporarily disconnect the connection from the channel when the initial startup is received, and a flow of processing according to the determination. FIG. FIG. 6 is a diagram showing a flow at the time of making a reconnection request, and FIG. 6 is a diagram showing a flow of reconnecting from a channel and cleaning up the reconnection request management information.

In FIG. 4, first, a storage device is secured by initial activation from a channel (step 701), and a command is accepted (step 702). When it is necessary to disconnect the channel once (step 703), the channel is disconnected (step 704), and the reconnection management information of the previous I / O process may remain. The reconnection request priority processor information, the reconnection request processor information, the priority acquisition time, and the number of priority processors are cleared (step 705). If there is no need for disconnection, the process directly proceeds to the command processing (step 7).
07). Thereafter, the device is released (step 70).
6).

FIG. 5 shows a process for checking the completion of preparation for the reconnection request process after disconnection from the channel in FIG. When reconnection preparation is completed (step 710), reconnection request management information is acquired first (step 711), and the presence or absence of a priority processor is checked (step 712). If the priority processor has not been determined (priority processor is not determined by the host computer and the storage controller 301 itself is determined by responses from a plurality of processors), priority is acquired (step 713). If the own processor has become the priority processor (step 714), if there is no processor requesting reconnection to the channel (step 71).
5) The initial priority acquisition time T _P and the priority acquisition time T _S on the shared memory are set (step 716), and a reconnection request is made to the channel (step 717).

If the priority processor has already been determined, it is determined whether or not the processor is the own processor (step 718). If the processor is the own processor, the priority is first determined from the current time T _N and the priority acquisition time T _S. Right acquisition time T
(= T _N -T _S) and this correction value is checked (step 719). When the time T satisfies T> (first waiting time T ₀ ), it is determined that the channel response to the reconnection request from the own processor is slow, and the priority processor information and the priority acquisition time T of the own processor are determined. _S is released (cleared) (step 720) and notified (broadcast) to another processor (step 721). The first waiting time T ₀ is appropriately set.

By the broadcast 511, another processor competes for priority in step 713 of FIG. 5, and one of the other processors becomes a new priority processor. At this time, the reconnection request processor information is left as it is, and the reconnection request issued by the priority processor is left as it is, so that even if a restart is issued from the channel to the path immediately after that, the reception is accepted. To be able to That is, it repeats that the channel reconnection request to the channel for which there is no response from the channel within the first waiting time remains as it is, and the channel reconnection request is also made to the second path.

Further, as shown in FIG. 7, the channel reconnection request is cleared (step 727), the reconnection request processor information (512) and the reconnection request information (520) are released, and only the new priority processor becomes the channel A reconnection request may be made.

In order to speed up the processing, when it is determined at step 718 whether or not the own processor is the priority processor, the priority information 521 of the reconnection request information 520 managed on the individual local memories 506 to 509 in FIG. You may judge from.

[0030] When the own processor is not the preferred processor checks the initial acquisition priority time _{T (T = T N -T P} ) ( step 723). When the time T is T >> (second waiting time T ₁ : T ₁ >> T ₀ ), it is determined that the restart from the channel is slow, the storage device is starting to sink, and the priority processor information is determined. All processors are set (step 724), and all processors are notified by broadcast (step 725). As a result, all the processors including the own processor make a channel reconnection request, and accept a restart from the channel with the fastest response. At this time, the reconnection request is in accordance with the channel path group, and the restart of other processors other than the processor for which the corresponding storage device has been secured by the restart from the channel is the reconnection request withdrawn.

The process of changing the priority processor on the way is as follows:
This is a process that considers rescue. The time until the remedy is, for example, T ₀ = (Tr + α), where Tr is the average value of the channel response time when the channel is not busy in response to the reconnection request of the processor that first became the priority processor. to adjust the T _0. The time T ₁ to the priority processor and all processors, for example, to adjust the T ₁ so that T ₁ = T ₀ × number of processors.

Thereafter, the reconnection process from the channel is started in FIG. 6, and if there is a reconnectable device (step 731), when the device is successfully secured (step 732), the reconnection request management information 510 And the reconnection request information 520, and clears the reconnection request priority processor information 513, the reconnection request processor information 512, the priority acquisition time 514, the initial priority acquisition time 516, and the reconnection request information 520, respectively (step 733). ), And perform I / O processing such as command reception (step 73).
4). If there is no restartable device, the reconnection request is repeatedly processed (step 736), and the reconnection request management information 510 and the reconnection request information 520 are cleared.

Instead of FIG. 5, in FIG. 3, a priority processor number N515 is defined in the storage control device, and as shown in FIG. There is also a method of making a channel reconnection request with priority over other processors.

As described above, according to the embodiment of the present invention, a plurality of channel paths are defined as one path group.
In the system for performing the / O processing, it is intended to reduce the cancellation of the channel reconnection request and improve the response as a whole system while utilizing the characteristics as the path group, and includes the following configuration example. It is a thing.

(1) In the inter-processor shared memory provided in the storage controller, the reconnection request management information is provided for each storage device, and the priority of the channel reconnection request between the processors is determined based on the reconnection request management information. In which only a predetermined number of processors make a channel reconnection request with priority.

(2) In the above (1), if the connection is not re-established from the channel even after the elapse of a predetermined time set in the storage controller, the first processor releases the priority and cancels the channel re-connection request. Another one or more processors acquire a new priority, and only this processor makes a channel reconnection request.

(3) In the above (2), even after a certain period of time, the first channel reconnection request is kept as it is, and the processor which has newly obtained the priority makes another channel reconnection request. What to do.

(4) If the connection is not re-established from the channel after the elapse of the second fixed time set in the storage controller in the above (1), all the remaining processors make a channel re-connection request. thing.

[0039]

According to the present invention, the cancellation of the restart from the channel can be suppressed by narrowing down the processors corresponding to the path for performing a reconnection request from the storage controller to the channel. Effect can be expected.

When multiplex processing of a storage device is performed, useless reconnection requests from the storage control device are suppressed, and processing of channel reconnection withdrawal is suppressed. The processing load is reduced, and the response of the I / O processing as the whole storage subsystem is improved.

The delay of the initial startup from the channel due to the conflict between the useless reconnection request from the storage controller to the channel and the initial startup from the channel to another storage device is eliminated, and the response of the entire storage subsystem is eliminated. Is prevented from lowering.

It is possible to prevent a useless reconnection request from unduly delaying the detection of a reconnection request for another storage device from the storage controller, thereby reducing the response of the entire storage subsystem.

The processor in the storage subsystem is used for other processing (for example, I / O from a channel of another host computer).
/ O processing and processing unique to the storage controller).

[Brief description of the drawings]

FIG. 1 is a host computer, a storage controller connected to a host computer via a plurality of channel paths as one path group and having a plurality of channel ports and a plurality of processors, and a subordinate connected to the storage controller. Is a diagram schematically illustrating a computer system including a plurality of storage devices.

FIG. 2 illustrates an embodiment of the present invention for managing a reconnection request among a plurality of processors in a storage controller and suppressing reconnection withdrawal from a channel when a reconnection request to a channel is made. It is a figure showing the reconnection request management information table.

FIG. 3 shows an individual memory in each processor in the storage control device, which stores information on a path requesting a restart to a channel, information on a storage device, and priority information on a reconnection request of the processor. FIG.

FIG. 4 is a diagram showing a flow at the time of initial startup from a channel.

FIG. 5 is a flowchart illustrating a process of checking a storage device for issuing a restart request to a channel, by giving a priority to a processor that issues a reconnection request, thereby preventing a wasteful reconnection request from being issued to a channel. FIG. 4 is a diagram showing a processing flow for performing the above.

FIG. 6 is a diagram showing a processing flow for rearranging information for a reconnection request in a restart processing from a channel.

FIG. 7 is a diagram showing a flow of a case in which a channel reconnection request is cleared when the processor is no longer a priority processor in FIG. 5;

FIG. 8 is a diagram showing a processing flow of giving a channel reconnection request preferentially by the number of priority processors defined in the storage control device in FIG. 5;

[Explanation of symbols]

101 Host computer 102-105 Host computer side channel port 201-204 channel path 301 Storage controller 401-404 Storage controller side channel port 501-504 I / O processing controller (processor) 505 Inter-processor shared memory 506-509 Processor Individual memory 601 to 603 Storage device 510 Reconnection request management information 511 Broadcast (simultaneous notification means to all processors) 512 Reconnection request processor information 513 Reconnection request priority processor information 514 Priority acquisition time 515 Priority processor number 516 Initial priority acquisition Time 520 Reconnection request information 521 Priority information 522 Storage device number 523 Channel path route 701 to 737 Processing step

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shizuo Yokohata 2880 Kozu, Odawara-shi, Kanagawa F-term in Storage Systems Division, Hitachi, Ltd. F-term (reference) 5B014 GA03 GA35 GA60 GD16

Claims (5)

[Claims] 1. A host computer, a storage controller connected to the host computer via a plurality of channel paths, and a storage device connected to the storage controller and storing input / output data of the host computer. In the computer system, the storage control device selects at least one path for performing a channel reconnection request among a plurality of channels of the host computer, and transmits a channel reconnection request only to the selected path. A computer system comprising a storage control device having a function of preventing a channel reconnection request from being made for the remaining channels, and improving a total response to the plurality of channels. 2. A computer system comprising the storage control device according to claim 1, wherein a response from the channel of the host computer to the channel reconnection request within a predetermined time set inside the storage control device. A computer system provided with a storage control device, wherein when there is no channel, a channel reconnection request is made for all remaining channels. 3. A host computer, a storage controller connected to the host computer via a plurality of channel paths, and a storage device connected to the storage controller and storing input / output data of the host computer. In the computer system, the storage control device includes a plurality of processors and a shared memory shared between the processors, the shared memory holds reconnection request management information for each storage device, The priority of the channel reconnection request is determined between the processors based on the request management information, and only the processor given the priority can make the channel reconnection request with priority, and the priority cannot be given. A processor having a storage controller characterized by not making a channel reconnection request; Data system. 4. A computer system comprising the storage control device according to claim 3, wherein even if a predetermined time set inside the storage control device has passed,
If not reconnected from the channel of the host computer, the processor given the priority is released from the priority and cancels the channel reconnection request, and the remaining processors newly obtain the priority, and the acquired processor A computer system provided with a storage control device, wherein only a channel reconnection request is preferentially made. 5. A computer system comprising the storage control device according to claim 3, wherein even if a predetermined time set inside the storage control device has passed,
When the channel is not reconnected from the channel of the host computer, the processor to which the priority has been given continues to make a channel reconnection request as it is, and the processor having newly obtained the priority further makes a channel reconnection request. Computer system with storage controller.