ITTO20111229A1 - PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT - Google Patents

PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT

Info

Publication number
ITTO20111229A1
ITTO20111229A1 IT001229A ITTO20111229A ITTO20111229A1 IT TO20111229 A1 ITTO20111229 A1 IT TO20111229A1 IT 001229 A IT001229 A IT 001229A IT TO20111229 A ITTO20111229 A IT TO20111229A IT TO20111229 A1 ITTO20111229 A1 IT TO20111229A1
Authority
IT
Italy
Prior art keywords
procedure
electronic devices
computer product
protect electronic
protect
Prior art date
Application number
IT001229A
Other languages
Italian (it)
Inventor
Giovanni Agosta
Alessandro Barenghi
Guido Marco Bertoni
Gerardo Pelosi
Original Assignee
Milano Politecnico
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Milano Politecnico, St Microelectronics Srl filed Critical Milano Politecnico
Priority to IT001229A priority Critical patent/ITTO20111229A1/en
Publication of ITTO20111229A1 publication Critical patent/ITTO20111229A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
IT001229A 2011-12-29 2011-12-29 PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT ITTO20111229A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT001229A ITTO20111229A1 (en) 2011-12-29 2011-12-29 PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT001229A ITTO20111229A1 (en) 2011-12-29 2011-12-29 PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT

Publications (1)

Publication Number Publication Date
ITTO20111229A1 true ITTO20111229A1 (en) 2013-06-30

Family

ID=45757145

Family Applications (1)

Application Number Title Priority Date Filing Date
IT001229A ITTO20111229A1 (en) 2011-12-29 2011-12-29 PROCEDURE AND SYSTEM TO PROTECT ELECTRONIC DEVICES, ITS COMPUTER PRODUCT

Country Status (1)

Country Link
IT (1) ITTO20111229A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002050641A1 (en) * 2000-12-21 2002-06-27 Cp8 Technologies Method for making secure a logical or mathematical operator in a microprocessor-based electronic module
US20060048230A1 (en) * 2002-12-24 2006-03-02 Trusted Logic Method for securing computer systems incorporating a code interpretation module

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002050641A1 (en) * 2000-12-21 2002-06-27 Cp8 Technologies Method for making secure a logical or mathematical operator in a microprocessor-based electronic module
US20060048230A1 (en) * 2002-12-24 2006-03-02 Trusted Logic Method for securing computer systems incorporating a code interpretation module

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