ITTO20021131A1 - Dispositivo di generazione di chiavi per un algoritmo - Google Patents

Dispositivo di generazione di chiavi per un algoritmo

Info

Publication number
ITTO20021131A1
ITTO20021131A1 IT001131A ITTO20021131A ITTO20021131A1 IT TO20021131 A1 ITTO20021131 A1 IT TO20021131A1 IT 001131 A IT001131 A IT 001131A IT TO20021131 A ITTO20021131 A IT TO20021131A IT TO20021131 A1 ITTO20021131 A1 IT TO20021131A1
Authority
IT
Italy
Prior art keywords
algorithm
generation device
key generation
key
generation
Prior art date
Application number
IT001131A
Other languages
English (en)
Inventor
Sang Joon Nam
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of ITTO20021131A1 publication Critical patent/ITTO20021131A1/it

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry
    • H04L2209/122Hardware reduction or efficient architectures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/24Key scheduling, i.e. generating round keys or sub-keys for block encryption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
IT001131A 2002-10-28 2002-12-30 Dispositivo di generazione di chiavi per un algoritmo ITTO20021131A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0065828A KR100440074B1 (ko) 2002-10-28 2002-10-28 데이터 암호화 표준 알고리즘의 키 생성 장치

Publications (1)

Publication Number Publication Date
ITTO20021131A1 true ITTO20021131A1 (it) 2004-04-29

Family

ID=32089763

Family Applications (1)

Application Number Title Priority Date Filing Date
IT001131A ITTO20021131A1 (it) 2002-10-28 2002-12-30 Dispositivo di generazione di chiavi per un algoritmo

Country Status (4)

Country Link
KR (1) KR100440074B1 (it)
DE (1) DE10261408A1 (it)
FR (1) FR2846497B1 (it)
IT (1) ITTO20021131A1 (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100584604B1 (ko) * 2004-08-14 2006-05-30 삼성전자주식회사 디바이스를 인증하기 위한 키 생성 방법/장치 및 디바이스인증 방법/장치
KR101102928B1 (ko) * 2009-08-21 2012-01-10 유병규 복합댐퍼

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07147571A (ja) * 1993-11-24 1995-06-06 Tamura Electric Works Ltd スクランブル/デスクランブル処理装置
KR100316025B1 (ko) * 1999-06-30 2001-12-12 박종섭 데이터 암호 표준 알고리즘을 이용한 암호 및 복호 장치
KR100377172B1 (ko) * 2000-06-13 2003-03-26 주식회사 하이닉스반도체 데이터 암호화 표준 알고리즘을 이용한 암호화 장치의 키스케쥴러
US6763365B2 (en) * 2000-12-19 2004-07-13 International Business Machines Corporation Hardware implementation for modular multiplication using a plurality of almost entirely identical processor elements
KR20020087332A (ko) * 2001-05-14 2002-11-22 최병윤 대칭키 암호 알고리즘의 모듈화된 ecb, cbc, cfb, ofb모드 구현 회로
KR20020087331A (ko) * 2001-05-14 2002-11-22 최병윤 부분 라운드간 파이프라인 기법을 이용한 AES Rijndael암호 및 복호 회로
KR20030051111A (ko) * 2001-12-18 2003-06-25 신경욱 AES Rijndael(라인달) 암호 알고리듬의 하드웨어 구현을위한 라운드 처리부 회로 및 온라인 라운드 키 생성 회로

Also Published As

Publication number Publication date
KR100440074B1 (ko) 2004-07-14
FR2846497B1 (fr) 2005-08-05
DE10261408A1 (de) 2004-05-06
KR20040037361A (ko) 2004-05-07
FR2846497A1 (fr) 2004-04-30

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