ITRM20040554A1 - Metodo ed apparecchio per filtrare dati in uscita. - Google Patents

Metodo ed apparecchio per filtrare dati in uscita.

Info

Publication number
ITRM20040554A1
ITRM20040554A1 IT000554A ITRM20040554A ITRM20040554A1 IT RM20040554 A1 ITRM20040554 A1 IT RM20040554A1 IT 000554 A IT000554 A IT 000554A IT RM20040554 A ITRM20040554 A IT RM20040554A IT RM20040554 A1 ITRM20040554 A1 IT RM20040554A1
Authority
IT
Italy
Prior art keywords
output data
filtering output
filtering
data
output
Prior art date
Application number
IT000554A
Other languages
English (en)
Inventor
Michele Incarnati
Giovanni Santin
Tommaso Vali
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to IT000554A priority Critical patent/ITRM20040554A1/it
Publication of ITRM20040554A1 publication Critical patent/ITRM20040554A1/it
Priority to US11/127,526 priority patent/US7227789B2/en
Priority to US11/758,352 priority patent/US7408814B2/en
Priority to US11/758,373 priority patent/US7466602B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069—I/O lines read out arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2281—Timing of a read operation
IT000554A 2004-11-08 2004-11-08 Metodo ed apparecchio per filtrare dati in uscita. ITRM20040554A1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT000554A ITRM20040554A1 (it) 2004-11-08 2004-11-08 Metodo ed apparecchio per filtrare dati in uscita.
US11/127,526 US7227789B2 (en) 2004-11-08 2005-05-12 Method and apparatus for filtering output data
US11/758,352 US7408814B2 (en) 2004-11-08 2007-06-05 Method and apparatus for filtering output data
US11/758,373 US7466602B2 (en) 2004-11-08 2007-06-05 Method and apparatus for filtering output data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000554A ITRM20040554A1 (it) 2004-11-08 2004-11-08 Metodo ed apparecchio per filtrare dati in uscita.

Publications (1)

Publication Number Publication Date
ITRM20040554A1 true ITRM20040554A1 (it) 2005-02-08

Family

ID=36316154

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000554A ITRM20040554A1 (it) 2004-11-08 2004-11-08 Metodo ed apparecchio per filtrare dati in uscita.

Country Status (2)

Country Link
US (3) US7227789B2 (it)
IT (1) ITRM20040554A1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2073212B1 (fr) * 2007-12-21 2011-05-11 EM Microelectronic-Marin SA Dispositif de lecture d'une mémoire non volatile à basse consommation, et son procédé de mise en action
US7983080B2 (en) * 2009-02-02 2011-07-19 International Business Machines Corporation Non-body contacted sense amplifier with negligible history effect
JP5380483B2 (ja) * 2011-03-31 2014-01-08 株式会社東芝 半導体記憶装置
US10185697B2 (en) * 2016-01-26 2019-01-22 Macronix International Co., Ltd. Generating a transition signal for controlling memory data output

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5198999A (en) 1988-09-12 1993-03-30 Kabushiki Kaisha Toshiba Serial input/output semiconductor memory including an output data latch circuit
US5682391A (en) 1996-02-22 1997-10-28 Sun Microsystems, Inc. Apparatus and method for high speed shifting of test data through an integrated circuit
US5838631A (en) * 1996-04-19 1998-11-17 Integrated Device Technology, Inc. Fully synchronous pipelined ram
JP3211739B2 (ja) * 1997-08-25 2001-09-25 日本電気株式会社 半導体記憶装置
US6792500B1 (en) 1998-07-08 2004-09-14 Broadcom Corporation Apparatus and method for managing memory defects
US6310982B1 (en) * 1998-11-12 2001-10-30 Oec Medical Systems, Inc. Method and apparatus for reducing motion artifacts and noise in video image processing
FI119011B (fi) 1999-10-13 2008-06-13 U Nav Microelectronics Corp Sovitettu suodatin ja hajaspektrivastaanotin
US6559690B2 (en) * 2001-03-15 2003-05-06 Micron Technology, Inc. Programmable dual drive strength output buffer with a shared boot circuit
US6813656B1 (en) 2001-04-30 2004-11-02 Lsi Logic Corporation Integrated dynamic multipathing filter
JP4837841B2 (ja) * 2001-06-12 2011-12-14 富士通セミコンダクター株式会社 スタティックｒａｍ

Also Published As

Publication number Publication date
US20070230256A1 (en) 2007-10-04
US20070230257A1 (en) 2007-10-04
US7466602B2 (en) 2008-12-16
US7227789B2 (en) 2007-06-05
US20060098497A1 (en) 2006-05-11
US7408814B2 (en) 2008-08-05

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