ITMI20131720A1 - SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD - Google Patents

SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD

Info

Publication number
ITMI20131720A1
ITMI20131720A1 ITMI20131720A ITMI20131720A1 IT MI20131720 A1 ITMI20131720 A1 IT MI20131720A1 IT MI20131720 A ITMI20131720 A IT MI20131720A IT MI20131720 A1 ITMI20131720 A1 IT MI20131720A1
Authority
IT
Italy
Prior art keywords
substrate
circuit board
printed circuit
design method
design
Prior art date
Application number
Other languages
Italian (it)
Inventor
Alex Gritti
Mark Andrew Shaw
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITMI20131720 priority Critical patent/ITMI20131720A1/en
Publication of ITMI20131720A1 publication Critical patent/ITMI20131720A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
ITMI20131720 2013-10-16 2013-10-16 SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD ITMI20131720A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ITMI20131720 ITMI20131720A1 (en) 2013-10-16 2013-10-16 SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI20131720 ITMI20131720A1 (en) 2013-10-16 2013-10-16 SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD

Publications (1)

Publication Number Publication Date
ITMI20131720A1 true ITMI20131720A1 (en) 2015-04-17

Family

ID=49817163

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI20131720 ITMI20131720A1 (en) 2013-10-16 2013-10-16 SUBSTRATE OF A PRINTED CIRCUIT BOARD AND ITS DESIGN METHOD

Country Status (1)

Country Link
IT (1) ITMI20131720A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080183448A1 (en) * 2007-01-29 2008-07-31 Fujitsu Limited Attributive data prediction apparatus, an attributive data prediction method and a recording medium storing an attributive data prediction program
US20090114429A1 (en) * 2007-11-06 2009-05-07 International Business Machines Corporation Packaging substrate having pattern-matched metal layers
US20090313588A1 (en) * 2008-06-11 2009-12-17 Hien Phu Dang Method to Extract and Apply Circuit Features in Organic Substrate for Automation of Warp Modeling

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080183448A1 (en) * 2007-01-29 2008-07-31 Fujitsu Limited Attributive data prediction apparatus, an attributive data prediction method and a recording medium storing an attributive data prediction program
US20090114429A1 (en) * 2007-11-06 2009-05-07 International Business Machines Corporation Packaging substrate having pattern-matched metal layers
US20090313588A1 (en) * 2008-06-11 2009-12-17 Hien Phu Dang Method to Extract and Apply Circuit Features in Organic Substrate for Automation of Warp Modeling

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