IT979064B - Circuito digitale includente un circuito di ritardo ed un circui to logico - Google Patents

Circuito digitale includente un circuito di ritardo ed un circui to logico

Info

Publication number
IT979064B
IT979064B IT2033373A IT2033373A IT979064B IT 979064 B IT979064 B IT 979064B IT 2033373 A IT2033373 A IT 2033373A IT 2033373 A IT2033373 A IT 2033373A IT 979064 B IT979064 B IT 979064B
Authority
IT
Italy
Prior art keywords
circuit
digital
delay
logic
logic circuit
Prior art date
Application number
IT2033373A
Other languages
English (en)
Italian (it)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of IT979064B publication Critical patent/IT979064B/it

Links

IT2033373A 1972-02-14 1973-02-13 Circuito digitale includente un circuito di ritardo ed un circui to logico IT979064B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1480572A JPS5341945B2 (hu) 1972-02-14 1972-02-14

Publications (1)

Publication Number Publication Date
IT979064B true IT979064B (it) 1974-09-30

Family

ID=11871244

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2033373A IT979064B (it) 1972-02-14 1973-02-13 Circuito digitale includente un circuito di ritardo ed un circui to logico

Country Status (2)

Country Link
JP (1) JPS5341945B2 (hu)
IT (1) IT979064B (hu)

Also Published As

Publication number Publication date
JPS4885050A (hu) 1973-11-12
JPS5341945B2 (hu) 1978-11-08

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