IT971835B - Struttura di isolamento a giun zione a circuito integrato - Google Patents

Struttura di isolamento a giun zione a circuito integrato

Info

Publication number
IT971835B
IT971835B IT3287272A IT3287272A IT971835B IT 971835 B IT971835 B IT 971835B IT 3287272 A IT3287272 A IT 3287272A IT 3287272 A IT3287272 A IT 3287272A IT 971835 B IT971835 B IT 971835B
Authority
IT
Italy
Prior art keywords
integrated circuit
insulation structure
circuit junction
junction insulation
integrated
Prior art date
Application number
IT3287272A
Other languages
English (en)
Italian (it)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT971835B publication Critical patent/IT971835B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • General Engineering & Computer Science (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
IT3287272A 1972-03-29 1972-12-14 Struttura di isolamento a giun zione a circuito integrato IT971835B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23917372A 1972-03-29 1972-03-29

Publications (1)

Publication Number Publication Date
IT971835B true IT971835B (it) 1974-05-10

Family

ID=22900936

Family Applications (1)

Application Number Title Priority Date Filing Date
IT3287272A IT971835B (it) 1972-03-29 1972-12-14 Struttura di isolamento a giun zione a circuito integrato

Country Status (6)

Country Link
JP (1) JPS4916392A (US20060205796A1-20060914-C00130.png)
CH (1) CH546010A (US20060205796A1-20060914-C00130.png)
DE (1) DE2313725A1 (US20060205796A1-20060914-C00130.png)
ES (1) ES413097A1 (US20060205796A1-20060914-C00130.png)
FR (1) FR2177767B1 (US20060205796A1-20060914-C00130.png)
IT (1) IT971835B (US20060205796A1-20060914-C00130.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6173252B2 (ja) * 2014-04-03 2017-08-02 三菱電機株式会社 昇降装置

Also Published As

Publication number Publication date
CH546010A (US20060205796A1-20060914-C00130.png) 1974-02-15
DE2313725A1 (de) 1973-10-11
FR2177767B1 (US20060205796A1-20060914-C00130.png) 1978-03-10
FR2177767A1 (US20060205796A1-20060914-C00130.png) 1973-11-09
ES413097A1 (es) 1976-07-01
JPS4916392A (US20060205796A1-20060914-C00130.png) 1974-02-13

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