IT1252304B - Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM - Google Patents

Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM

Info

Publication number
IT1252304B
IT1252304B IT2145590A IT2145590A IT1252304B IT 1252304 B IT1252304 B IT 1252304B IT 2145590 A IT2145590 A IT 2145590A IT 2145590 A IT2145590 A IT 2145590A IT 1252304 B IT1252304 B IT 1252304B
Authority
IT
Italy
Prior art keywords
ram
transfer
memory
dual
sam
Prior art date
Application number
IT2145590A
Other languages
Italian (it)
Other versions
IT9021455A0 (en
IT9021455A1 (en
Inventor
Jang-Kyu Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to IT2145590A priority Critical patent/IT1252304B/en
Publication of IT9021455A0 publication Critical patent/IT9021455A0/en
Publication of IT9021455A1 publication Critical patent/IT9021455A1/en
Application granted granted Critical
Publication of IT1252304B publication Critical patent/IT1252304B/en

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  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

The dual-port memory device for split data transfer includes a first normal memory part comprising a RAM (20), a SAM (22) and a first transfer gate (24) connected for memory data transfer between them. A second normal memory part comprises a second RAM (30), a second RAM (30), a second SAM (32) and a second transfer gate (34) connected for memory data transfer between them. A transfer memory signal generator (40) provide two transfer signals to the first and second transfer gates respectively. A redundant memory (50) includes a redundant RAM (60) a redundant SAM (62), a redundant transfer gate (64). A redundant transfer signal generator (70) selects one of the first and second transfer signals so that if a defect arises in either memory part the redunant memory can substitute for it.
IT2145590A 1990-09-13 1990-09-13 Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM IT1252304B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT2145590A IT1252304B (en) 1990-09-13 1990-09-13 Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2145590A IT1252304B (en) 1990-09-13 1990-09-13 Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM

Publications (3)

Publication Number Publication Date
IT9021455A0 IT9021455A0 (en) 1990-09-13
IT9021455A1 IT9021455A1 (en) 1992-03-13
IT1252304B true IT1252304B (en) 1995-06-08

Family

ID=11182029

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2145590A IT1252304B (en) 1990-09-13 1990-09-13 Dual-port memory device for graphic display - has RAM and SAM ports comprising respective memory cell array blocks and developed to be used as VRAM

Country Status (1)

Country Link
IT (1) IT1252304B (en)

Also Published As

Publication number Publication date
IT9021455A0 (en) 1990-09-13
IT9021455A1 (en) 1992-03-13

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970925