IT1190324B - PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY - Google Patents

PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY

Info

Publication number
IT1190324B
IT1190324B IT20131/86A IT2013186A IT1190324B IT 1190324 B IT1190324 B IT 1190324B IT 20131/86 A IT20131/86 A IT 20131/86A IT 2013186 A IT2013186 A IT 2013186A IT 1190324 B IT1190324 B IT 1190324B
Authority
IT
Italy
Prior art keywords
filters
control
integrated circuits
mos integrated
switched capacity
Prior art date
Application number
IT20131/86A
Other languages
Italian (it)
Other versions
IT8620131A0 (en
IT8620131A1 (en
Inventor
Pierangelo Confalonieri
Germano Nicollini
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT20131/86A priority Critical patent/IT1190324B/en
Publication of IT8620131A0 publication Critical patent/IT8620131A0/en
Priority to GB08706986A priority patent/GB2189360A/en
Priority to DE19873711604 priority patent/DE3711604A1/en
Priority to FR8705518A priority patent/FR2597681A1/en
Priority to JP62094981A priority patent/JPS62252209A/en
Publication of IT8620131A1 publication Critical patent/IT8620131A1/en
Application granted granted Critical
Publication of IT1190324B publication Critical patent/IT1190324B/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
    • H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
IT20131/86A 1986-04-18 1986-04-18 PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY IT1190324B (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT20131/86A IT1190324B (en) 1986-04-18 1986-04-18 PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY
GB08706986A GB2189360A (en) 1986-04-18 1987-03-24 Phase disoverlapper for MOS integrated circuits particularly for controlling switched-capacitor filters
DE19873711604 DE3711604A1 (en) 1986-04-18 1987-04-07 PHASE DISCONNECTOR FOR MOS-INTEGRATED CIRCUITS, ESPECIALLY FOR CONTROLLING FILTERS WITH SWITCHED CAPACITY
FR8705518A FR2597681A1 (en) 1986-04-18 1987-04-17 ANTI-OVERLAPPING PHASE SYSTEM FOR MOS INTEGRATED CIRCUITS, PARTICULARLY FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITIES.
JP62094981A JPS62252209A (en) 1986-04-18 1987-04-17 Disoverlapper for mos integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT20131/86A IT1190324B (en) 1986-04-18 1986-04-18 PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY

Publications (3)

Publication Number Publication Date
IT8620131A0 IT8620131A0 (en) 1986-04-18
IT8620131A1 IT8620131A1 (en) 1987-10-18
IT1190324B true IT1190324B (en) 1988-02-16

Family

ID=11164060

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20131/86A IT1190324B (en) 1986-04-18 1986-04-18 PHASE DEVELOPER FOR MOS INTEGRATED CIRCUITS, IN PARTICULAR FOR THE CONTROL OF FILTERS WITH SWITCHED CAPACITY

Country Status (5)

Country Link
JP (1) JPS62252209A (en)
DE (1) DE3711604A1 (en)
FR (1) FR2597681A1 (en)
GB (1) GB2189360A (en)
IT (1) IT1190324B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19821458C1 (en) * 1998-05-13 1999-11-18 Siemens Ag Circuit arrangement for generating complementary signals
DE19843159C1 (en) 1998-09-21 2000-02-24 Siemens Ag Integrated circuit for redundancy evaluation

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5022593B1 (en) * 1970-06-15 1975-07-31
US3862440A (en) * 1972-09-14 1975-01-21 Tokyo Shibaura Electric Co Pulse transforming circuit arrangements using a clock pulse responsive delayed inverter means
JPS53121556A (en) * 1977-03-31 1978-10-24 Toshiba Corp 2-phase clock pulse generator circuit
JPS5782620A (en) * 1980-11-10 1982-05-24 Matsushita Electric Ind Co Ltd Safety device for combustor
JPS5787620A (en) * 1980-11-20 1982-06-01 Fujitsu Ltd Clock generating circuit
JPS59181818A (en) * 1983-03-31 1984-10-16 Toshiba Corp Generating circuit of clock signal

Also Published As

Publication number Publication date
GB8706986D0 (en) 1987-04-29
DE3711604A1 (en) 1987-10-29
IT8620131A0 (en) 1986-04-18
IT8620131A1 (en) 1987-10-18
GB2189360A (en) 1987-10-21
FR2597681A1 (en) 1987-10-23
JPS62252209A (en) 1987-11-04

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970429