IT1181168B - Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento - Google Patents

Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento

Info

Publication number
IT1181168B
IT1181168B IT83331/84A IT8333184A IT1181168B IT 1181168 B IT1181168 B IT 1181168B IT 83331/84 A IT83331/84 A IT 83331/84A IT 8333184 A IT8333184 A IT 8333184A IT 1181168 B IT1181168 B IT 1181168B
Authority
IT
Italy
Prior art keywords
procedure
memory
plate management
component
memory component
Prior art date
Application number
IT83331/84A
Other languages
English (en)
Other versions
IT8483331A0 (it
Inventor
Gianfranco Nadalutti
Original Assignee
Zanussi Zeltron Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zanussi Zeltron Inst filed Critical Zanussi Zeltron Inst
Priority to IT83331/84A priority Critical patent/IT1181168B/it
Publication of IT8483331A0 publication Critical patent/IT8483331A0/it
Priority to EP85101075A priority patent/EP0154798A1/en
Application granted granted Critical
Publication of IT1181168B publication Critical patent/IT1181168B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
IT83331/84A 1984-03-02 1984-03-02 Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento IT1181168B (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT83331/84A IT1181168B (it) 1984-03-02 1984-03-02 Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento
EP85101075A EP0154798A1 (en) 1984-03-02 1985-02-01 Memory chip for handling memory components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT83331/84A IT1181168B (it) 1984-03-02 1984-03-02 Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento

Publications (2)

Publication Number Publication Date
IT8483331A0 IT8483331A0 (it) 1984-03-02
IT1181168B true IT1181168B (it) 1987-09-23

Family

ID=11320254

Family Applications (1)

Application Number Title Priority Date Filing Date
IT83331/84A IT1181168B (it) 1984-03-02 1984-03-02 Procedimento di gestione componenti di memoria e piastra di memoria utilizzante tale procedimento

Country Status (2)

Country Link
EP (1) EP0154798A1 (it)
IT (1) IT1181168B (it)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200919A (en) * 1978-12-05 1980-04-29 The United States Of America As Represented By The Secretary Of The Navy Apparatus for expanding the memory of a mini-computer system
JPS57118599U (it) * 1981-01-14 1982-07-23
JPS6052513B2 (ja) * 1981-12-02 1985-11-19 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
EP0154798A1 (en) 1985-09-18
IT8483331A0 (it) 1984-03-02

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