IT1135037B - Selettore di linee per la decodificazione in passo di linee multiple di ingresso - Google Patents

Selettore di linee per la decodificazione in passo di linee multiple di ingresso

Info

Publication number
IT1135037B
IT1135037B IT19134/81A IT1913481A IT1135037B IT 1135037 B IT1135037 B IT 1135037B IT 19134/81 A IT19134/81 A IT 19134/81A IT 1913481 A IT1913481 A IT 1913481A IT 1135037 B IT1135037 B IT 1135037B
Authority
IT
Italy
Prior art keywords
multiple input
input lines
line selector
decoding
step decoding
Prior art date
Application number
IT19134/81A
Other languages
English (en)
Other versions
IT8119134A0 (it
Inventor
Roger Stewart Green
Mazin Moshe
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8119134A0 publication Critical patent/IT8119134A0/it
Application granted granted Critical
Publication of IT1135037B publication Critical patent/IT1135037B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
IT19134/81A 1980-01-28 1981-01-14 Selettore di linee per la decodificazione in passo di linee multiple di ingresso IT1135037B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11620480A 1980-01-28 1980-01-28

Publications (2)

Publication Number Publication Date
IT8119134A0 IT8119134A0 (it) 1981-01-14
IT1135037B true IT1135037B (it) 1986-08-20

Family

ID=22365888

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19134/81A IT1135037B (it) 1980-01-28 1981-01-14 Selettore di linee per la decodificazione in passo di linee multiple di ingresso

Country Status (4)

Country Link
JP (1) JPS56134394A (it)
DE (1) DE3102107A1 (it)
FR (1) FR2474741A1 (it)
IT (1) IT1135037B (it)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3909808A (en) * 1974-12-23 1975-09-30 Ibm Minimum pitch mosfet decoder circuit configuration

Also Published As

Publication number Publication date
DE3102107A1 (de) 1981-12-17
JPS56134394A (en) 1981-10-21
IT8119134A0 (it) 1981-01-14
FR2474741A1 (fr) 1981-07-31

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