IT1125539B - Circuito di sincronizzazione di dati - Google Patents

Circuito di sincronizzazione di dati

Info

Publication number
IT1125539B
IT1125539B IT26680/79A IT2668079A IT1125539B IT 1125539 B IT1125539 B IT 1125539B IT 26680/79 A IT26680/79 A IT 26680/79A IT 2668079 A IT2668079 A IT 2668079A IT 1125539 B IT1125539 B IT 1125539B
Authority
IT
Italy
Prior art keywords
data synchronization
synchronization circuit
circuit
data
synchronization
Prior art date
Application number
IT26680/79A
Other languages
English (en)
Other versions
IT7926680A0 (it
Inventor
James J Vrba
Original Assignee
Gte Automatic Electric Lab Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Automatic Electric Lab Inc filed Critical Gte Automatic Electric Lab Inc
Publication of IT7926680A0 publication Critical patent/IT7926680A0/it
Application granted granted Critical
Publication of IT1125539B publication Critical patent/IT1125539B/it

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
IT26680/79A 1978-10-26 1979-10-22 Circuito di sincronizzazione di dati IT1125539B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/955,281 US4191849A (en) 1978-10-26 1978-10-26 Data synchronization circuit

Publications (2)

Publication Number Publication Date
IT7926680A0 IT7926680A0 (it) 1979-10-22
IT1125539B true IT1125539B (it) 1986-05-14

Family

ID=25496609

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26680/79A IT1125539B (it) 1978-10-26 1979-10-22 Circuito di sincronizzazione di dati

Country Status (4)

Country Link
US (1) US4191849A (it)
BE (1) BE878622A (it)
CA (1) CA1128630A (it)
IT (1) IT1125539B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4780890A (en) * 1986-09-29 1988-10-25 Microwave Semiconductor Corp. High-speed pulse swallower
JPH0786855B2 (ja) * 1987-04-15 1995-09-20 日本電気株式会社 シリアルデ−タ処理装置
US5488639A (en) * 1993-12-21 1996-01-30 Intel Corporation Parallel multistage synchronization method and apparatus
US6075985A (en) * 1997-01-23 2000-06-13 Nortel Networks Corporation Wireless access system with DID and AIOD functions
US6792103B1 (en) * 1999-04-22 2004-09-14 James H. Walker Telephonic automatic dialing system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967061A (en) * 1975-03-05 1976-06-29 Ncr Corporation Method and apparatus for recovering data and clock information in a self-clocking data stream
US4007329A (en) * 1976-02-12 1977-02-08 Ncr Corporation Data communications system with improved asynchronous retiming circuit

Also Published As

Publication number Publication date
BE878622A (fr) 1979-12-31
CA1128630A (en) 1982-07-27
US4191849A (en) 1980-03-04
IT7926680A0 (it) 1979-10-22

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