IT1094446B - Base dei tempi - Google Patents
Base dei tempiInfo
- Publication number
- IT1094446B IT1094446B IT22458/78A IT2245878A IT1094446B IT 1094446 B IT1094446 B IT 1094446B IT 22458/78 A IT22458/78 A IT 22458/78A IT 2245878 A IT2245878 A IT 2245878A IT 1094446 B IT1094446 B IT 1094446B
- Authority
- IT
- Italy
- Prior art keywords
- time base
- base
- time
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
- G06F11/187—Voting techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L2007/047—Speed or phase control by synchronisation signals using special codes as synchronising signal using a sine signal or unmodulated carrier
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Signal Processing (AREA)
- Nonlinear Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Electric Clocks (AREA)
- Inverter Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7714184A FR2390856A1 (fr) | 1977-05-10 | 1977-05-10 | Base de temps |
Publications (2)
Publication Number | Publication Date |
---|---|
IT7822458A0 IT7822458A0 (it) | 1978-04-19 |
IT1094446B true IT1094446B (it) | 1985-08-02 |
Family
ID=9190587
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT22458/78A IT1094446B (it) | 1977-05-10 | 1978-04-19 | Base dei tempi |
Country Status (17)
Country | Link |
---|---|
US (1) | US4164629A (it) |
JP (1) | JPS53139446A (it) |
AU (1) | AU518460B2 (it) |
BE (1) | BE866168A (it) |
CA (1) | CA1098324A (it) |
CH (1) | CH627595A5 (it) |
DE (1) | DE2819519C2 (it) |
ES (1) | ES469660A1 (it) |
FI (1) | FI67631C (it) |
FR (1) | FR2390856A1 (it) |
GB (1) | GB1593810A (it) |
GR (1) | GR64297B (it) |
IE (1) | IE46779B1 (it) |
IT (1) | IT1094446B (it) |
NL (1) | NL7804918A (it) |
SE (1) | SE431265B (it) |
ZA (1) | ZA782638B (it) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4519090A (en) * | 1982-07-27 | 1985-05-21 | General Electric Company | Testable time delay |
NL8203921A (nl) * | 1982-10-11 | 1984-05-01 | Philips Nv | Multipel redundant kloksysteem, bevattende een aantal onderling synchroniserende klokken, en klokschakeling voor gebruik in zo een kloksysteem. |
US4644498A (en) * | 1983-04-04 | 1987-02-17 | General Electric Company | Fault-tolerant real time clock |
FR2546691B1 (fr) * | 1983-05-27 | 1985-07-05 | Cit Alcatel | Base de temps asservie |
US4598257A (en) * | 1983-05-31 | 1986-07-01 | Siemens Corporate Research & Support, Inc. | Clock pulse signal generator system |
US4531210A (en) * | 1983-06-22 | 1985-07-23 | Gte Automatic Electric Incorporated | Digital span reframing circuit |
JPS60110002A (ja) * | 1983-11-21 | 1985-06-15 | Nippon Signal Co Ltd:The | 3重系におけるクロツクパルス同期装置 |
FR2577087B1 (fr) * | 1985-02-07 | 1987-03-06 | Thomson Csf Mat Tel | Dispositif de distribution d'horloge tripliquee, chaque signal d'horloge comportant un signal de synchronisation |
FR2577089B1 (fr) * | 1985-02-07 | 1987-03-06 | Thomson Csf Mat Tel | Dispositif de transmission d'un signal d'horloge accompagne d'un signal de synchronisation |
US4712211A (en) * | 1985-03-25 | 1987-12-08 | Nissan Motor Company, Limited | Network system utilizing an intermediate synchronizations signal and predetermined code string patterns |
US4984241A (en) * | 1989-01-23 | 1991-01-08 | The Boeing Company | Tightly synchronized fault tolerant clock |
US4998075A (en) * | 1989-10-26 | 1991-03-05 | Western Digital Corporation | Programmable multiple oscillator circuit |
US5305451A (en) * | 1990-09-05 | 1994-04-19 | International Business Machines Corporation | Single phase clock distribution circuit for providing clock signals to multiple chip integrated circuit systems |
US6188286B1 (en) * | 1999-03-30 | 2001-02-13 | Infineon Technologies North America Corp. | Method and system for synchronizing multiple subsystems using one voltage-controlled oscillator |
DE10036827A1 (de) * | 2000-07-28 | 2002-02-14 | Alcatel Sa | Taktversorgungseinheit |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3522455A (en) * | 1967-07-27 | 1970-08-04 | Bendix Corp | Method and means of synchronizing timing pulses of a three channel triplicated system |
FR2080251A5 (it) * | 1970-02-27 | 1971-11-12 | Lannionnais Electronique | |
IT1051350B (it) * | 1975-12-09 | 1981-04-21 | Cselt Centro Studi Lab Telecom | Sistema di temporizzazione tripli to per impianti duplicati conte nenti circuiti logici |
-
1977
- 1977-05-10 FR FR7714184A patent/FR2390856A1/fr active Granted
-
1978
- 1978-04-17 CH CH407978A patent/CH627595A5/fr not_active IP Right Cessation
- 1978-04-19 IT IT22458/78A patent/IT1094446B/it active
- 1978-04-20 BE BE1008851A patent/BE866168A/xx not_active IP Right Cessation
- 1978-04-24 GR GR56073A patent/GR64297B/el unknown
- 1978-04-28 GB GB17037/78A patent/GB1593810A/en not_active Expired
- 1978-05-03 DE DE2819519A patent/DE2819519C2/de not_active Expired
- 1978-05-05 AU AU35832/78A patent/AU518460B2/en not_active Expired
- 1978-05-05 US US05/903,334 patent/US4164629A/en not_active Expired - Lifetime
- 1978-05-08 FI FI781433A patent/FI67631C/fi not_active IP Right Cessation
- 1978-05-08 NL NL7804918A patent/NL7804918A/xx not_active Application Discontinuation
- 1978-05-08 CA CA302,836A patent/CA1098324A/fr not_active Expired
- 1978-05-09 SE SE7805261A patent/SE431265B/sv not_active IP Right Cessation
- 1978-05-09 JP JP5414778A patent/JPS53139446A/ja active Granted
- 1978-05-09 IE IE943/78A patent/IE46779B1/en unknown
- 1978-05-09 ZA ZA00782638A patent/ZA782638B/xx unknown
- 1978-05-10 ES ES469660A patent/ES469660A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
SE7805261L (sv) | 1978-11-11 |
BE866168A (fr) | 1978-10-20 |
FR2390856B1 (it) | 1982-08-27 |
FI67631B (fi) | 1984-12-31 |
ZA782638B (en) | 1979-04-25 |
FI781433A (fi) | 1978-11-11 |
IE46779B1 (en) | 1983-09-21 |
DE2819519A1 (de) | 1978-11-16 |
IE780943L (en) | 1978-11-10 |
JPS53139446A (en) | 1978-12-05 |
CH627595A5 (it) | 1982-01-15 |
AU3583278A (en) | 1979-11-08 |
AU518460B2 (en) | 1981-10-01 |
FR2390856A1 (fr) | 1978-12-08 |
IT7822458A0 (it) | 1978-04-19 |
CA1098324A (fr) | 1981-03-31 |
DE2819519C2 (de) | 1986-09-18 |
US4164629A (en) | 1979-08-14 |
FI67631C (fi) | 1985-04-10 |
ES469660A1 (es) | 1979-09-16 |
JPS6244447B2 (it) | 1987-09-21 |
NL7804918A (nl) | 1978-11-14 |
GR64297B (en) | 1980-03-03 |
GB1593810A (en) | 1981-07-22 |
SE431265B (sv) | 1984-01-23 |
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