IT1025190B - Sistema per formare aperture di ri dotte dimensioni in ciruiti integrati - Google Patents

Sistema per formare aperture di ri dotte dimensioni in ciruiti integrati

Info

Publication number
IT1025190B
IT1025190B IT28781/74A IT2878174A IT1025190B IT 1025190 B IT1025190 B IT 1025190B IT 28781/74 A IT28781/74 A IT 28781/74A IT 2878174 A IT2878174 A IT 2878174A IT 1025190 B IT1025190 B IT 1025190B
Authority
IT
Italy
Prior art keywords
ducated
openings
forming
ciruits
integrated
Prior art date
Application number
IT28781/74A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1025190B publication Critical patent/IT1025190B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/113—Nitrides of boron or aluminum or gallium
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
IT28781/74A 1973-12-26 1974-10-25 Sistema per formare aperture di ri dotte dimensioni in ciruiti integrati IT1025190B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US427888A US3904454A (en) 1973-12-26 1973-12-26 Method for fabricating minute openings in insulating layers during the formation of integrated circuits

Publications (1)

Publication Number Publication Date
IT1025190B true IT1025190B (it) 1978-08-10

Family

ID=23696709

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28781/74A IT1025190B (it) 1973-12-26 1974-10-25 Sistema per formare aperture di ri dotte dimensioni in ciruiti integrati

Country Status (7)

Country Link
US (1) US3904454A (it)
JP (1) JPS5230831B2 (it)
CA (1) CA1048331A (it)
DE (1) DE2451486C2 (it)
FR (1) FR2256536B1 (it)
GB (1) GB1435670A (it)
IT (1) IT1025190B (it)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1548520A (en) * 1976-08-27 1979-07-18 Tokyo Shibaura Electric Co Method of manufacturing a semiconductor device
US4233337A (en) * 1978-05-01 1980-11-11 International Business Machines Corporation Method for forming semiconductor contacts
US4326332A (en) * 1980-07-28 1982-04-27 International Business Machines Corp. Method of making a high density V-MOS memory array
US4481263A (en) * 1982-05-17 1984-11-06 Raytheon Company Programmable read only memory
US5219787A (en) * 1990-07-23 1993-06-15 Microelectronics And Computer Technology Corporation Trenching techniques for forming channels, vias and components in substrates
US5880036A (en) * 1992-06-15 1999-03-09 Micron Technology, Inc. Method for enhancing oxide to nitride selectivity through the use of independent heat control
US5651855A (en) * 1992-07-28 1997-07-29 Micron Technology, Inc. Method of making self aligned contacts to silicon substrates during the manufacture of integrated circuits
US5244837A (en) * 1993-03-19 1993-09-14 Micron Semiconductor, Inc. Semiconductor electrical interconnection methods
US6498088B1 (en) * 2000-11-09 2002-12-24 Micron Technology, Inc. Stacked local interconnect structure and method of fabricating same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3388000A (en) * 1964-09-18 1968-06-11 Texas Instruments Inc Method of forming a metal contact on a semiconductor device
USB311264I5 (it) * 1964-12-31 1900-01-01
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces
US3660735A (en) * 1969-09-10 1972-05-02 Sprague Electric Co Complementary metal insulator silicon transistor pairs
US3717514A (en) * 1970-10-06 1973-02-20 Motorola Inc Single crystal silicon contact for integrated circuits and method for making same
US3728167A (en) * 1970-11-16 1973-04-17 Gte Sylvania Inc Masking method of making semiconductor device
US3800412A (en) * 1972-04-05 1974-04-02 Alpha Ind Inc Process for producing surface-oriented semiconducting devices

Also Published As

Publication number Publication date
DE2451486A1 (de) 1975-07-10
JPS5230831B2 (it) 1977-08-10
CA1048331A (en) 1979-02-13
FR2256536B1 (it) 1977-05-20
GB1435670A (en) 1976-05-12
US3904454A (en) 1975-09-09
DE2451486C2 (de) 1982-04-08
JPS5098280A (it) 1975-08-05
FR2256536A1 (it) 1975-07-25

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