IN2015DN02272A - - Google Patents
Info
- Publication number
- IN2015DN02272A IN2015DN02272A IN2272DEN2015A IN2015DN02272A IN 2015DN02272 A IN2015DN02272 A IN 2015DN02272A IN 2272DEN2015 A IN2272DEN2015 A IN 2272DEN2015A IN 2015DN02272 A IN2015DN02272 A IN 2015DN02272A
- Authority
- IN
- India
- Prior art keywords
- switch
- clock signal
- voltage
- inductor
- clock
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
- Nonlinear Science (AREA)
- Logic Circuits (AREA)
- Power Sources (AREA)
Abstract
A clock system of an integrated circuit includes first (502) and second (504) transistors forming a switch that is used when switching the clock system (Clk) between a resonant mode of operation and a non- resonant mode of operation. An inductor forms a resonant circuit with capacitance of the clock system in resonant mode. The switch receives a clock signal (Clk) and supplies the clock signal to the inductor when the switch is closed and disconnects the inductor from the clock system when the switch is open. First (501) and second (503) high impedance voltage sources supply respective first and second voltages to the switch and a gate voltage of the first transistor transitions with the clock signal around the first voltage and a gate voltage of the second transistor transitions with the clock signal around the second voltage such that near constant overdrive voltages are maintained for the first and second transistors.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/601,155 US8742817B2 (en) | 2012-08-31 | 2012-08-31 | Controlling impedance of a switch using high impedance voltage sources to provide more efficient clocking |
| PCT/US2013/057331 WO2014036288A1 (en) | 2012-08-31 | 2013-08-29 | Controlling impedance of a switch using high impedance voltage sources to provide more efficient clocking |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN2015DN02272A true IN2015DN02272A (en) | 2015-08-21 |
Family
ID=49118840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN2272DEN2015 IN2015DN02272A (en) | 2012-08-31 | 2013-08-29 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8742817B2 (en) |
| EP (1) | EP2891025B1 (en) |
| JP (1) | JP6063047B2 (en) |
| KR (1) | KR102141675B1 (en) |
| CN (1) | CN104541223B (en) |
| IN (1) | IN2015DN02272A (en) |
| WO (1) | WO2014036288A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9429982B2 (en) | 2014-09-27 | 2016-08-30 | Qualcomm Incorporated | Configurable last level clock driver for improved energy efficiency of a resonant clock |
| US10003337B1 (en) * | 2017-05-17 | 2018-06-19 | International Business Machines Corporation | Resonant virtual supply booster for synchronous logic circuits and other circuits with use of on-chip integrated magnetic inductor |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU5382494A (en) | 1994-01-18 | 1995-08-03 | Premlex Pty. Ltd. | A switching circuit |
| US6025738A (en) | 1997-08-22 | 2000-02-15 | International Business Machines Corporation | Gain enhanced split drive buffer |
| US6088250A (en) | 1998-05-29 | 2000-07-11 | The Aerospace Corporation | Power converters for multiple input power supplies |
| US6205571B1 (en) | 1998-12-29 | 2001-03-20 | International Business Machines Corporation | X-Y grid tree tuning method |
| US6310499B1 (en) | 2000-07-17 | 2001-10-30 | Hewlett-Packard Company | Methods and apparatus for adjusting the deadtime between non-overlapping clock signals |
| US7015765B2 (en) | 2003-01-13 | 2006-03-21 | The Trustees Of Columbia In The City Of New York | Resonant clock distribution for very large scale integrated circuits |
| US7082580B2 (en) | 2003-02-10 | 2006-07-25 | Lsi Logic Corporation | Energy recycling in clock distribution networks using on-chip inductors |
| TWI261158B (en) | 2003-09-08 | 2006-09-01 | Via Tech Inc | Method and related apparatus for outputting clock through data path |
| US6882182B1 (en) | 2003-09-23 | 2005-04-19 | Xilinx, Inc. | Tunable clock distribution system for reducing power dissipation |
| US7237217B2 (en) | 2003-11-24 | 2007-06-26 | International Business Machines Corporation | Resonant tree driven clock distribution grid |
| US7516350B2 (en) | 2004-09-09 | 2009-04-07 | International Business Machines Corporation | Dynamic frequency scaling sequence for multi-gigahertz microprocessors |
| US7719317B2 (en) | 2006-12-01 | 2010-05-18 | The Regents Of The University Of Michigan | Clock distribution network architecture with resonant clock gating |
| US7973565B2 (en) | 2007-05-23 | 2011-07-05 | Cyclos Semiconductor, Inc. | Resonant clock and interconnect architecture for digital devices with multiple clock networks |
| US7675121B2 (en) * | 2007-10-08 | 2010-03-09 | International Business Machines Corporation | SOI substrate contact with extended silicide area |
| US8080988B2 (en) * | 2008-06-18 | 2011-12-20 | Active-Semi, Inc. | Switch driver with low impedance initial drive and higher impedance final drive |
| JP2013507888A (en) * | 2009-10-12 | 2013-03-04 | サイクロス セミコンダクター， インコーポレイテッド | Architecture for operating a resonant clock network in conventional mode |
| US8719748B2 (en) | 2011-06-29 | 2014-05-06 | The Regents Of The University Of California | Distributed resonant clock grid synthesis |
| US8576000B2 (en) | 2011-08-25 | 2013-11-05 | International Business Machines Corporation | 3D chip stack skew reduction with resonant clock and inductive coupling |
-
2012
- 2012-08-31 US US13/601,155 patent/US8742817B2/en active Active
-
2013
- 2013-08-29 EP EP13759412.3A patent/EP2891025B1/en active Active
- 2013-08-29 JP JP2015530050A patent/JP6063047B2/en active Active
- 2013-08-29 WO PCT/US2013/057331 patent/WO2014036288A1/en unknown
- 2013-08-29 KR KR1020157007588A patent/KR102141675B1/en active IP Right Grant
- 2013-08-29 CN CN201380042914.8A patent/CN104541223B/en active Active
- 2013-08-29 IN IN2272DEN2015 patent/IN2015DN02272A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP2891025B1 (en) | 2019-06-19 |
| JP2015534670A (en) | 2015-12-03 |
| JP6063047B2 (en) | 2017-01-18 |
| CN104541223A (en) | 2015-04-22 |
| EP2891025A1 (en) | 2015-07-08 |
| US8742817B2 (en) | 2014-06-03 |
| KR20150052117A (en) | 2015-05-13 |
| WO2014036288A1 (en) | 2014-03-06 |
| US20140062563A1 (en) | 2014-03-06 |
| CN104541223B (en) | 2017-10-10 |
| KR102141675B1 (en) | 2020-09-14 |
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