IN2014MU00494A - - Google Patents
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- Publication number
- IN2014MU00494A IN2014MU00494A IN494MU2014A IN2014MU00494A IN 2014MU00494 A IN2014MU00494 A IN 2014MU00494A IN 494MU2014 A IN494MU2014 A IN 494MU2014A IN 2014MU00494 A IN2014MU00494 A IN 2014MU00494A
- Authority
- IN
- India
- Prior art keywords
- contact area
- film
- substrate
- electrically conductive
- another
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Dispersion Chemistry (AREA)
- Materials Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Multi-Conductor Connections (AREA)
- Structure Of Printed Boards (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A power assembly comprising a substrate which has, comprising power semiconductor components, and comprising a connecting device which is in the form of a film composite comprising an insulating film and an electrically conductive film which, is connected in to a contact area of a power semiconductor component or of a conductor track of the substrate, wherein the film composite has: a plurality of simple slots which run at the same distance from one another, wherein two adjacent simple slots do not have a continuously straight profile, and/ or a first wide slot which projects beyond the edge of this contact area starting from a contact area, and/or a second wide slot which splits that section of the electrically conductive film which is in contact with a contact area into two film conductor tracks which are not directly electrically conductively connected to one another.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102013102828.4A DE102013102828B4 (en) | 2013-03-20 | 2013-03-20 | Power module with a trained as a film composite connection device |
Publications (1)
Publication Number | Publication Date |
---|---|
IN2014MU00494A true IN2014MU00494A (en) | 2015-09-25 |
Family
ID=50072922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IN494MU2014 IN2014MU00494A (en) | 2013-03-20 | 2014-02-12 |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP2782132A3 (en) |
KR (1) | KR20140115252A (en) |
CN (1) | CN104064538B (en) |
DE (1) | DE102013102828B4 (en) |
IN (1) | IN2014MU00494A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102015115611A1 (en) * | 2015-09-16 | 2017-03-16 | Karlsruher Institut für Technologie | Method for producing electronic modules |
DE102020121033A1 (en) | 2020-08-10 | 2022-02-10 | Semikron Elektronik Gmbh & Co. Kg | Electronic power switching device, power semiconductor module therewith and method for production |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3061954B2 (en) * | 1991-08-20 | 2000-07-10 | 株式会社東芝 | Semiconductor device |
DE10355925B4 (en) | 2003-11-29 | 2006-07-06 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module and method of its manufacture |
DE102007006706B4 (en) | 2007-02-10 | 2011-05-26 | Semikron Elektronik Gmbh & Co. Kg | Circuit arrangement with connecting device and manufacturing method thereof |
DE102008017454B4 (en) * | 2008-04-05 | 2010-02-04 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with hermetically sealed circuit arrangement and manufacturing method for this purpose |
DE102010039824B4 (en) * | 2010-08-26 | 2018-03-29 | Semikron Elektronik Gmbh & Co. Kg | Power module with a flexible connection device |
-
2013
- 2013-03-20 DE DE102013102828.4A patent/DE102013102828B4/en active Active
-
2014
- 2014-02-07 EP EP14154233.2A patent/EP2782132A3/en not_active Withdrawn
- 2014-02-12 IN IN494MU2014 patent/IN2014MU00494A/en unknown
- 2014-03-13 KR KR1020140029456A patent/KR20140115252A/en not_active Application Discontinuation
- 2014-03-20 CN CN201410105647.0A patent/CN104064538B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN104064538B (en) | 2018-04-17 |
EP2782132A3 (en) | 2016-04-20 |
CN104064538A (en) | 2014-09-24 |
EP2782132A2 (en) | 2014-09-24 |
KR20140115252A (en) | 2014-09-30 |
DE102013102828A1 (en) | 2014-09-25 |
DE102013102828B4 (en) | 2018-04-12 |
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