IN2014DN10752A - - Google Patents

Info

Publication number
IN2014DN10752A
IN2014DN10752A IN10752DEN2014A IN2014DN10752A IN 2014DN10752 A IN2014DN10752 A IN 2014DN10752A IN 10752DEN2014 A IN10752DEN2014 A IN 10752DEN2014A IN 2014DN10752 A IN2014DN10752 A IN 2014DN10752A
Authority
IN
India
Prior art keywords
vnics
processing
nic
proxy
virtual
Prior art date
Application number
Inventor
Mark Hummel
David Mayhew
Michael Osborn
Anton Chernoff
Venkata Krishnan
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of IN2014DN10752A publication Critical patent/IN2014DN10752A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/2854—Wide area networks, e.g. public data networks
    • H04L12/2856—Access arrangements, e.g. Internet access
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/70—Virtual switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q1/00—Details of selecting apparatus or arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0058—Bus-related hardware virtualisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/38—Universal adapter
    • G06F2213/3808—Network interface controller
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Described is an aggregation device comprising a plurality of virtual network interface cards (vNICs) and an input/output (I/O) processing complex. The vNICs are in communication with a plurality of processing devices. Each processing device has at least one virtual machine (VM). The I/O processing complex is between the vNICs and at least one physical NIC. The I/O processing complex includes at least one proxy NIC and a virtual switch. The virtual switch exchanges data with a processing device of the plurality of processing devices via a communication path established by a vNIC of the plurality of vNICs between the at least one VM and at least one proxy NIC.
IN10752DEN2014 2012-06-25 2013-06-10 IN2014DN10752A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/531,890 US8806025B2 (en) 2012-06-25 2012-06-25 Systems and methods for input/output virtualization
PCT/US2013/044914 WO2014004060A1 (en) 2012-06-25 2013-06-10 Systems and methods for input/output virtualization

Publications (1)

Publication Number Publication Date
IN2014DN10752A true IN2014DN10752A (en) 2015-09-04

Family

ID=48699291

Family Applications (1)

Application Number Title Priority Date Filing Date
IN10752DEN2014 IN2014DN10752A (en) 2012-06-25 2013-06-10

Country Status (7)

Country Link
US (1) US8806025B2 (en)
EP (1) EP2864893A1 (en)
JP (1) JP2015521779A (en)
KR (1) KR20150030738A (en)
CN (1) CN104395895A (en)
IN (1) IN2014DN10752A (en)
WO (1) WO2014004060A1 (en)

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US9781041B2 (en) * 2013-07-24 2017-10-03 Dell Products Lp Systems and methods for native network interface controller (NIC) teaming load balancing
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JP6505171B2 (en) * 2016-08-25 2019-04-24 エヌエイチエヌ エンターテインメント コーポレーションＮＨＮ Ｅｎｔｅｒｔａｉｎｍｅｎｔ Ｃｏｒｐｏｒａｔｉｏｎ Method and system for handling DSR load balancing utilizing a loopback interface in a virtual network environment
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Also Published As

Publication number Publication date
EP2864893A1 (en) 2015-04-29
WO2014004060A1 (en) 2014-01-03
JP2015521779A (en) 2015-07-30
CN104395895A (en) 2015-03-04
US20130346531A1 (en) 2013-12-26
KR20150030738A (en) 2015-03-20
US8806025B2 (en) 2014-08-12

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