IN2014CN03595A - - Google Patents

Info

Publication number
IN2014CN03595A
IN2014CN03595A IN3595CHN2014A IN2014CN03595A IN 2014CN03595 A IN2014CN03595 A IN 2014CN03595A IN 3595CHN2014 A IN3595CHN2014 A IN 3595CHN2014A IN 2014CN03595 A IN2014CN03595 A IN 2014CN03595A
Authority
IN
India
Prior art keywords
rendering mode
rendering
mode
structures
determined
Prior art date
Application number
Inventor
Avinash Seetharamaiah
Christopher Paul Frascati
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014CN03595A publication Critical patent/IN2014CN03595A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T11/00—2D [Two Dimensional] image generation
    • G06T11/40—Filling a planar surface by adding surface attributes, e.g. colour or texture

Abstract

This disclosure presents techniques and structures for determining a rendering mode (e.g. a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.
IN3595CHN2014 2011-11-30 2012-11-07 IN2014CN03595A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161565397P 2011-11-30 2011-11-30
US13/553,673 US9117302B2 (en) 2011-11-30 2012-07-19 Switching between direct rendering and binning in graphics processing using an overdraw tracker
PCT/US2012/063945 WO2013081788A1 (en) 2011-11-30 2012-11-07 Switching between direct rendering and binning in graphics processing using an overdraw tracker

Publications (1)

Publication Number Publication Date
IN2014CN03595A true IN2014CN03595A (en) 2015-10-09

Family

ID=48466428

Family Applications (1)

Application Number Title Priority Date Filing Date
IN3595CHN2014 IN2014CN03595A (en) 2011-11-30 2012-11-07

Country Status (7)

Country Link
US (3) US9547930B2 (en)
EP (2) EP2786351B1 (en)
JP (2) JP5866457B2 (en)
KR (1) KR101615840B1 (en)
CN (2) CN103959338B (en)
IN (1) IN2014CN03595A (en)
WO (3) WO2013081789A1 (en)

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Also Published As

Publication number Publication date
JP2015506018A (en) 2015-02-26
US9547930B2 (en) 2017-01-17
EP2786351A1 (en) 2014-10-08
JP5847960B2 (en) 2016-01-27
US20130135322A1 (en) 2013-05-30
US9117302B2 (en) 2015-08-25
KR20140101398A (en) 2014-08-19
WO2013081787A1 (en) 2013-06-06
CN103959337A (en) 2014-07-30
CN103959338B (en) 2016-09-14
US20130135329A1 (en) 2013-05-30
KR101615840B1 (en) 2016-04-26
US20130135341A1 (en) 2013-05-30
EP2786350A1 (en) 2014-10-08
WO2013081788A1 (en) 2013-06-06
JP5866457B2 (en) 2016-02-17
WO2013081789A1 (en) 2013-06-06
CN103959338A (en) 2014-07-30
CN103959337B (en) 2016-06-01
EP2786351B1 (en) 2016-03-30
EP2786350B1 (en) 2018-09-12
US8830246B2 (en) 2014-09-09
JP2015506017A (en) 2015-02-26

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